141 lines
7.5 KiB
C
141 lines
7.5 KiB
C
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#ifndef __CH395_H
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#define __CH395_H
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#include "ch395inc.h"
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//#include "./SYSTEM/sys/sys.h"
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//#include "./SYSTEM/usart/usart.h"
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#include "ch395inc.h"
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#include "ch395cmd.h"
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//#include "./SYSTEM/delay/delay.h"
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#include "string.h"
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#include "stdio.h"
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#define MULTI_CONNECT_ENABLE 1
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/******************************************************************************************/
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/* <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> */
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#define CH395_SCS_GPIO_PORT GPIOB
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#define CH395_SCS_GPIO_PIN GPIO_PIN_12
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#define CH395_SCS_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOC_CLK_ENABLE(); }while(0) /* PB<50><42>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9> */
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#define CH395_INT_GPIO_PORT GPIOD
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#define CH395_INT_GPIO_PIN GPIO_PIN_8
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#define CH395_INT_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOD_CLK_ENABLE(); }while(0) /* PB<50><42>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9> */
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#define CH395_RST_GPIO_PORT GPIOD
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#define CH395_RST_GPIO_PIN GPIO_PIN_9
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#define CH395_RST_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOD_CLK_ENABLE(); }while(0) /* PB<50><42>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9> */
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/******************************************************************************************/
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#define ch395_scs_low HAL_GPIO_WritePin(CH395_SCS_GPIO_PORT, CH395_SCS_GPIO_PIN, GPIO_PIN_RESET) /* SPIƬѡ<C6AC><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ƽ */
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#define ch395_scs_hign HAL_GPIO_WritePin(CH395_SCS_GPIO_PORT, CH395_SCS_GPIO_PIN, GPIO_PIN_SET) /* SPIƬѡ<C6AC><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ */
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#define ch395_sdo_pin HAL_GPIO_ReadPin(GPIOB,GPIO_PIN_14) /* <20><>ȡCH395<39><35>SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ŵ<EFBFBD>ƽ */
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#define ch395_int_pin_wire HAL_GPIO_ReadPin(CH395_INT_GPIO_PORT,CH395_INT_GPIO_PIN) /* <20>ٶ<EFBFBD>CH395<39><35>INT#<23><><EFBFBD><EFBFBD>,<2C><><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ôҲ<C3B4><D2B2><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SDO<44><4F><EFBFBD><EFBFBD>״̬ʵ<CCAC><CAB5> */
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typedef struct ch395q_socket_t
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{
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uint8_t socket_enable; /* Socketʹ<74><CAB9> */
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uint8_t socket_index; /* Socket<65><74><EFBFBD> */
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uint8_t proto; /* SocketЭ<74><D0AD> */
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uint8_t des_ip[4]; /* Ŀ<><C4BF>IP<49><50>ַ */
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uint16_t des_port; /* Ŀ<>Ķ˿<C4B6> */
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uint16_t sour_port; /* Դ<>˿<EFBFBD> */
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struct
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{
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uint8_t *buf; /* <20><><EFBFBD><EFBFBD>ռ<EFBFBD> */
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uint32_t size; /* <20><><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>С */
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} send; /* <20><><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD> */
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struct
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{
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uint8_t recv_flag; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD>־λ */
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uint8_t *buf; /* <20><><EFBFBD><EFBFBD>ռ<EFBFBD> */
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uint32_t size; /* <20><><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>С */
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} recv; /* <20><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD> */ /* <20><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD> */
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struct
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{
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uint8_t ip[4]; /* IP<49><50>ַ */
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uint8_t gwip[4]; /* <20><><EFBFBD><EFBFBD>IP<49><50>ַ */
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uint8_t mask[4]; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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uint8_t dns1[4]; /* DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31>ַ */
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uint8_t dns2[4]; /* DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>ַ */
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} net_info; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ */
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struct
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{
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uint8_t ipaddr[4]; /* IP<49><50>ַ 32bit*/
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uint8_t gwipaddr[4]; /* <20><><EFBFBD>ص<EFBFBD>ַ 32bit*/
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uint8_t maskaddr[4]; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 32bit*/
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uint8_t macaddr[6]; /* MAC<41><43>ַ 48bit*/
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} net_config; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ */
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} ch395_socket;
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/* DHCP״̬ */
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enum DHCP
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{
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DHCP_UP = 0, /* DHCP<43><50>ȡ<EFBFBD>ɹ<EFBFBD>״̬ */
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DHCP_DOWN, /* DHCP<43><50>ȡʧ<C8A1><CAA7>״̬ */
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DHCP_STA, /* DHCP<43><50><EFBFBD><EFBFBD>״̬ */
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};
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struct ch395q_t
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{
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uint8_t version; /* <20>汾<EFBFBD><E6B1BE>Ϣ */
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uint8_t phy_status; /* PHY״̬ */
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uint8_t dhcp_status; /* DHCP״̬ */
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uint8_t ipinf_buf[20]; /* <20><>ȡIP<49><50>Ϣ */
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struct
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{
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ch395_socket config; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ */
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} socket[8]; /* Socket״̬ */
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void (*ch395_error)(uint8_t i); /* ch395q<35><71><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF> */
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void (*ch395_phy_cb)(uint8_t phy_status); /* ch395q phy״̬<D7B4>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> */
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void (*ch395_reconnection)(void); /* ch395q <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӻ<EFBFBD><D3BA><EFBFBD> */
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};
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extern struct ch395q_t g_ch395q_sta;
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/* CH395Qģ<51><C4A3>Socket<65><74>Ŷ<EFBFBD><C5B6><EFBFBD> */
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#define CH395Q_SOCKET_0 0 /* Socket 0 */
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#define CH395Q_SOCKET_1 1 /* Socket 1 */
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#define CH395Q_SOCKET_2 2 /* Socket 2 */
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#define CH395Q_SOCKET_3 3 /* Socket 3 */
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#define CH395Q_SOCKET_4 4 /* Socket 4 */
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#define CH395Q_SOCKET_5 5 /* Socket 5 */
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#define CH395Q_SOCKET_6 6 /* Socket 6 */
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#define CH395Q_SOCKET_7 7 /* Socket 7 */
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/* ʹ<>ܶ<EFBFBD><DCB6><EFBFBD> */
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#define CH395Q_DISABLE 1 /* <20><><EFBFBD><EFBFBD> */
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#define CH395Q_ENABLE 2 /* ʹ<><CAB9> */
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/* CH395Qģ<51><C4A3>SocketЭ<74><D0AD><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD> */
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#define CH395Q_SOCKET_UDP 0 /* UDP */
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#define CH395Q_SOCKET_TCP_CLIENT 1 /* TCP<43>ͻ<EFBFBD><CDBB><EFBFBD> */
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#define CH395Q_SOCKET_TCP_SERVER 2 /* TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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#define CH395Q_SOCKET_MAC_RAW 3 /* MAC_RAW */
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#define DEF_KEEP_LIVE_IDLE (15*1000) /* <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> */
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#define DEF_KEEP_LIVE_PERIOD (15*1000) /* <20><><EFBFBD>Ϊ15<31>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>KEEPLIVE<56><45><EFBFBD>ݰ<EFBFBD> */
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#define DEF_KEEP_LIVE_CNT 200
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uint8_t ch395_read_data(void ) ;
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void ch395_write_cmd( uint8_t mcmd );
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void ch395_write_data( uint8_t mdata );
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void ch395q_handler(void);
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void ch395_interrupt_handler(void);
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void ch395_hardware_init(void);
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uint8_t ch395q_socket_config(ch395_socket * ch395_sokect);
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void ch395_reconnection(void);
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void ch395_init(void);
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void set_ipv4(void);
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#endif
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