614 lines
24 KiB
Plaintext
614 lines
24 KiB
Plaintext
C51 COMPILER V9.01 SC92F_PWM 09/11/2020 09:48:38 PAGE 1
|
|
C51 COMPILER V9.01, COMPILATION OF MODULE SC92F_PWM
|
|
OBJECT MODULE PLACED IN ..\Output\sc92f_pwm.obj
|
|
COMPILER INVOKED BY: E:\Keil\C51\BIN\C51.EXE ..\FWLib\SC92F_Lib\src\sc92f_pwm.c OMF2 BROWSE INCDIR(..\FWLib\SC92F_Lib\in
|
|
-c;..\User) DEBUG PRINT(..\List\sc92f_pwm.lst) OBJECT(..\Output\sc92f_pwm.obj)
|
|
line level source
|
|
1
|
|
2
|
|
3
|
|
4
|
|
5
|
|
6
|
|
7
|
|
8
|
|
9
|
|
10
|
|
11
|
|
12 #include "sc92f_pwm.h"
|
|
13
|
|
14 #if defined (SC92F854x) || defined (SC92F754x) ||defined (SC92F844xB) || defined (SC92F744xB)||defined (
|
|
-SC92F84Ax_2) || defined (SC92F74Ax_2)
|
|
uint16_t xdata PWMREG[8] _at_ 0x740;
|
|
uint16_t pwm_tmpreg[8] = {0,0,0,0,0,0,0,0};
|
|
void PWM_DeInit(void)
|
|
{
|
|
static uint8_t i;
|
|
PWMCFG = 0X00;
|
|
PWMCON = 0X00;
|
|
IE1 &= 0XFD;
|
|
IP1 &= 0XFD;
|
|
for(i=0;i<8;i++)
|
|
{
|
|
PWMREG[i] = 0;
|
|
}
|
|
}
|
|
void PWM_Init(PWM_PresSel_TypeDef PWM_PresSel, uint16_t PWM_Period)
|
|
{
|
|
PWM_Period -= 1;
|
|
PWMCFG = (PWMCFG & 0XCF) | PWM_PresSel;
|
|
PWMCFG = (PWMCFG & 0XF0) | (uint8_t)(PWM_Period / 256);
|
|
PWMCON = (uint8_t)(PWM_Period & 0X00FF);
|
|
}
|
|
void PWM_OutputStateConfig(uint8_t PWM_OutputPin, PWM_OutputState_TypeDef PWM_OutputState)
|
|
{
|
|
uint8_t i;
|
|
for(i=0;i<8;i++)
|
|
{
|
|
if(PWM_OutputPin&(0x01<<i))
|
|
{
|
|
if(PWM_OutputState == PWM_OUTPUTSTATE_DISABLE)
|
|
{
|
|
pwm_tmpreg[i] &= 0X7FFF;
|
|
}
|
|
else
|
|
{
|
|
pwm_tmpreg[i] |= 0X8000;
|
|
}
|
|
PWMREG[i] = pwm_tmpreg[i];
|
|
}
|
|
}
|
|
}
|
|
void PWM_PolarityConfig(uint8_t PWM_OutputPin, PWM_Polarity_TypeDef PWM_Polarity)
|
|
{
|
|
uint8_t i;
|
|
for(i=0;i<8;i++)
|
|
{
|
|
if(PWM_OutputPin&(0x01<<i))
|
|
{
|
|
if(PWM_Polarity == PWM_POLARITY_NON_INVERT)
|
|
{
|
|
pwm_tmpreg[i] &= 0XBFFF;
|
|
}
|
|
else
|
|
{
|
|
pwm_tmpreg[i] |= 0X4000;
|
|
}
|
|
PWMREG[i] = pwm_tmpreg[i];
|
|
}
|
|
}
|
|
}
|
|
void PWM_IndependentModeConfig(PWM_OutputPin_TypeDef PWM_OutputPin, uint16_t PWM_DutyCycle)
|
|
{
|
|
uint8_t i;
|
|
for(i=0;i<8;i++)
|
|
{
|
|
if(PWM_OutputPin&(0x01<<i))
|
|
{
|
|
pwm_tmpreg[i] = pwm_tmpreg[i] & 0XF000 | PWM_DutyCycle;
|
|
PWMREG[i] = pwm_tmpreg[i];
|
|
}
|
|
}
|
|
}
|
|
void PWM_Cmd(FunctionalState NewState)
|
|
{
|
|
if (NewState != DISABLE)
|
|
{
|
|
PWMCFG |= 0X80;
|
|
}
|
|
else
|
|
{
|
|
PWMCFG &= 0X7F;
|
|
}
|
|
}
|
|
void PWM_ITConfig(FunctionalState NewState, PriorityStatus Priority)
|
|
{
|
|
if (NewState != DISABLE)
|
|
{
|
|
IE1 |= 0X02;
|
|
}
|
|
else
|
|
{
|
|
IE1 &= 0XFD;
|
|
}
|
|
if(Priority == LOW)
|
|
{
|
|
IP1 &= ~0X02;
|
|
}
|
|
else
|
|
{
|
|
IP1 |= 0X02;
|
|
}
|
|
}
|
|
FlagStatus PWM_GetFlagStatus(void)
|
|
{
|
|
return (FlagStatus)(PWMCFG & 0X40);
|
|
}
|
|
void PWM_ClearFlag(void)
|
|
{
|
|
PWMCFG &= 0XBF;
|
|
}
|
|
#endif
|
|
194
|
|
195 #if defined (SC92F846xB) || defined (SC92F746xB) || defined (SC92F836xB) || defined (SC92F736xB)|| defined
|
|
- (SC92F83Ax) || defined (SC92F73Ax)|| defined (SC92F84Ax) || defined (SC92F74Ax)
|
|
void PWM_DeInit(void)
|
|
{
|
|
PWMCFG = 0X00;
|
|
PWMCON = 0X00;
|
|
PWMPRD = 0X00;
|
|
PWMDTYA = 0X00;
|
|
PWMDTY0 = 0X00;
|
|
PWMDTY1 = 0X00;
|
|
PWMDTY2 = 0X00;
|
|
PWMDTYB = 0X00;
|
|
PWMDTY3 = 0X00;
|
|
PWMDTY4 = 0X00;
|
|
PWMDTY5 = 0X00;
|
|
IE1 &= ~0X02;
|
|
IP1 &= ~0X02;
|
|
}
|
|
void PWM_Init(PWM_PresSel_TypeDef PWM_PresSel, uint16_t PWM_Period)
|
|
{
|
|
PWM_Period -= 1;
|
|
PWMCFG = (PWMCFG & 0X3F) | (PWM_PresSel << 6);
|
|
PWMDTYA = (PWMDTYA & 0X3F) | ((uint8_t)(PWM_Period % 4) << 6);
|
|
PWMPRD = (uint8_t)(PWM_Period >> 2);
|
|
}
|
|
void PWM_OutputStateConfig(uint8_t PWM_OutputPin, PWM_OutputState_TypeDef PWM_OutputState)
|
|
{
|
|
if(PWM_OutputState == PWM_OUTPUTSTATE_ENABLE)
|
|
{
|
|
PWMCON |= PWM_OutputPin;
|
|
}
|
|
else
|
|
{
|
|
PWMCON &= (~PWM_OutputPin);
|
|
}
|
|
}
|
|
void PWM_PolarityConfig(uint8_t PWM_OutputPin, PWM_Polarity_TypeDef PWM_Polarity)
|
|
{
|
|
if(PWM_Polarity == PWM_POLARITY_INVERT)
|
|
{
|
|
PWMCFG |= PWM_OutputPin;
|
|
}
|
|
else
|
|
{
|
|
PWMCFG &= (~PWM_OutputPin);
|
|
}
|
|
}
|
|
void PWM_IndependentModeConfig(PWM_OutputPin_TypeDef PWM_OutputPin, uint16_t PWM_DutyCycle)
|
|
{
|
|
PWMDTYB &= 0X7F;
|
|
switch(PWM_OutputPin)
|
|
{
|
|
case PWM0:
|
|
PWMDTYA = PWMDTYA & 0xfc | (PWM_DutyCycle % 4);
|
|
PWMDTY0 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
case PWM1:
|
|
PWMDTYA = PWMDTYA & 0xf3 | ((PWM_DutyCycle % 4) << 2);
|
|
PWMDTY1 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
case PWM2:
|
|
PWMDTYA = PWMDTYA & 0xcf | ((PWM_DutyCycle % 4) << 4);
|
|
PWMDTY2 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
case PWM3:
|
|
PWMDTYB = PWMDTYB & 0xfc | (PWM_DutyCycle % 4);
|
|
PWMDTY3 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
case PWM4:
|
|
PWMDTYB = PWMDTYB & 0xf3 | ((PWM_DutyCycle % 4) << 2);
|
|
PWMDTY4 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
case PWM5:
|
|
PWMDTYB = PWMDTYB & 0xcf | ((PWM_DutyCycle % 4) << 4);
|
|
PWMDTY5 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
void PWM_ComplementaryModeConfig(PWM_ComplementaryOutputPin_TypeDef PWM_ComplementaryOutputPin, uint16_t P
|
|
-WM_DutyCycle)
|
|
{
|
|
PWMDTYB |= 0X80;
|
|
switch(PWM_ComplementaryOutputPin)
|
|
{
|
|
case PWM0PWM3:
|
|
PWMDTYA = PWMDTYA & 0xfc | (PWM_DutyCycle % 4);
|
|
PWMDTY0 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
case PWM1PWM4:
|
|
PWMDTYA = PWMDTYA & 0xf3 | ((PWM_DutyCycle % 4) << 2);
|
|
PWMDTY1 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
case PWM2PWM5:
|
|
PWMDTYA = PWMDTYA & 0xcf | ((PWM_DutyCycle % 4) << 4);
|
|
PWMDTY2 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
void PWM_DeadTimeConfig(uint8_t PWM012_RisingDeadTime, uint8_t PWM345_fallingDeadTime)
|
|
{
|
|
PWMDTY3 = (PWM012_RisingDeadTime | (PWM345_fallingDeadTime << 4));
|
|
}
|
|
void PWM_Cmd(FunctionalState NewState)
|
|
{
|
|
if (NewState != DISABLE)
|
|
{
|
|
PWMCON |= 0X80;
|
|
}
|
|
else
|
|
{
|
|
PWMCON &= ~0X80;
|
|
}
|
|
}
|
|
void PWM_ITConfig(FunctionalState NewState, PriorityStatus Priority)
|
|
{
|
|
if (NewState != DISABLE)
|
|
{
|
|
IE1 |= 0X02;
|
|
}
|
|
else
|
|
{
|
|
IE1 &= 0XFD;
|
|
}
|
|
if(Priority == LOW)
|
|
{
|
|
IP1 &= 0XFD;
|
|
}
|
|
else
|
|
{
|
|
IP1 |= 0X02;
|
|
}
|
|
}
|
|
FlagStatus PWM_GetFlagStatus(void)
|
|
{
|
|
return (FlagStatus)(PWMCON & 0X40);
|
|
}
|
|
void PWM_ClearFlag(void)
|
|
{
|
|
PWMCON &= 0XBF;
|
|
}
|
|
#endif
|
|
422
|
|
423
|
|
424
|
|
425
|
|
426
|
|
427
|
|
428
|
|
429
|
|
430
|
|
431 #if defined (SC92F8003)
|
|
432
|
|
438 void PWM_DeInit(void)
|
|
439 {
|
|
440 1 PWMCFG = 0X00;
|
|
441 1 PWMCON0 = 0X00;
|
|
442 1 PWMPRD = 0X00;
|
|
443 1 PWMDTYA = 0X00;
|
|
444 1 PWMDTY0 = 0X00;
|
|
445 1 PWMDTY1 = 0X00;
|
|
446 1 PWMDTY2 = 0X00;
|
|
447 1 PWMCON1 = 0X00;
|
|
448 1 PWMDTYB = 0X00;
|
|
449 1 PWMDTY3 = 0X00;
|
|
450 1 PWMDTY4 = 0X00;
|
|
451 1 PWMDTY5 = 0X00;
|
|
452 1 PWMDTY6 = 0X00;
|
|
453 1 IE1 &= 0XFD;
|
|
454 1 IP1 &= 0XFD;
|
|
455 1 }
|
|
456
|
|
457
|
|
464 void PWM_Init(PWM_PresSel_TypeDef PWM_PresSel, uint16_t PWM_Period)
|
|
465 {
|
|
466 1 PWM_Period -= 1;
|
|
467 1 PWMCON0 = (PWMCON0 & 0XCC) | PWM_PresSel | (uint8_t)(PWM_Period & 0X0003);
|
|
468 1 PWMPRD = (uint8_t)(PWM_Period >> 2);
|
|
469 1 }
|
|
470
|
|
471
|
|
478 void PWM_OutputStateConfig(uint8_t PWM_OutputPin, PWM_OutputState_TypeDef PWM_OutputState)
|
|
479 {
|
|
480 1 if(PWM_OutputState == PWM_OUTPUTSTATE_ENABLE)
|
|
481 1 {
|
|
482 2 PWMCON1 |= PWM_OutputPin;
|
|
483 2 }
|
|
484 1 else
|
|
485 1 {
|
|
486 2 PWMCON1 &= (~PWM_OutputPin);
|
|
487 2 }
|
|
488 1 }
|
|
489
|
|
490
|
|
496 void PWM_PWM2Selection(PWM2_OutputPin_TypeDef PWM2_OutputPin)
|
|
497 {
|
|
498 1 PWMCON0 = PWMCON0 & 0XFB | PWM2_OutputPin;
|
|
499 1 }
|
|
500
|
|
501
|
|
507 void PWM_PWM5Selection(PWM5_OutputPin_TypeDef PWM5_OutputPin)
|
|
508 {
|
|
509 1 PWMCON0 = PWMCON0 & 0XF7 | PWM5_OutputPin;
|
|
510 1 }
|
|
511
|
|
512
|
|
519 void PWM_PolarityConfig(uint8_t PWM_OutputPin, PWM_Polarity_TypeDef PWM_Polarity)
|
|
520 {
|
|
521 1 if(PWM_Polarity == PWM_POLARITY_INVERT)
|
|
522 1 {
|
|
523 2 PWMCFG |= PWM_OutputPin;
|
|
524 2 }
|
|
525 1 else
|
|
526 1 {
|
|
527 2 PWMCFG &= (~PWM_OutputPin);
|
|
528 2 }
|
|
529 1 }
|
|
530
|
|
531
|
|
538 void PWM_IndependentModeConfig(PWM_OutputPin_TypeDef PWM_OutputPin, uint16_t PWM_DutyCycle)
|
|
539 {
|
|
540 1 if(PWM_OutputPin!=PWM6)
|
|
541 1 {
|
|
542 2 PWMCON1 &= 0X7F;
|
|
543 2 }
|
|
544 1 switch(PWM_OutputPin)
|
|
545 1 {
|
|
546 2 case PWM0:
|
|
547 2 PWMDTYA = PWMDTYA & 0XFC | (PWM_DutyCycle % 4);
|
|
548 2 PWMDTY0 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
549 2 break;
|
|
550 2 case PWM1:
|
|
551 2 PWMDTYA = PWMDTYA & 0XF3 | ((PWM_DutyCycle % 4) << 2);
|
|
552 2 PWMDTY1 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
553 2 break;
|
|
554 2 case PWM2:
|
|
555 2 PWMDTYA = PWMDTYA & 0XCF | ((PWM_DutyCycle % 4) << 4);
|
|
556 2 PWMDTY2 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
557 2 break;
|
|
558 2 case PWM3:
|
|
559 2 PWMDTYA = PWMDTYA & 0X3F | ((PWM_DutyCycle % 4) << 6);
|
|
560 2 PWMDTY3 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
561 2 break;
|
|
562 2 case PWM4:
|
|
563 2 PWMDTYB = PWMDTYB & 0XFC | (PWM_DutyCycle % 4);
|
|
564 2 PWMDTY4 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
565 2 break;
|
|
566 2 case PWM5:
|
|
567 2 PWMDTYB = PWMDTYB & 0XF3 | ((PWM_DutyCycle % 4) << 2);
|
|
568 2 PWMDTY5 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
569 2 break;
|
|
570 2 case PWM6:
|
|
571 2 PWMDTYB = PWMDTYB & 0XCF | ((PWM_DutyCycle % 4) << 4);
|
|
572 2 PWMDTY6 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
573 2 break;
|
|
574 2 default:
|
|
575 2 break;
|
|
576 2 }
|
|
577 1 }
|
|
578
|
|
579
|
|
586 void PWM_ComplementaryModeConfig(PWM_ComplementaryOutputPin_TypeDef PWM_ComplementaryOutputPin, uint16_t P
|
|
-WM_DutyCycle)
|
|
587 {
|
|
588 1 PWMCON1 |= 0X80;
|
|
589 1 switch(PWM_ComplementaryOutputPin)
|
|
590 1 {
|
|
591 2 case PWM0PWM3:
|
|
592 2 PWMDTYA = PWMDTYA & 0XFC | (PWM_DutyCycle % 4);
|
|
593 2 PWMDTY0 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
594 2 break;
|
|
595 2 case PWM1PWM4:
|
|
596 2 PWMDTYA = PWMDTYA & 0XF3 | ((PWM_DutyCycle % 4) << 2);
|
|
597 2 PWMDTY1 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
598 2 break;
|
|
599 2 case PWM2PWM5:
|
|
600 2 PWMDTYA = PWMDTYA & 0XCF | ((PWM_DutyCycle % 4) << 4);
|
|
601 2 PWMDTY2 = (uint8_t)(PWM_DutyCycle >> 2);
|
|
602 2 break;
|
|
603 2 default:
|
|
604 2 break;
|
|
605 2 }
|
|
606 1 }
|
|
607
|
|
608
|
|
615 void PWM_DeadTimeConfig(uint8_t PWM012_RisingDeadTime, uint8_t PWM345_fallingDeadTime)
|
|
616 {
|
|
617 1 PWMDTY3 = (PWM012_RisingDeadTime | (PWM345_fallingDeadTime << 4));
|
|
618 1 }
|
|
619
|
|
620
|
|
626 void PWM_Cmd(FunctionalState NewState)
|
|
627 {
|
|
628 1 if (NewState != DISABLE)
|
|
629 1 {
|
|
630 2 PWMCON0 |= 0X80;
|
|
631 2 }
|
|
632 1 else
|
|
633 1 {
|
|
634 2 PWMCON0 &= ~0X80;
|
|
635 2 }
|
|
636 1 }
|
|
637
|
|
638
|
|
645 void PWM_ITConfig(FunctionalState NewState, PriorityStatus Priority)
|
|
646 {
|
|
647 1 if (NewState != DISABLE)
|
|
648 1 {
|
|
649 2 IE1 |= 0X02;
|
|
650 2 }
|
|
651 1 else
|
|
652 1 {
|
|
653 2 IE1 &= 0XFD;
|
|
654 2 }
|
|
655 1
|
|
656 1 if(Priority == LOW)
|
|
657 1 {
|
|
658 2 IP1 &= 0XFD;
|
|
659 2 }
|
|
660 1 else
|
|
661 1 {
|
|
662 2 IP1 |= 0X02;
|
|
663 2 }
|
|
664 1 }
|
|
665
|
|
666
|
|
672 FlagStatus PWM_GetFlagStatus(void)
|
|
673 {
|
|
674 1 return (FlagStatus)(PWMCON0 & 0X40);
|
|
675 1 }
|
|
676
|
|
677
|
|
683 void PWM_ClearFlag(void)
|
|
684 {
|
|
685 1 PWMCON0 &= 0XBF;
|
|
686 1 }
|
|
687 #endif
|
|
688
|
|
689
|
|
690
|
|
691
|
|
692
|
|
693
|
|
694
|
|
695
|
|
696
|
|
697
|
|
698
|
|
699
|
|
700 #if defined (SC92F742x)
|
|
void PWM_DeInit(void)
|
|
{
|
|
PWMCFG0 = 0X00;
|
|
PWMCON = 0X00;
|
|
PWMPRD = 0X00;
|
|
PWMCFG1 = 0X00;
|
|
PWMDTY0 = 0X00;
|
|
PWMDTY1 = 0X00;
|
|
PWMDTY2 = 0X00;
|
|
PWMDTY3 = 0X00;
|
|
PWMDTY4 = 0X00;
|
|
PWMDTY5 = 0X00;
|
|
IE1 &= ~0X02;
|
|
IP1 &= ~0X02;
|
|
}
|
|
void PWM_Init(PWM_PresSel_TypeDef PWM_PresSel, uint16_t PWM_Period)
|
|
{
|
|
PWM_Period -= 1;
|
|
PWMCON = (PWMCON & 0XF8) | PWM_PresSel;
|
|
PWMPRD = PWM_Period;
|
|
}
|
|
void PWM_OutputStateConfig(uint8_t PWM_OutputPin, PWM_OutputState_TypeDef PWM_OutputState)
|
|
{
|
|
if(PWM_OutputState==PWM_OUTPUTSTATE_DISABLE)
|
|
{
|
|
PWMCON = PWMCON & (~(PWM_OutputPin&0x38));
|
|
PWMCFG0 = PWMCFG0 & (~(PWM_OutputPin&0x07));
|
|
}
|
|
else
|
|
{
|
|
PWMCON = PWMCON | (PWM_OutputPin&0x38);
|
|
PWMCFG0 = PWMCFG0 |(PWM_OutputPin&0x07);
|
|
}
|
|
}
|
|
void PWM_PolarityConfig(uint8_t PWM_OutputPin, PWM_Polarity_TypeDef PWM_Polarity)
|
|
{
|
|
if(PWM_Polarity==PWM_POLARITY_NON_INVERT)
|
|
{
|
|
PWMCFG0 = PWMCFG0 & (~(PWM_OutputPin&0x38));
|
|
PWMCFG1 = PWMCFG1 & (~((PWM_OutputPin<<3)&0x38));
|
|
}
|
|
else
|
|
{
|
|
PWMCFG0 = PWMCFG0 | (PWM_OutputPin&0x38);
|
|
PWMCFG1 = PWMCFG1 |((PWM_OutputPin<<3)&0x38);
|
|
}
|
|
}
|
|
void PWM_IndependentModeConfig(PWM_OutputPin_TypeDef PWM_OutputPin, uint16_t PWM_DutyCycle)
|
|
{
|
|
switch(PWM_OutputPin)
|
|
{
|
|
case PWM0:
|
|
PWMDTY0 = PWM_DutyCycle;
|
|
break;
|
|
case PWM1:
|
|
PWMDTY1 = PWM_DutyCycle;
|
|
break;
|
|
case PWM2:
|
|
PWMDTY2 = PWM_DutyCycle;
|
|
break;
|
|
case PWM3:
|
|
PWMDTY3 = PWM_DutyCycle;
|
|
break;
|
|
case PWM4:
|
|
PWMDTY4 = PWM_DutyCycle;
|
|
break;
|
|
case PWM5:
|
|
PWMDTY5 = PWM_DutyCycle;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
void PWM_Cmd(FunctionalState NewState)
|
|
{
|
|
if (NewState != DISABLE)
|
|
{
|
|
PWMCON |= 0X80;
|
|
}
|
|
else
|
|
{
|
|
PWMCON &= ~0X80;
|
|
}
|
|
}
|
|
void PWM_ITConfig(FunctionalState NewState, PriorityStatus Priority)
|
|
{
|
|
if (NewState != DISABLE)
|
|
{
|
|
IE1 |= 0X02;
|
|
}
|
|
else
|
|
{
|
|
IE1 &= ~0X02;
|
|
}
|
|
if(Priority == LOW)
|
|
{
|
|
IP1 &= ~0X02;
|
|
}
|
|
else
|
|
{
|
|
IP1 |= 0X02;
|
|
}
|
|
}
|
|
FlagStatus PWM_GetFlagStatus(void)
|
|
{
|
|
return (FlagStatus)(PWMCON & 0X40);
|
|
}
|
|
void PWM_ClearFlag(void)
|
|
{
|
|
PWMCON &= 0XBF;
|
|
}
|
|
#endif
|
|
881
|
|
882
|
|
MODULE INFORMATION: STATIC OVERLAYABLE
|
|
CODE SIZE = 504 ----
|
|
CONSTANT SIZE = ---- ----
|
|
XDATA SIZE = ---- ----
|
|
PDATA SIZE = ---- ----
|
|
DATA SIZE = ---- ----
|
|
IDATA SIZE = ---- ----
|
|
BIT SIZE = ---- ----
|
|
EDATA SIZE = ---- ----
|
|
HDATA SIZE = ---- ----
|
|
XDATA CONST SIZE = ---- ----
|
|
FAR CONST SIZE = ---- ----
|
|
END OF MODULE INFORMATION.
|
|
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
|