wxsmart-test
/
positioner_testing_project
7
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

备份

This commit is contained in:
王绪洁 2025-02-19 09:17:52 +08:00
parent 48df3f9512
commit 48ac74d954
6 changed files with 67 additions and 90 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Core/Inc/gpio.h
View File

@ -22,7 +22,8 @@
#define __GPIO_H__
#ifdef __cplusplus
extern "C" {
extern "C"
{
#endif
/* Includes ------------------------------------------------------------------*/
@ -65,4 +66,3 @@ void MX_GPIO_Init(void);
}
#endif
#endif /*__ GPIO_H__ */

4
Core/Src/freertos.c
View File

@ -91,7 +91,8 @@ void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackTyp
* @param None
* @retval None
*/
void MX_FREERTOS_Init(void) {
void MX_FREERTOS_Init(void)
{
/* USER CODE BEGIN Init */
/* USER CODE END Init */
@ -136,7 +137,6 @@ void MX_FREERTOS_Init(void) {
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
/* USER CODE END RTOS_THREADS */
}
/* USER CODE BEGIN Header_start_tcp_task */

7
Core/Src/gpio.c
View File

@ -59,12 +59,10 @@ void MX_GPIO_Init(void)
HAL_GPIO_WritePin(GPIOB, LED3_R_Pin | LED3_G_Pin | DAC1_CS_Pin | DAC2_CS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOE, LED3_Y_Pin|LED2_R_Pin|LED2_G_Pin|LED2_Y_Pin
|ADC_CS_Pin|AD7124_SYNC_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOE, LED3_Y_Pin | LED2_R_Pin | LED2_G_Pin | LED2_Y_Pin | ADC_CS_Pin | AD7124_SYNC_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, DO_CH4_Pin|DO_CH3_Pin|DO_CH1_Pin|DO_CH2_Pin
|DO_EN_Pin|HART1_RTS_Pin|HART2_RTS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOD, DO_CH4_Pin | DO_CH3_Pin | DO_CH1_Pin | DO_CH2_Pin | DO_EN_Pin | HART1_RTS_Pin | HART2_RTS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(HART1_RST_GPIO_Port, HART1_RST_Pin, GPIO_PIN_SET);
@ -165,7 +163,6 @@ void MX_GPIO_Init(void)
HAL_NVIC_SetPriority(EXTI3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(EXTI3_IRQn);
}
/* USER CODE BEGIN 2 */

21
MDK-ARM/RTE/_TEST2/RTE_Components.h
View File

@ -1,21 +0,0 @@
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'TEST2'
* Target: 'TEST2'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

19
MDK-ARM/TEST2/TEST2.sct
View File

@ -1,19 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x0001C000 { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM2 0x2001C000 0x00004000 {
.ANY (+RW +ZI)
}
}

26
MDK-ARM/semi-finished_product_testing.uvoptx
View File

@ -117,6 +117,26 @@
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>(105=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
@ -125,7 +145,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U-O142 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
<Name>-U-O142 -O2254 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
@ -173,7 +193,7 @@
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>1</EnableFlashSeq>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
@ -203,7 +223,7 @@
<Group>
<GroupName>Application/User/Core</GroupName>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>