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ETH的MAC地址最后一位和IP地址绑定

This commit is contained in:
wangxujie 2025-04-15 14:53:14 +08:00
parent 821c1b8d0f
commit 7434473b2f
8 changed files with 5388 additions and 9130 deletions
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57
LWIP/App/lwip.c
View File

@ -22,7 +22,7 @@
#include "lwip.h" #include "lwip.h"
#include "lwip/init.h" #include "lwip/init.h"
#include "lwip/netif.h" #include "lwip/netif.h"
#if defined ( __CC_ARM ) /* MDK ARM Compiler */ #if defined(__CC_ARM) /* MDK ARM Compiler */
#include "lwip/sio.h" #include "lwip/sio.h"
#endif /* MDK ARM Compiler */ #endif /* MDK ARM Compiler */
#include "ethernetif.h" #include "ethernetif.h"
@ -53,8 +53,8 @@ uint8_t GATEWAY_ADDRESS[4];
/* USER CODE END 2 */ /* USER CODE END 2 */
/** /**
* LwIP initialization function * LwIP initialization function
*/ */
void MX_LWIP_Init(void) void MX_LWIP_Init(void)
{ {
/* IP addresses initialization */ /* IP addresses initialization */
@ -71,15 +71,15 @@ void MX_LWIP_Init(void)
GATEWAY_ADDRESS[2] = 1; GATEWAY_ADDRESS[2] = 1;
GATEWAY_ADDRESS[3] = 29; GATEWAY_ADDRESS[3] = 29;
/* USER CODE BEGIN IP_ADDRESSES */ /* USER CODE BEGIN IP_ADDRESSES */
/* USER CODE END IP_ADDRESSES */ /* USER CODE END IP_ADDRESSES */
/* Initilialize the LwIP stack with RTOS */ /* Initilialize the LwIP stack with RTOS */
tcpip_init( NULL, NULL ); tcpip_init(NULL, NULL);
/* IP addresses initialization without DHCP (IPv4) */ /* IP addresses initialization without DHCP (IPv4) */
IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]); IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]); IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1], NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]); IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);
/* add the network interface (IPv4/IPv6) with RTOS */ /* add the network interface (IPv4/IPv6) with RTOS */
@ -103,19 +103,19 @@ void MX_LWIP_Init(void)
netif_set_link_callback(&gnetif, ethernet_link_status_updated); netif_set_link_callback(&gnetif, ethernet_link_status_updated);
/* Create the Ethernet link handler thread */ /* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthLink, ethernet_link_thread, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2); osThreadDef(EthLink, ethernet_link_thread, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2);
osThreadCreate(osThread(EthLink), &gnetif); osThreadCreate(osThread(EthLink), &gnetif);
/* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
flash_read_data(FLASH_USER_START_ADDR, IP_ADDRESS, 4); flash_read_data(FLASH_USER_START_ADDR, IP_ADDRESS, 4);
if (IP_ADDRESS[0] == 192) if (IP_ADDRESS[0] == 192)
{ {
IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]); IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
gnetif.ip_addr = ipaddr; gnetif.ip_addr = ipaddr;
} }
/* USER CODE END 3 */ /* USER CODE END 3 */
} }
#ifdef USE_OBSOLETE_USER_CODE_SECTION_4 #ifdef USE_OBSOLETE_USER_CODE_SECTION_4
@ -126,25 +126,25 @@ void MX_LWIP_Init(void)
#endif #endif
/** /**
* @brief Notify the User about the network interface config status * @brief Notify the User about the network interface config status
* @param netif: the network interface * @param netif: the network interface
* @retval None * @retval None
*/ */
static void ethernet_link_status_updated(struct netif *netif) static void ethernet_link_status_updated(struct netif *netif)
{ {
if (netif_is_up(netif)) if (netif_is_up(netif))
{ {
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
/* USER CODE END 5 */ /* USER CODE END 5 */
} }
else /* netif is down */ else /* netif is down */
{ {
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
/* USER CODE END 6 */ /* USER CODE END 6 */
} }
} }
#if defined ( __CC_ARM ) /* MDK ARM Compiler */ #if defined(__CC_ARM) /* MDK ARM Compiler */
/** /**
* Opens a serial device for communication. * Opens a serial device for communication.
* *
@ -155,9 +155,9 @@ sio_fd_t sio_open(u8_t devnum)
{ {
sio_fd_t sd; sio_fd_t sd;
/* USER CODE BEGIN 7 */ /* USER CODE BEGIN 7 */
sd = 0; // dummy code sd = 0; // dummy code
/* USER CODE END 7 */ /* USER CODE END 7 */
return sd; return sd;
} }
@ -172,8 +172,8 @@ sio_fd_t sio_open(u8_t devnum)
*/ */
void sio_send(u8_t c, sio_fd_t fd) void sio_send(u8_t c, sio_fd_t fd)
{ {
/* USER CODE BEGIN 8 */ /* USER CODE BEGIN 8 */
/* USER CODE END 8 */ /* USER CODE END 8 */
} }
/** /**
@ -191,9 +191,9 @@ u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len)
{ {
u32_t recved_bytes; u32_t recved_bytes;
/* USER CODE BEGIN 9 */ /* USER CODE BEGIN 9 */
recved_bytes = 0; // dummy code recved_bytes = 0; // dummy code
/* USER CODE END 9 */ /* USER CODE END 9 */
return recved_bytes; return recved_bytes;
} }
@ -210,10 +210,9 @@ u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len)
{ {
u32_t recved_bytes; u32_t recved_bytes;
/* USER CODE BEGIN 10 */ /* USER CODE BEGIN 10 */
recved_bytes = 0; // dummy code recved_bytes = 0; // dummy code
/* USER CODE END 10 */ /* USER CODE END 10 */
return recved_bytes; return recved_bytes;
} }
#endif /* MDK ARM Compiler */ #endif /* MDK ARM Compiler */

397
LWIP/Target/ethernetif.c
View File

@ -38,7 +38,7 @@
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* The time to block waiting for input. */ /* The time to block waiting for input. */
#define TIME_WAITING_FOR_INPUT ( portMAX_DELAY ) #define TIME_WAITING_FOR_INPUT (portMAX_DELAY)
/* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */ /* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */
/* Stack size of the interface thread */ /* Stack size of the interface thread */
#define INTERFACE_THREAD_STACK_SIZE (350) #define INTERFACE_THREAD_STACK_SIZE (350)
@ -48,8 +48,8 @@
#define IFNAME1 't' #define IFNAME1 't'
/* ETH Setting */ /* ETH Setting */
#define ETH_DMA_TRANSMIT_TIMEOUT ( 20U ) #define ETH_DMA_TRANSMIT_TIMEOUT (20U)
#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U) #define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
@ -81,8 +81,8 @@
/* Data Type Definitions */ /* Data Type Definitions */
typedef enum typedef enum
{ {
RX_ALLOC_OK = 0x00, RX_ALLOC_OK = 0x00,
RX_ALLOC_ERROR = 0x01 RX_ALLOC_ERROR = 0x01
} RxAllocStatusTypeDef; } RxAllocStatusTypeDef;
typedef struct typedef struct
@ -92,40 +92,40 @@ typedef struct
} RxBuff_t; } RxBuff_t;
/* Memory Pool Declaration */ /* Memory Pool Declaration */
#define ETH_RX_BUFFER_CNT 12U #define ETH_RX_BUFFER_CNT 12U
LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool"); LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool");
/* Variable Definitions */ /* Variable Definitions */
static uint8_t RxAllocStatus; static uint8_t RxAllocStatus;
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */ ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */ ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
/* USER CODE END 2 */ /* USER CODE END 2 */
osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */ osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */
osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */ osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */
/* Global Ethernet handle */ /* Global Ethernet handle */
ETH_HandleTypeDef heth; ETH_HandleTypeDef heth;
ETH_TxPacketConfig TxConfig; ETH_TxPacketConfig TxConfig;
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
static void ethernetif_input(void const * argument); static void ethernetif_input(void const *argument);
int32_t ETH_PHY_IO_Init(void); int32_t ETH_PHY_IO_Init(void);
int32_t ETH_PHY_IO_DeInit (void); int32_t ETH_PHY_IO_DeInit(void);
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal); int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal); int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
int32_t ETH_PHY_IO_GetTick(void); int32_t ETH_PHY_IO_GetTick(void);
lan8742_Object_t LAN8742; lan8742_Object_t LAN8742;
lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init, lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
ETH_PHY_IO_DeInit, ETH_PHY_IO_DeInit,
ETH_PHY_IO_WriteReg, ETH_PHY_IO_WriteReg,
ETH_PHY_IO_ReadReg, ETH_PHY_IO_ReadReg,
ETH_PHY_IO_GetTick}; ETH_PHY_IO_GetTick};
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
@ -135,33 +135,33 @@ lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
void pbuf_free_custom(struct pbuf *p); void pbuf_free_custom(struct pbuf *p);
/** /**
* @brief Ethernet Rx Transfer completed callback * @brief Ethernet Rx Transfer completed callback
* @param handlerEth: ETH handler * @param handlerEth: ETH handler
* @retval None * @retval None
*/ */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth) void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{ {
osSemaphoreRelease(RxPktSemaphore); osSemaphoreRelease(RxPktSemaphore);
} }
/** /**
* @brief Ethernet Tx Transfer completed callback * @brief Ethernet Tx Transfer completed callback
* @param handlerEth: ETH handler * @param handlerEth: ETH handler
* @retval None * @retval None
*/ */
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth) void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{ {
osSemaphoreRelease(TxPktSemaphore); osSemaphoreRelease(TxPktSemaphore);
} }
/** /**
* @brief Ethernet DMA transfer error callback * @brief Ethernet DMA transfer error callback
* @param handlerEth: ETH handler * @param handlerEth: ETH handler
* @retval None * @retval None
*/ */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth) void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{ {
if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS) if ((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
{ {
osSemaphoreRelease(RxPktSemaphore); osSemaphoreRelease(RxPktSemaphore);
} }
} }
@ -187,7 +187,7 @@ static void low_level_init(struct netif *netif)
ETH_MACConfigTypeDef MACConf = {0}; ETH_MACConfigTypeDef MACConf = {0};
/* Start ETH HAL Init */ /* Start ETH HAL Init */
uint8_t MACAddr[6] ; uint8_t MACAddr[6];
heth.Instance = ETH; heth.Instance = ETH;
MACAddr[0] = 0x00; MACAddr[0] = 0x00;
MACAddr[1] = 0x80; MACAddr[1] = 0x80;
@ -204,13 +204,13 @@ static void low_level_init(struct netif *netif)
/* USER CODE BEGIN MACADDRESS */ /* USER CODE BEGIN MACADDRESS */
MACAddr[3] = (uint8_t)HAL_GetUIDw0(); MACAddr[3] = (uint8_t)HAL_GetUIDw0();
MACAddr[4] = (uint8_t)HAL_GetUIDw1(); MACAddr[4] = (uint8_t)HAL_GetUIDw1();
MACAddr[5] = (uint8_t)HAL_GetUIDw2(); MACAddr[5] = (netif->ip_addr.addr >> 24) & 0xFF;
heth.Init.MACAddr = &MACAddr[0]; heth.Init.MACAddr = &MACAddr[0];
/* USER CODE END MACADDRESS */ /* USER CODE END MACADDRESS */
hal_eth_init_status = HAL_ETH_Init(&heth); hal_eth_init_status = HAL_ETH_Init(&heth);
memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig)); memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig));
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
@ -226,23 +226,23 @@ static void low_level_init(struct netif *netif)
netif->hwaddr_len = ETH_HWADDR_LEN; netif->hwaddr_len = ETH_HWADDR_LEN;
/* set MAC hardware address */ /* set MAC hardware address */
netif->hwaddr[0] = heth.Init.MACAddr[0]; netif->hwaddr[0] = heth.Init.MACAddr[0];
netif->hwaddr[1] = heth.Init.MACAddr[1]; netif->hwaddr[1] = heth.Init.MACAddr[1];
netif->hwaddr[2] = heth.Init.MACAddr[2]; netif->hwaddr[2] = heth.Init.MACAddr[2];
netif->hwaddr[3] = heth.Init.MACAddr[3]; netif->hwaddr[3] = heth.Init.MACAddr[3];
netif->hwaddr[4] = heth.Init.MACAddr[4]; netif->hwaddr[4] = heth.Init.MACAddr[4];
netif->hwaddr[5] = heth.Init.MACAddr[5]; netif->hwaddr[5] = heth.Init.MACAddr[5];
/* maximum transfer unit */ /* maximum transfer unit */
netif->mtu = ETH_MAX_PAYLOAD; netif->mtu = ETH_MAX_PAYLOAD;
/* Accept broadcast address and ARP traffic */ /* Accept broadcast address and ARP traffic */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
#if LWIP_ARP #if LWIP_ARP
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
#else #else
netif->flags |= NETIF_FLAG_BROADCAST; netif->flags |= NETIF_FLAG_BROADCAST;
#endif /* LWIP_ARP */ #endif /* LWIP_ARP */
/* create a binary semaphore used for informing ethernetif of frame reception */ /* create a binary semaphore used for informing ethernetif of frame reception */
RxPktSemaphore = xSemaphoreCreateBinary(); RxPktSemaphore = xSemaphoreCreateBinary();
@ -251,14 +251,14 @@ static void low_level_init(struct netif *netif)
TxPktSemaphore = xSemaphoreCreateBinary(); TxPktSemaphore = xSemaphoreCreateBinary();
/* create the task that handles the ETH_MAC */ /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE); osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE);
osThreadCreate(osThread(EthIf), netif); osThreadCreate(osThread(EthIf), netif);
/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
/* USER CODE BEGIN PHY_PRE_CONFIG */ /* USER CODE BEGIN PHY_PRE_CONFIG */
/* USER CODE END PHY_PRE_CONFIG */ /* USER CODE END PHY_PRE_CONFIG */
/* Set PHY IO functions */ /* Set PHY IO functions */
LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx); LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx);
@ -270,7 +270,7 @@ static void low_level_init(struct netif *netif)
PHYLinkState = LAN8742_GetLinkState(&LAN8742); PHYLinkState = LAN8742_GetLinkState(&LAN8742);
/* Get link state */ /* Get link state */
if(PHYLinkState <= LAN8742_STATUS_LINK_DOWN) if (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
{ {
netif_set_link_down(netif); netif_set_link_down(netif);
netif_set_down(netif); netif_set_down(netif);
@ -301,21 +301,20 @@ static void low_level_init(struct netif *netif)
break; break;
} }
/* Get MAC Config MAC */ /* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf); HAL_ETH_GetMACConfig(&heth, &MACConf);
MACConf.DuplexMode = duplex; MACConf.DuplexMode = duplex;
MACConf.Speed = speed; MACConf.Speed = speed;
HAL_ETH_SetMACConfig(&heth, &MACConf); HAL_ETH_SetMACConfig(&heth, &MACConf);
HAL_ETH_Start_IT(&heth); HAL_ETH_Start_IT(&heth);
netif_set_up(netif); netif_set_up(netif);
netif_set_link_up(netif); netif_set_link_up(netif);
/* USER CODE BEGIN PHY_POST_CONFIG */ /* USER CODE BEGIN PHY_POST_CONFIG */
/* USER CODE END PHY_POST_CONFIG */ /* USER CODE END PHY_POST_CONFIG */
} }
} }
else else
{ {
@ -323,9 +322,9 @@ static void low_level_init(struct netif *netif)
} }
#endif /* LWIP_ARP || LWIP_ETHERNET */ #endif /* LWIP_ARP || LWIP_ETHERNET */
/* USER CODE BEGIN LOW_LEVEL_INIT */ /* USER CODE BEGIN LOW_LEVEL_INIT */
/* USER CODE END LOW_LEVEL_INIT */ /* USER CODE END LOW_LEVEL_INIT */
} }
/** /**
@ -351,22 +350,22 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
err_t errval = ERR_OK; err_t errval = ERR_OK;
ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0}; ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef)); memset(Txbuffer, 0, ETH_TX_DESC_CNT * sizeof(ETH_BufferTypeDef));
for(q = p; q != NULL; q = q->next) for (q = p; q != NULL; q = q->next)
{ {
if(i >= ETH_TX_DESC_CNT) if (i >= ETH_TX_DESC_CNT)
return ERR_IF; return ERR_IF;
Txbuffer[i].buffer = q->payload; Txbuffer[i].buffer = q->payload;
Txbuffer[i].len = q->len; Txbuffer[i].len = q->len;
if(i>0) if (i > 0)
{ {
Txbuffer[i-1].next = &Txbuffer[i]; Txbuffer[i - 1].next = &Txbuffer[i];
} }
if(q->next == NULL) if (q->next == NULL)
{ {
Txbuffer[i].next = NULL; Txbuffer[i].next = NULL;
} }
@ -381,7 +380,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
pbuf_ref(p); pbuf_ref(p);
HAL_ETH_Transmit_IT(&heth, &TxConfig); HAL_ETH_Transmit_IT(&heth, &TxConfig);
while(osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK) while (osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT) != osOK)
{ {
} }
@ -398,12 +397,12 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
* @param netif the lwip network interface structure for this ethernetif * @param netif the lwip network interface structure for this ethernetif
* @return a pbuf filled with the received packet (including MAC header) * @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error * NULL on memory error
*/ */
static struct pbuf * low_level_input(struct netif *netif) static struct pbuf *low_level_input(struct netif *netif)
{ {
struct pbuf *p = NULL; struct pbuf *p = NULL;
if(RxAllocStatus == RX_ALLOC_OK) if (RxAllocStatus == RX_ALLOC_OK)
{ {
HAL_ETH_ReadData(&heth, (void **)&p); HAL_ETH_ReadData(&heth, (void **)&p);
} }
@ -420,26 +419,26 @@ static struct pbuf * low_level_input(struct netif *netif)
* *
* @param netif the lwip network interface structure for this ethernetif * @param netif the lwip network interface structure for this ethernetif
*/ */
static void ethernetif_input(void const * argument) static void ethernetif_input(void const *argument)
{ {
struct pbuf *p = NULL; struct pbuf *p = NULL;
struct netif *netif = (struct netif *) argument; struct netif *netif = (struct netif *)argument;
for( ;; ) for (;;)
{ {
if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK) if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
{ {
do do
{ {
p = low_level_input( netif ); p = low_level_input(netif);
if (p != NULL) if (p != NULL)
{ {
if (netif->input( p, netif) != ERR_OK ) if (netif->input(p, netif) != ERR_OK)
{ {
pbuf_free(p); pbuf_free(p);
} }
} }
} while(p!=NULL); } while (p != NULL);
} }
} }
} }
@ -456,12 +455,11 @@ static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const
err_t errval; err_t errval;
errval = ERR_OK; errval = ERR_OK;
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
/* USER CODE END 5 */ /* USER CODE END 5 */
return errval; return errval;
} }
#endif /* LWIP_ARP */ #endif /* LWIP_ARP */
@ -524,13 +522,13 @@ err_t ethernetif_init(struct netif *netif)
} }
/** /**
* @brief Custom Rx pbuf free callback * @brief Custom Rx pbuf free callback
* @param pbuf: pbuf to be freed * @param pbuf: pbuf to be freed
* @retval None * @retval None
*/ */
void pbuf_free_custom(struct pbuf *p) void pbuf_free_custom(struct pbuf *p)
{ {
struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p; struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p;
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf); LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
@ -559,19 +557,19 @@ u32_t sys_now(void)
/* USER CODE END 6 */ /* USER CODE END 6 */
/** /**
* @brief Initializes the ETH MSP. * @brief Initializes the ETH MSP.
* @param ethHandle: ETH handle * @param ethHandle: ETH handle
* @retval None * @retval None
*/ */
void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle) void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(ethHandle->Instance==ETH) if (ethHandle->Instance == ETH)
{ {
/* USER CODE BEGIN ETH_MspInit 0 */ /* USER CODE BEGIN ETH_MspInit 0 */
/* USER CODE END ETH_MspInit 0 */ /* USER CODE END ETH_MspInit 0 */
/* Enable Peripheral clock */ /* Enable Peripheral clock */
__HAL_RCC_ETH_CLK_ENABLE(); __HAL_RCC_ETH_CLK_ENABLE();
@ -589,21 +587,21 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
PB12 ------> ETH_TXD0 PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1 PB13 ------> ETH_TXD1
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5; GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH; GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7; GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH; GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13; GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -613,19 +611,19 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
/* Peripheral interrupt init */ /* Peripheral interrupt init */
HAL_NVIC_SetPriority(ETH_IRQn, 5, 0); HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(ETH_IRQn); HAL_NVIC_EnableIRQ(ETH_IRQn);
/* USER CODE BEGIN ETH_MspInit 1 */ /* USER CODE BEGIN ETH_MspInit 1 */
/* USER CODE END ETH_MspInit 1 */ /* USER CODE END ETH_MspInit 1 */
} }
} }
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle) void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
{ {
if(ethHandle->Instance==ETH) if (ethHandle->Instance == ETH)
{ {
/* USER CODE BEGIN ETH_MspDeInit 0 */ /* USER CODE BEGIN ETH_MspDeInit 0 */
/* USER CODE END ETH_MspDeInit 0 */ /* USER CODE END ETH_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_ETH_CLK_DISABLE(); __HAL_RCC_ETH_CLK_DISABLE();
@ -640,18 +638,18 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
PB12 ------> ETH_TXD0 PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1 PB13 ------> ETH_TXD1
*/ */
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5); HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13); HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
/* Peripheral interrupt Deinit*/ /* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(ETH_IRQn); HAL_NVIC_DisableIRQ(ETH_IRQn);
/* USER CODE BEGIN ETH_MspDeInit 1 */ /* USER CODE BEGIN ETH_MspDeInit 1 */
/* USER CODE END ETH_MspDeInit 1 */ /* USER CODE END ETH_MspDeInit 1 */
} }
} }
@ -659,10 +657,10 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
PHI IO Functions PHI IO Functions
*******************************************************************************/ *******************************************************************************/
/** /**
* @brief Initializes the MDIO interface GPIO and clocks. * @brief Initializes the MDIO interface GPIO and clocks.
* @param None * @param None
* @retval 0 if OK, -1 if ERROR * @retval 0 if OK, -1 if ERROR
*/ */
int32_t ETH_PHY_IO_Init(void) int32_t ETH_PHY_IO_Init(void)
{ {
/* We assume that MDIO GPIO configuration is already done /* We assume that MDIO GPIO configuration is already done
@ -676,25 +674,25 @@ int32_t ETH_PHY_IO_Init(void)
} }
/** /**
* @brief De-Initializes the MDIO interface . * @brief De-Initializes the MDIO interface .
* @param None * @param None
* @retval 0 if OK, -1 if ERROR * @retval 0 if OK, -1 if ERROR
*/ */
int32_t ETH_PHY_IO_DeInit (void) int32_t ETH_PHY_IO_DeInit(void)
{ {
return 0; return 0;
} }
/** /**
* @brief Read a PHY register through the MDIO interface. * @brief Read a PHY register through the MDIO interface.
* @param DevAddr: PHY port address * @param DevAddr: PHY port address
* @param RegAddr: PHY register address * @param RegAddr: PHY register address
* @param pRegVal: pointer to hold the register value * @param pRegVal: pointer to hold the register value
* @retval 0 if OK -1 if Error * @retval 0 if OK -1 if Error
*/ */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{ {
if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK) if (HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
{ {
return -1; return -1;
} }
@ -703,15 +701,15 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal
} }
/** /**
* @brief Write a value to a PHY register through the MDIO interface. * @brief Write a value to a PHY register through the MDIO interface.
* @param DevAddr: PHY port address * @param DevAddr: PHY port address
* @param RegAddr: PHY register address * @param RegAddr: PHY register address
* @param RegVal: Value to be written * @param RegVal: Value to be written
* @retval 0 if OK -1 if Error * @retval 0 if OK -1 if Error
*/ */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{ {
if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK) if (HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
{ {
return -1; return -1;
} }
@ -720,84 +718,84 @@ int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
} }
/** /**
* @brief Get the time in millisecons used for internal PHY driver process. * @brief Get the time in millisecons used for internal PHY driver process.
* @retval Time value * @retval Time value
*/ */
int32_t ETH_PHY_IO_GetTick(void) int32_t ETH_PHY_IO_GetTick(void)
{ {
return HAL_GetTick(); return HAL_GetTick();
} }
/** /**
* @brief Check the ETH link state then update ETH driver and netif link accordingly. * @brief Check the ETH link state then update ETH driver and netif link accordingly.
* @retval None * @retval None
*/ */
void ethernet_link_thread(void const * argument) void ethernet_link_thread(void const *argument)
{ {
ETH_MACConfigTypeDef MACConf = {0}; ETH_MACConfigTypeDef MACConf = {0};
int32_t PHYLinkState = 0; int32_t PHYLinkState = 0;
uint32_t linkchanged = 0U, speed = 0U, duplex = 0U; uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
struct netif *netif = (struct netif *) argument; struct netif *netif = (struct netif *)argument;
/* USER CODE BEGIN ETH link init */ /* USER CODE BEGIN ETH link init */
/* USER CODE END ETH link init */ /* USER CODE END ETH link init */
for(;;) for (;;)
{ {
PHYLinkState = LAN8742_GetLinkState(&LAN8742); PHYLinkState = LAN8742_GetLinkState(&LAN8742);
if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)) if (netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
{
HAL_ETH_Stop_IT(&heth);
netif_set_down(netif);
netif_set_link_down(netif);
}
else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
{
switch (PHYLinkState)
{ {
case LAN8742_STATUS_100MBITS_FULLDUPLEX: HAL_ETH_Stop_IT(&heth);
duplex = ETH_FULLDUPLEX_MODE; netif_set_down(netif);
speed = ETH_SPEED_100M; netif_set_link_down(netif);
linkchanged = 1; }
break; else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
case LAN8742_STATUS_100MBITS_HALFDUPLEX: {
duplex = ETH_HALFDUPLEX_MODE; switch (PHYLinkState)
speed = ETH_SPEED_100M; {
linkchanged = 1; case LAN8742_STATUS_100MBITS_FULLDUPLEX:
break; duplex = ETH_FULLDUPLEX_MODE;
case LAN8742_STATUS_10MBITS_FULLDUPLEX: speed = ETH_SPEED_100M;
duplex = ETH_FULLDUPLEX_MODE; linkchanged = 1;
speed = ETH_SPEED_10M; break;
linkchanged = 1; case LAN8742_STATUS_100MBITS_HALFDUPLEX:
break; duplex = ETH_HALFDUPLEX_MODE;
case LAN8742_STATUS_10MBITS_HALFDUPLEX: speed = ETH_SPEED_100M;
duplex = ETH_HALFDUPLEX_MODE; linkchanged = 1;
speed = ETH_SPEED_10M; break;
linkchanged = 1; case LAN8742_STATUS_10MBITS_FULLDUPLEX:
break; duplex = ETH_FULLDUPLEX_MODE;
default: speed = ETH_SPEED_10M;
break; linkchanged = 1;
break;
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
duplex = ETH_HALFDUPLEX_MODE;
speed = ETH_SPEED_10M;
linkchanged = 1;
break;
default:
break;
}
if (linkchanged)
{
/* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf);
MACConf.DuplexMode = duplex;
MACConf.Speed = speed;
HAL_ETH_SetMACConfig(&heth, &MACConf);
HAL_ETH_Start_IT(&heth);
netif_set_up(netif);
netif_set_link_up(netif);
}
} }
if(linkchanged) /* USER CODE BEGIN ETH link Thread core code for User BSP */
{
/* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf);
MACConf.DuplexMode = duplex;
MACConf.Speed = speed;
HAL_ETH_SetMACConfig(&heth, &MACConf);
HAL_ETH_Start_IT(&heth);
netif_set_up(netif);
netif_set_link_up(netif);
}
}
/* USER CODE BEGIN ETH link Thread core code for User BSP */ /* USER CODE END ETH link Thread core code for User BSP */
/* USER CODE END ETH link Thread core code for User BSP */
osDelay(100); osDelay(100);
} }
@ -805,7 +803,7 @@ void ethernet_link_thread(void const * argument)
void HAL_ETH_RxAllocateCallback(uint8_t **buff) void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{ {
/* USER CODE BEGIN HAL ETH RxAllocateCallback */ /* USER CODE BEGIN HAL ETH RxAllocateCallback */
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL); struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
if (p) if (p)
{ {
@ -822,12 +820,12 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buff)
RxAllocStatus = RX_ALLOC_ERROR; RxAllocStatus = RX_ALLOC_ERROR;
*buff = NULL; *buff = NULL;
} }
/* USER CODE END HAL ETH RxAllocateCallback */ /* USER CODE END HAL ETH RxAllocateCallback */
} }
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length) void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{ {
/* USER CODE BEGIN HAL ETH RxLinkCallback */ /* USER CODE BEGIN HAL ETH RxLinkCallback */
struct pbuf **ppStart = (struct pbuf **)pStart; struct pbuf **ppStart = (struct pbuf **)pStart;
struct pbuf **ppEnd = (struct pbuf **)pEnd; struct pbuf **ppEnd = (struct pbuf **)pEnd;
@ -859,19 +857,18 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
p->tot_len += Length; p->tot_len += Length;
} }
/* USER CODE END HAL ETH RxLinkCallback */ /* USER CODE END HAL ETH RxLinkCallback */
} }
void HAL_ETH_TxFreeCallback(uint32_t * buff) void HAL_ETH_TxFreeCallback(uint32_t *buff)
{ {
/* USER CODE BEGIN HAL ETH TxFreeCallback */ /* USER CODE BEGIN HAL ETH TxFreeCallback */
pbuf_free((struct pbuf *)buff); pbuf_free((struct pbuf *)buff);
/* USER CODE END HAL ETH TxFreeCallback */ /* USER CODE END HAL ETH TxFreeCallback */
} }
/* USER CODE BEGIN 8 */ /* USER CODE BEGIN 8 */
/* USER CODE END 8 */ /* USER CODE END 8 */

48
MDK-ARM/DebugConfig/semi-finished_product_testing_STM32F407VGTx.dbgconf
View File

@ -1,48 +0,0 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

3691
MDK-ARM/semi-finished_product_testing.uvguix.Administrator
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File diff suppressed because one or more lines are too long

58
MDK-ARM/semi-finished_product_testing.uvoptx
View File

@ -1,4 +1,4 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> <ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion> <SchemaVersion>1.0</SchemaVersion>
@ -45,7 +45,7 @@
<PageWidth>79</PageWidth> <PageWidth>79</PageWidth>
<PageLength>66</PageLength> <PageLength>66</PageLength>
<TabStop>8</TabStop> <TabStop>8</TabStop>
<ListingPath /> <ListingPath></ListingPath>
</OPTLEX> </OPTLEX>
<ListingPage> <ListingPage>
<CreateCListing>1</CreateCListing> <CreateCListing>1</CreateCListing>
@ -104,16 +104,16 @@
<bSchkAxf>0</bSchkAxf> <bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf> <bTchkAxf>0</bTchkAxf>
<nTsel>6</nTsel> <nTsel>6</nTsel>
<sDll /> <sDll></sDll>
<sDllPa /> <sDllPa></sDllPa>
<sDlgDll /> <sDlgDll></sDlgDll>
<sDlgPa /> <sDlgPa></sDlgPa>
<sIfile /> <sIfile></sIfile>
<tDll /> <tDll></tDll>
<tDllPa /> <tDllPa></tDllPa>
<tDlgDll /> <tDlgDll></tDlgDll>
<tDlgPa /> <tDlgPa></tDlgPa>
<tIfile /> <tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon> <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt> </DebugOpt>
<TargetDriverDllRegistry> <TargetDriverDllRegistry>
@ -130,7 +130,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ARMDBGFLAGS</Key> <Key>ARMDBGFLAGS</Key>
<Name /> <Name></Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -162,8 +162,8 @@
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>0</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c</Filename> <Filename>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c</Filename>
<ExecCommand /> <ExecCommand></ExecCommand>
<Expression /> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
@ -178,8 +178,8 @@
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>0</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename>../Core/Src/main.c</Filename> <Filename>../Core/Src/main.c</Filename>
<ExecCommand /> <ExecCommand></ExecCommand>
<Expression /> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>2</Number> <Number>2</Number>
@ -194,8 +194,8 @@
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>0</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename>../Core/Src/main.c</Filename> <Filename>../Core/Src/main.c</Filename>
<ExecCommand /> <ExecCommand></ExecCommand>
<Expression /> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<WatchWindow1> <WatchWindow1>
@ -297,19 +297,19 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<LintExecutable /> <LintExecutable></LintExecutable>
<LintConfigFile /> <LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto> <bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD> <bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags> <LntExFlags>0</LntExFlags>
<pMisraName /> <pMisraName></pMisraName>
<pszMrule /> <pszMrule></pszMrule>
<pSingCmds /> <pSingCmds></pSingCmds>
<pMultCmds /> <pMultCmds></pMultCmds>
<pMisraNamep /> <pMisraNamep></pMisraNamep>
<pszMrulep /> <pszMrulep></pszMrulep>
<pSingCmdsp /> <pSingCmdsp></pSingCmdsp>
<pMultCmdsp /> <pMultCmdsp></pMultCmdsp>
<DebugDescription> <DebugDescription>
<Enable>0</Enable> <Enable>0</Enable>
<EnableFlashSeq>0</EnableFlashSeq> <EnableFlashSeq>0</EnableFlashSeq>

119
MDK-ARM/semi-finished_product_testing.uvprojx
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@ -1,7 +1,10 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_projx.xsd"> <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion> <SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header> <Header>### uVision Project, (C) Keil Software</Header>
<Targets> <Targets>
<Target> <Target>
<TargetName>semi-finished_product_testing</TargetName> <TargetName>semi-finished_product_testing</TargetName>
@ -13,31 +16,31 @@
<TargetCommonOption> <TargetCommonOption>
<Device>STM32F407VGTx</Device> <Device>STM32F407VGTx</Device>
<Vendor>STMicroelectronics</Vendor> <Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F4xx_DFP.2.17.1</PackID> <PackID>Keil.STM32F4xx_DFP.2.12.0</PackID>
<PackURL>https://www.keil.com/pack/</PackURL> <PackURL>http://www.keil.com/pack</PackURL>
<Cpu>IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ</Cpu> <Cpu>IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ</Cpu>
<FlashUtilSpec /> <FlashUtilSpec></FlashUtilSpec>
<StartupFile /> <StartupFile></StartupFile>
<FlashDriverDll /> <FlashDriverDll></FlashDriverDll>
<DeviceId>0</DeviceId> <DeviceId>0</DeviceId>
<RegisterFile /> <RegisterFile></RegisterFile>
<MemoryEnv /> <MemoryEnv></MemoryEnv>
<Cmp /> <Cmp></Cmp>
<Asm /> <Asm></Asm>
<Linker /> <Linker></Linker>
<OHString /> <OHString></OHString>
<InfinionOptionDll /> <InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc /> <SLE66CMisc></SLE66CMisc>
<SLE66AMisc /> <SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc /> <SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile> <SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile>
<bCustSvd>0</bCustSvd> <bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv> <UseEnv>0</UseEnv>
<BinPath /> <BinPath></BinPath>
<IncludePath /> <IncludePath></IncludePath>
<LibPath /> <LibPath></LibPath>
<RegisterFilePath /> <RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath /> <DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus> <TargetStatus>
<Error>0</Error> <Error>0</Error>
<ExitCodeStop>0</ExitCodeStop> <ExitCodeStop>0</ExitCodeStop>
@ -52,15 +55,15 @@
<CreateHexFile>1</CreateHexFile> <CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation> <DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation> <BrowseInformation>0</BrowseInformation>
<ListingPath /> <ListingPath></ListingPath>
<HexFormatSelection>1</HexFormatSelection> <HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K> <Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile> <CreateBatchFile>0</CreateBatchFile>
<BeforeCompile> <BeforeCompile>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2> <RunUserProg2>0</RunUserProg2>
<UserProg1Name /> <UserProg1Name></UserProg1Name>
<UserProg2Name /> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X> <nStopU1X>0</nStopU1X>
@ -69,8 +72,8 @@
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2> <RunUserProg2>0</RunUserProg2>
<UserProg1Name /> <UserProg1Name></UserProg1Name>
<UserProg2Name /> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X> <nStopB1X>0</nStopB1X>
@ -79,15 +82,15 @@
<AfterMake> <AfterMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2> <RunUserProg2>0</RunUserProg2>
<UserProg1Name /> <UserProg1Name></UserProg1Name>
<UserProg2Name /> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X> <nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X> <nStopA2X>0</nStopA2X>
</AfterMake> </AfterMake>
<SelectedForBatchBuild>1</SelectedForBatchBuild> <SelectedForBatchBuild>1</SelectedForBatchBuild>
<SVCSIdString /> <SVCSIdString></SVCSIdString>
</TargetCommonOption> </TargetCommonOption>
<CommonProperty> <CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler> <UseCPPCompiler>0</UseCPPCompiler>
@ -101,8 +104,8 @@
<AssembleAssemblyFile>0</AssembleAssemblyFile> <AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly> <PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode> <StopOnExitCode>3</StopOnExitCode>
<CustomArgument /> <CustomArgument></CustomArgument>
<IncludeLibraryModules /> <IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg> <ComprImg>0</ComprImg>
</CommonProperty> </CommonProperty>
<DllOption> <DllOption>
@ -136,10 +139,10 @@
<bUseTDR>1</bUseTDR> <bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2V8M.DLL</Flash2> <Flash2>BIN\UL2V8M.DLL</Flash2>
<Flash3>"" ()</Flash3> <Flash3>"" ()</Flash3>
<Flash4 /> <Flash4></Flash4>
<pFcarmOut /> <pFcarmOut></pFcarmOut>
<pFcarmGrp /> <pFcarmGrp></pFcarmGrp>
<pFcArmRoot /> <pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst> <FcArmLst>0</FcArmLst>
</Utilities> </Utilities>
<TargetArmAds> <TargetArmAds>
@ -172,7 +175,7 @@
<RvctClst>0</RvctClst> <RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst> <GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType> <AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName /> <RvctDeviceName></RvctDeviceName>
<mOS>0</mOS> <mOS>0</mOS>
<uocRom>0</uocRom> <uocRom>0</uocRom>
<uocRam>0</uocRam> <uocRam>0</uocRam>
@ -306,7 +309,7 @@
<Size>0x4000</Size> <Size>0x4000</Size>
</OCR_RVCT10> </OCR_RVCT10>
</OnChipMemories> </OnChipMemories>
<RvctStartVector /> <RvctStartVector></RvctStartVector>
</ArmAdsMisc> </ArmAdsMisc>
<Cads> <Cads>
<interw>1</interw> <interw>1</interw>
@ -333,9 +336,9 @@
<v6WtE>0</v6WtE> <v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti> <v6Rtti>0</v6Rtti>
<VariousControls> <VariousControls>
<MiscControls /> <MiscControls></MiscControls>
<Define>USE_HAL_DRIVER,STM32F407xx</Define> <Define>USE_HAL_DRIVER,STM32F407xx</Define>
<Undefine /> <Undefine></Undefine>
<IncludePath>../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/board/inc;../User/driver;../User/system</IncludePath> <IncludePath>../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/board/inc;../User/driver;../User/system</IncludePath>
</VariousControls> </VariousControls>
</Cads> </Cads>
@ -351,9 +354,9 @@
<useXO>0</useXO> <useXO>0</useXO>
<ClangAsOpt>1</ClangAsOpt> <ClangAsOpt>1</ClangAsOpt>
<VariousControls> <VariousControls>
<MiscControls /> <MiscControls></MiscControls>
<Define /> <Define></Define>
<Undefine /> <Undefine></Undefine>
<IncludePath>../Core/Inc</IncludePath> <IncludePath>../Core/Inc</IncludePath>
</VariousControls> </VariousControls>
</Aads> </Aads>
@ -364,15 +367,15 @@
<noStLib>0</noStLib> <noStLib>0</noStLib>
<RepFail>1</RepFail> <RepFail>1</RepFail>
<useFile>0</useFile> <useFile>0</useFile>
<TextAddressRange /> <TextAddressRange></TextAddressRange>
<DataAddressRange /> <DataAddressRange></DataAddressRange>
<pXoBase /> <pXoBase></pXoBase>
<ScatterFile /> <ScatterFile></ScatterFile>
<IncludeLibs /> <IncludeLibs></IncludeLibs>
<IncludeLibsPath /> <IncludeLibsPath></IncludeLibsPath>
<Misc /> <Misc></Misc>
<LinkerInputFile /> <LinkerInputFile></LinkerInputFile>
<DisabledWarnings /> <DisabledWarnings></DisabledWarnings>
</LDads> </LDads>
</TargetArmAds> </TargetArmAds>
</TargetOption> </TargetOption>
@ -1138,18 +1141,20 @@
</Groups> </Groups>
</Target> </Target>
</Targets> </Targets>
<RTE> <RTE>
<apis /> <apis/>
<components> <components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core"> <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0" /> <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos> <targetInfos>
<targetInfo name="semi-finished_product_testing" /> <targetInfo name="semi-finished_product_testing"/>
</targetInfos> </targetInfos>
</component> </component>
</components> </components>
<files /> <files/>
</RTE> </RTE>
<LayerInfo> <LayerInfo>
<Layers> <Layers>
<Layer> <Layer>
@ -1158,5 +1163,5 @@
</Layer> </Layer>
</Layers> </Layers>
</LayerInfo> </LayerInfo>
</Project>
</Project>

2
MDK-ARM/semi-finished_product_testing/ExtDll.iex
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@ -1,2 +0,0 @@
[EXTDLL]
Count=0

10146
MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.hex
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