ETH的MAC地址最后一位和IP地址绑定
This commit is contained in:
wangxujie
parent
821c1b8d0f
commit
7434473b2f
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@ -22,7 +22,7 @@
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#include "lwip.h"
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#include "lwip/init.h"
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#include "lwip/netif.h"
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#if defined ( __CC_ARM ) /* MDK ARM Compiler */
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#if defined(__CC_ARM) /* MDK ARM Compiler */
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#include "lwip/sio.h"
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#endif /* MDK ARM Compiler */
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#include "ethernetif.h"
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@ -53,8 +53,8 @@ uint8_t GATEWAY_ADDRESS[4];
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/* USER CODE END 2 */
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/**
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* LwIP initialization function
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*/
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* LwIP initialization function
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*/
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void MX_LWIP_Init(void)
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{
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/* IP addresses initialization */
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@ -71,15 +71,15 @@ void MX_LWIP_Init(void)
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GATEWAY_ADDRESS[2] = 1;
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GATEWAY_ADDRESS[3] = 29;
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/* USER CODE BEGIN IP_ADDRESSES */
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/* USER CODE END IP_ADDRESSES */
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/* USER CODE BEGIN IP_ADDRESSES */
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/* USER CODE END IP_ADDRESSES */
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/* Initilialize the LwIP stack with RTOS */
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tcpip_init( NULL, NULL );
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tcpip_init(NULL, NULL);
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/* IP addresses initialization without DHCP (IPv4) */
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IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
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IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
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IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1], NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
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IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);
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/* add the network interface (IPv4/IPv6) with RTOS */
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@ -103,19 +103,19 @@ void MX_LWIP_Init(void)
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netif_set_link_callback(&gnetif, ethernet_link_status_updated);
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/* Create the Ethernet link handler thread */
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/* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
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/* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
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osThreadDef(EthLink, ethernet_link_thread, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2);
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osThreadCreate(osThread(EthLink), &gnetif);
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/* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
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/* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
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/* USER CODE BEGIN 3 */
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/* USER CODE BEGIN 3 */
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flash_read_data(FLASH_USER_START_ADDR, IP_ADDRESS, 4);
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if (IP_ADDRESS[0] == 192)
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{
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IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
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gnetif.ip_addr = ipaddr;
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}
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/* USER CODE END 3 */
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/* USER CODE END 3 */
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}
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#ifdef USE_OBSOLETE_USER_CODE_SECTION_4
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@ -126,25 +126,25 @@ void MX_LWIP_Init(void)
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#endif
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/**
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* @brief Notify the User about the network interface config status
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* @param netif: the network interface
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* @retval None
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*/
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* @brief Notify the User about the network interface config status
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* @param netif: the network interface
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* @retval None
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*/
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static void ethernet_link_status_updated(struct netif *netif)
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{
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if (netif_is_up(netif))
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{
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/* USER CODE BEGIN 5 */
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/* USER CODE END 5 */
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/* USER CODE BEGIN 5 */
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/* USER CODE END 5 */
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}
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else /* netif is down */
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{
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/* USER CODE BEGIN 6 */
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/* USER CODE END 6 */
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/* USER CODE BEGIN 6 */
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/* USER CODE END 6 */
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}
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}
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#if defined ( __CC_ARM ) /* MDK ARM Compiler */
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#if defined(__CC_ARM) /* MDK ARM Compiler */
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/**
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* Opens a serial device for communication.
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*
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@ -155,9 +155,9 @@ sio_fd_t sio_open(u8_t devnum)
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{
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sio_fd_t sd;
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/* USER CODE BEGIN 7 */
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/* USER CODE BEGIN 7 */
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sd = 0; // dummy code
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/* USER CODE END 7 */
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/* USER CODE END 7 */
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return sd;
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}
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@ -172,8 +172,8 @@ sio_fd_t sio_open(u8_t devnum)
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*/
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void sio_send(u8_t c, sio_fd_t fd)
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{
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/* USER CODE BEGIN 8 */
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/* USER CODE END 8 */
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/* USER CODE BEGIN 8 */
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/* USER CODE END 8 */
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}
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/**
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@ -191,9 +191,9 @@ u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len)
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{
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u32_t recved_bytes;
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/* USER CODE BEGIN 9 */
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/* USER CODE BEGIN 9 */
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recved_bytes = 0; // dummy code
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/* USER CODE END 9 */
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/* USER CODE END 9 */
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return recved_bytes;
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}
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@ -210,10 +210,9 @@ u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len)
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{
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u32_t recved_bytes;
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/* USER CODE BEGIN 10 */
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/* USER CODE BEGIN 10 */
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recved_bytes = 0; // dummy code
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/* USER CODE END 10 */
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/* USER CODE END 10 */
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return recved_bytes;
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}
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#endif /* MDK ARM Compiler */
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@ -38,7 +38,7 @@
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/* Private define ------------------------------------------------------------*/
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/* The time to block waiting for input. */
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#define TIME_WAITING_FOR_INPUT ( portMAX_DELAY )
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#define TIME_WAITING_FOR_INPUT (portMAX_DELAY)
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/* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */
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/* Stack size of the interface thread */
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#define INTERFACE_THREAD_STACK_SIZE (350)
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@ -48,8 +48,8 @@
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#define IFNAME1 't'
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/* ETH Setting */
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#define ETH_DMA_TRANSMIT_TIMEOUT ( 20U )
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#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
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#define ETH_DMA_TRANSMIT_TIMEOUT (20U)
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#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
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/* USER CODE BEGIN 1 */
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@ -81,8 +81,8 @@
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/* Data Type Definitions */
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typedef enum
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{
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RX_ALLOC_OK = 0x00,
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RX_ALLOC_ERROR = 0x01
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RX_ALLOC_OK = 0x00,
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RX_ALLOC_ERROR = 0x01
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} RxAllocStatusTypeDef;
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typedef struct
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@ -92,40 +92,40 @@ typedef struct
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} RxBuff_t;
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/* Memory Pool Declaration */
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#define ETH_RX_BUFFER_CNT 12U
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#define ETH_RX_BUFFER_CNT 12U
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LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool");
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/* Variable Definitions */
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static uint8_t RxAllocStatus;
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */
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osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */
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osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */
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osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */
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/* Global Ethernet handle */
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ETH_HandleTypeDef heth;
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ETH_TxPacketConfig TxConfig;
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/* Private function prototypes -----------------------------------------------*/
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static void ethernetif_input(void const * argument);
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static void ethernetif_input(void const *argument);
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int32_t ETH_PHY_IO_Init(void);
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int32_t ETH_PHY_IO_DeInit (void);
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int32_t ETH_PHY_IO_DeInit(void);
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
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int32_t ETH_PHY_IO_GetTick(void);
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lan8742_Object_t LAN8742;
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lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
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ETH_PHY_IO_DeInit,
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ETH_PHY_IO_WriteReg,
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ETH_PHY_IO_ReadReg,
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ETH_PHY_IO_GetTick};
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lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
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ETH_PHY_IO_DeInit,
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ETH_PHY_IO_WriteReg,
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ETH_PHY_IO_ReadReg,
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ETH_PHY_IO_GetTick};
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/* USER CODE BEGIN 3 */
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@ -135,33 +135,33 @@ lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
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void pbuf_free_custom(struct pbuf *p);
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/**
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* @brief Ethernet Rx Transfer completed callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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* @brief Ethernet Rx Transfer completed callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
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{
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osSemaphoreRelease(RxPktSemaphore);
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}
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/**
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* @brief Ethernet Tx Transfer completed callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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* @brief Ethernet Tx Transfer completed callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
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{
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osSemaphoreRelease(TxPktSemaphore);
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}
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/**
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* @brief Ethernet DMA transfer error callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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* @brief Ethernet DMA transfer error callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
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{
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if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
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if ((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
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{
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osSemaphoreRelease(RxPktSemaphore);
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osSemaphoreRelease(RxPktSemaphore);
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}
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}
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@ -187,7 +187,7 @@ static void low_level_init(struct netif *netif)
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ETH_MACConfigTypeDef MACConf = {0};
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/* Start ETH HAL Init */
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uint8_t MACAddr[6] ;
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uint8_t MACAddr[6];
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heth.Instance = ETH;
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MACAddr[0] = 0x00;
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MACAddr[1] = 0x80;
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@ -204,13 +204,13 @@ static void low_level_init(struct netif *netif)
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/* USER CODE BEGIN MACADDRESS */
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MACAddr[3] = (uint8_t)HAL_GetUIDw0();
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MACAddr[4] = (uint8_t)HAL_GetUIDw1();
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MACAddr[5] = (uint8_t)HAL_GetUIDw2();
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MACAddr[5] = (netif->ip_addr.addr >> 24) & 0xFF;
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heth.Init.MACAddr = &MACAddr[0];
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/* USER CODE END MACADDRESS */
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hal_eth_init_status = HAL_ETH_Init(&heth);
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memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
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memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig));
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TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
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TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
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TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
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@ -226,23 +226,23 @@ static void low_level_init(struct netif *netif)
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netif->hwaddr_len = ETH_HWADDR_LEN;
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/* set MAC hardware address */
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netif->hwaddr[0] = heth.Init.MACAddr[0];
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netif->hwaddr[1] = heth.Init.MACAddr[1];
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netif->hwaddr[2] = heth.Init.MACAddr[2];
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netif->hwaddr[3] = heth.Init.MACAddr[3];
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netif->hwaddr[4] = heth.Init.MACAddr[4];
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netif->hwaddr[5] = heth.Init.MACAddr[5];
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netif->hwaddr[0] = heth.Init.MACAddr[0];
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netif->hwaddr[1] = heth.Init.MACAddr[1];
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netif->hwaddr[2] = heth.Init.MACAddr[2];
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netif->hwaddr[3] = heth.Init.MACAddr[3];
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netif->hwaddr[4] = heth.Init.MACAddr[4];
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netif->hwaddr[5] = heth.Init.MACAddr[5];
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/* maximum transfer unit */
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netif->mtu = ETH_MAX_PAYLOAD;
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/* Accept broadcast address and ARP traffic */
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/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
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#if LWIP_ARP
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netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
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#else
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netif->flags |= NETIF_FLAG_BROADCAST;
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#endif /* LWIP_ARP */
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/* Accept broadcast address and ARP traffic */
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/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
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#if LWIP_ARP
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netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
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#else
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netif->flags |= NETIF_FLAG_BROADCAST;
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#endif /* LWIP_ARP */
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/* create a binary semaphore used for informing ethernetif of frame reception */
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RxPktSemaphore = xSemaphoreCreateBinary();
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@ -251,14 +251,14 @@ static void low_level_init(struct netif *netif)
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TxPktSemaphore = xSemaphoreCreateBinary();
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/* create the task that handles the ETH_MAC */
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/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
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/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
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osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE);
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osThreadCreate(osThread(EthIf), netif);
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/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
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/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
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/* USER CODE BEGIN PHY_PRE_CONFIG */
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/* USER CODE BEGIN PHY_PRE_CONFIG */
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/* USER CODE END PHY_PRE_CONFIG */
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/* USER CODE END PHY_PRE_CONFIG */
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/* Set PHY IO functions */
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LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx);
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@ -270,7 +270,7 @@ static void low_level_init(struct netif *netif)
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PHYLinkState = LAN8742_GetLinkState(&LAN8742);
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/* Get link state */
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if(PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
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if (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
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{
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netif_set_link_down(netif);
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netif_set_down(netif);
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@ -301,21 +301,20 @@ static void low_level_init(struct netif *netif)
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break;
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}
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/* Get MAC Config MAC */
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HAL_ETH_GetMACConfig(&heth, &MACConf);
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MACConf.DuplexMode = duplex;
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MACConf.Speed = speed;
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HAL_ETH_SetMACConfig(&heth, &MACConf);
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/* Get MAC Config MAC */
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HAL_ETH_GetMACConfig(&heth, &MACConf);
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MACConf.DuplexMode = duplex;
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MACConf.Speed = speed;
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HAL_ETH_SetMACConfig(&heth, &MACConf);
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HAL_ETH_Start_IT(&heth);
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netif_set_up(netif);
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netif_set_link_up(netif);
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HAL_ETH_Start_IT(&heth);
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netif_set_up(netif);
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netif_set_link_up(netif);
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/* USER CODE BEGIN PHY_POST_CONFIG */
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/* USER CODE BEGIN PHY_POST_CONFIG */
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/* USER CODE END PHY_POST_CONFIG */
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/* USER CODE END PHY_POST_CONFIG */
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}
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}
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else
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{
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@ -323,9 +322,9 @@ static void low_level_init(struct netif *netif)
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}
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#endif /* LWIP_ARP || LWIP_ETHERNET */
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/* USER CODE BEGIN LOW_LEVEL_INIT */
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/* USER CODE BEGIN LOW_LEVEL_INIT */
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/* USER CODE END LOW_LEVEL_INIT */
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/* USER CODE END LOW_LEVEL_INIT */
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}
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/**
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@ -351,22 +350,22 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
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err_t errval = ERR_OK;
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ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
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memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
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memset(Txbuffer, 0, ETH_TX_DESC_CNT * sizeof(ETH_BufferTypeDef));
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|
||||
for(q = p; q != NULL; q = q->next)
|
||||
for (q = p; q != NULL; q = q->next)
|
||||
{
|
||||
if(i >= ETH_TX_DESC_CNT)
|
||||
if (i >= ETH_TX_DESC_CNT)
|
||||
return ERR_IF;
|
||||
|
||||
Txbuffer[i].buffer = q->payload;
|
||||
Txbuffer[i].len = q->len;
|
||||
|
||||
if(i>0)
|
||||
if (i > 0)
|
||||
{
|
||||
Txbuffer[i-1].next = &Txbuffer[i];
|
||||
Txbuffer[i - 1].next = &Txbuffer[i];
|
||||
}
|
||||
|
||||
if(q->next == NULL)
|
||||
if (q->next == NULL)
|
||||
{
|
||||
Txbuffer[i].next = NULL;
|
||||
}
|
||||
|
|
@ -381,7 +380,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
|
|||
pbuf_ref(p);
|
||||
|
||||
HAL_ETH_Transmit_IT(&heth, &TxConfig);
|
||||
while(osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
|
||||
while (osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT) != osOK)
|
||||
|
||||
{
|
||||
}
|
||||
|
|
@ -398,12 +397,12 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
|
|||
* @param netif the lwip network interface structure for this ethernetif
|
||||
* @return a pbuf filled with the received packet (including MAC header)
|
||||
* NULL on memory error
|
||||
*/
|
||||
static struct pbuf * low_level_input(struct netif *netif)
|
||||
*/
|
||||
static struct pbuf *low_level_input(struct netif *netif)
|
||||
{
|
||||
struct pbuf *p = NULL;
|
||||
|
||||
if(RxAllocStatus == RX_ALLOC_OK)
|
||||
if (RxAllocStatus == RX_ALLOC_OK)
|
||||
{
|
||||
HAL_ETH_ReadData(&heth, (void **)&p);
|
||||
}
|
||||
|
|
@ -420,26 +419,26 @@ static struct pbuf * low_level_input(struct netif *netif)
|
|||
*
|
||||
* @param netif the lwip network interface structure for this ethernetif
|
||||
*/
|
||||
static void ethernetif_input(void const * argument)
|
||||
static void ethernetif_input(void const *argument)
|
||||
{
|
||||
struct pbuf *p = NULL;
|
||||
struct netif *netif = (struct netif *) argument;
|
||||
struct netif *netif = (struct netif *)argument;
|
||||
|
||||
for( ;; )
|
||||
for (;;)
|
||||
{
|
||||
if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
|
||||
{
|
||||
do
|
||||
{
|
||||
p = low_level_input( netif );
|
||||
p = low_level_input(netif);
|
||||
if (p != NULL)
|
||||
{
|
||||
if (netif->input( p, netif) != ERR_OK )
|
||||
if (netif->input(p, netif) != ERR_OK)
|
||||
{
|
||||
pbuf_free(p);
|
||||
}
|
||||
}
|
||||
} while(p!=NULL);
|
||||
} while (p != NULL);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -456,12 +455,11 @@ static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const
|
|||
err_t errval;
|
||||
errval = ERR_OK;
|
||||
|
||||
/* USER CODE BEGIN 5 */
|
||||
/* USER CODE BEGIN 5 */
|
||||
|
||||
/* USER CODE END 5 */
|
||||
/* USER CODE END 5 */
|
||||
|
||||
return errval;
|
||||
|
||||
}
|
||||
#endif /* LWIP_ARP */
|
||||
|
||||
|
|
@ -524,13 +522,13 @@ err_t ethernetif_init(struct netif *netif)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Custom Rx pbuf free callback
|
||||
* @param pbuf: pbuf to be freed
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Custom Rx pbuf free callback
|
||||
* @param pbuf: pbuf to be freed
|
||||
* @retval None
|
||||
*/
|
||||
void pbuf_free_custom(struct pbuf *p)
|
||||
{
|
||||
struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
|
||||
struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p;
|
||||
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
|
||||
|
||||
/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
|
||||
|
|
@ -559,19 +557,19 @@ u32_t sys_now(void)
|
|||
/* USER CODE END 6 */
|
||||
|
||||
/**
|
||||
* @brief Initializes the ETH MSP.
|
||||
* @param ethHandle: ETH handle
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Initializes the ETH MSP.
|
||||
* @param ethHandle: ETH handle
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
|
||||
void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(ethHandle->Instance==ETH)
|
||||
if (ethHandle->Instance == ETH)
|
||||
{
|
||||
/* USER CODE BEGIN ETH_MspInit 0 */
|
||||
/* USER CODE BEGIN ETH_MspInit 0 */
|
||||
|
||||
/* USER CODE END ETH_MspInit 0 */
|
||||
/* USER CODE END ETH_MspInit 0 */
|
||||
/* Enable Peripheral clock */
|
||||
__HAL_RCC_ETH_CLK_ENABLE();
|
||||
|
||||
|
|
@ -589,21 +587,21 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
|
|||
PB12 ------> ETH_TXD0
|
||||
PB13 ------> ETH_TXD1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
|
|
@ -613,19 +611,19 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
|
|||
/* Peripheral interrupt init */
|
||||
HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(ETH_IRQn);
|
||||
/* USER CODE BEGIN ETH_MspInit 1 */
|
||||
/* USER CODE BEGIN ETH_MspInit 1 */
|
||||
|
||||
/* USER CODE END ETH_MspInit 1 */
|
||||
/* USER CODE END ETH_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
|
||||
void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
|
||||
{
|
||||
if(ethHandle->Instance==ETH)
|
||||
if (ethHandle->Instance == ETH)
|
||||
{
|
||||
/* USER CODE BEGIN ETH_MspDeInit 0 */
|
||||
/* USER CODE BEGIN ETH_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END ETH_MspDeInit 0 */
|
||||
/* USER CODE END ETH_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_ETH_CLK_DISABLE();
|
||||
|
||||
|
|
@ -640,18 +638,18 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
|
|||
PB12 ------> ETH_TXD0
|
||||
PB13 ------> ETH_TXD1
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
|
||||
|
||||
/* Peripheral interrupt Deinit*/
|
||||
HAL_NVIC_DisableIRQ(ETH_IRQn);
|
||||
|
||||
/* USER CODE BEGIN ETH_MspDeInit 1 */
|
||||
/* USER CODE BEGIN ETH_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END ETH_MspDeInit 1 */
|
||||
/* USER CODE END ETH_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -659,10 +657,10 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
|
|||
PHI IO Functions
|
||||
*******************************************************************************/
|
||||
/**
|
||||
* @brief Initializes the MDIO interface GPIO and clocks.
|
||||
* @param None
|
||||
* @retval 0 if OK, -1 if ERROR
|
||||
*/
|
||||
* @brief Initializes the MDIO interface GPIO and clocks.
|
||||
* @param None
|
||||
* @retval 0 if OK, -1 if ERROR
|
||||
*/
|
||||
int32_t ETH_PHY_IO_Init(void)
|
||||
{
|
||||
/* We assume that MDIO GPIO configuration is already done
|
||||
|
|
@ -676,25 +674,25 @@ int32_t ETH_PHY_IO_Init(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief De-Initializes the MDIO interface .
|
||||
* @param None
|
||||
* @retval 0 if OK, -1 if ERROR
|
||||
*/
|
||||
int32_t ETH_PHY_IO_DeInit (void)
|
||||
* @brief De-Initializes the MDIO interface .
|
||||
* @param None
|
||||
* @retval 0 if OK, -1 if ERROR
|
||||
*/
|
||||
int32_t ETH_PHY_IO_DeInit(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read a PHY register through the MDIO interface.
|
||||
* @param DevAddr: PHY port address
|
||||
* @param RegAddr: PHY register address
|
||||
* @param pRegVal: pointer to hold the register value
|
||||
* @retval 0 if OK -1 if Error
|
||||
*/
|
||||
* @brief Read a PHY register through the MDIO interface.
|
||||
* @param DevAddr: PHY port address
|
||||
* @param RegAddr: PHY register address
|
||||
* @param pRegVal: pointer to hold the register value
|
||||
* @retval 0 if OK -1 if Error
|
||||
*/
|
||||
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
|
||||
{
|
||||
if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
|
||||
if (HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
|
@ -703,15 +701,15 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Write a value to a PHY register through the MDIO interface.
|
||||
* @param DevAddr: PHY port address
|
||||
* @param RegAddr: PHY register address
|
||||
* @param RegVal: Value to be written
|
||||
* @retval 0 if OK -1 if Error
|
||||
*/
|
||||
* @brief Write a value to a PHY register through the MDIO interface.
|
||||
* @param DevAddr: PHY port address
|
||||
* @param RegAddr: PHY register address
|
||||
* @param RegVal: Value to be written
|
||||
* @retval 0 if OK -1 if Error
|
||||
*/
|
||||
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
|
||||
{
|
||||
if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
|
||||
if (HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
|
@ -720,84 +718,84 @@ int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Get the time in millisecons used for internal PHY driver process.
|
||||
* @retval Time value
|
||||
*/
|
||||
* @brief Get the time in millisecons used for internal PHY driver process.
|
||||
* @retval Time value
|
||||
*/
|
||||
int32_t ETH_PHY_IO_GetTick(void)
|
||||
{
|
||||
return HAL_GetTick();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check the ETH link state then update ETH driver and netif link accordingly.
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Check the ETH link state then update ETH driver and netif link accordingly.
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void ethernet_link_thread(void const * argument)
|
||||
void ethernet_link_thread(void const *argument)
|
||||
{
|
||||
ETH_MACConfigTypeDef MACConf = {0};
|
||||
int32_t PHYLinkState = 0;
|
||||
uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
|
||||
|
||||
struct netif *netif = (struct netif *) argument;
|
||||
/* USER CODE BEGIN ETH link init */
|
||||
struct netif *netif = (struct netif *)argument;
|
||||
/* USER CODE BEGIN ETH link init */
|
||||
|
||||
/* USER CODE END ETH link init */
|
||||
/* USER CODE END ETH link init */
|
||||
|
||||
for(;;)
|
||||
for (;;)
|
||||
{
|
||||
PHYLinkState = LAN8742_GetLinkState(&LAN8742);
|
||||
PHYLinkState = LAN8742_GetLinkState(&LAN8742);
|
||||
|
||||
if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
|
||||
{
|
||||
HAL_ETH_Stop_IT(&heth);
|
||||
netif_set_down(netif);
|
||||
netif_set_link_down(netif);
|
||||
}
|
||||
else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
|
||||
{
|
||||
switch (PHYLinkState)
|
||||
if (netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
|
||||
{
|
||||
case LAN8742_STATUS_100MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_100MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
HAL_ETH_Stop_IT(&heth);
|
||||
netif_set_down(netif);
|
||||
netif_set_link_down(netif);
|
||||
}
|
||||
else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
|
||||
{
|
||||
switch (PHYLinkState)
|
||||
{
|
||||
case LAN8742_STATUS_100MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_100MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (linkchanged)
|
||||
{
|
||||
/* Get MAC Config MAC */
|
||||
HAL_ETH_GetMACConfig(&heth, &MACConf);
|
||||
MACConf.DuplexMode = duplex;
|
||||
MACConf.Speed = speed;
|
||||
HAL_ETH_SetMACConfig(&heth, &MACConf);
|
||||
HAL_ETH_Start_IT(&heth);
|
||||
netif_set_up(netif);
|
||||
netif_set_link_up(netif);
|
||||
}
|
||||
}
|
||||
|
||||
if(linkchanged)
|
||||
{
|
||||
/* Get MAC Config MAC */
|
||||
HAL_ETH_GetMACConfig(&heth, &MACConf);
|
||||
MACConf.DuplexMode = duplex;
|
||||
MACConf.Speed = speed;
|
||||
HAL_ETH_SetMACConfig(&heth, &MACConf);
|
||||
HAL_ETH_Start_IT(&heth);
|
||||
netif_set_up(netif);
|
||||
netif_set_link_up(netif);
|
||||
}
|
||||
}
|
||||
/* USER CODE BEGIN ETH link Thread core code for User BSP */
|
||||
|
||||
/* USER CODE BEGIN ETH link Thread core code for User BSP */
|
||||
|
||||
/* USER CODE END ETH link Thread core code for User BSP */
|
||||
/* USER CODE END ETH link Thread core code for User BSP */
|
||||
|
||||
osDelay(100);
|
||||
}
|
||||
|
|
@ -805,7 +803,7 @@ void ethernet_link_thread(void const * argument)
|
|||
|
||||
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
|
||||
{
|
||||
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
|
||||
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
|
||||
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
|
||||
if (p)
|
||||
{
|
||||
|
|
@ -822,12 +820,12 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buff)
|
|||
RxAllocStatus = RX_ALLOC_ERROR;
|
||||
*buff = NULL;
|
||||
}
|
||||
/* USER CODE END HAL ETH RxAllocateCallback */
|
||||
/* USER CODE END HAL ETH RxAllocateCallback */
|
||||
}
|
||||
|
||||
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
|
||||
{
|
||||
/* USER CODE BEGIN HAL ETH RxLinkCallback */
|
||||
/* USER CODE BEGIN HAL ETH RxLinkCallback */
|
||||
|
||||
struct pbuf **ppStart = (struct pbuf **)pStart;
|
||||
struct pbuf **ppEnd = (struct pbuf **)pEnd;
|
||||
|
|
@ -859,19 +857,18 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
|
|||
p->tot_len += Length;
|
||||
}
|
||||
|
||||
/* USER CODE END HAL ETH RxLinkCallback */
|
||||
/* USER CODE END HAL ETH RxLinkCallback */
|
||||
}
|
||||
|
||||
void HAL_ETH_TxFreeCallback(uint32_t * buff)
|
||||
void HAL_ETH_TxFreeCallback(uint32_t *buff)
|
||||
{
|
||||
/* USER CODE BEGIN HAL ETH TxFreeCallback */
|
||||
/* USER CODE BEGIN HAL ETH TxFreeCallback */
|
||||
|
||||
pbuf_free((struct pbuf *)buff);
|
||||
|
||||
/* USER CODE END HAL ETH TxFreeCallback */
|
||||
/* USER CODE END HAL ETH TxFreeCallback */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 8 */
|
||||
|
||||
/* USER CODE END 8 */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,48 +0,0 @@
|
|||
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
|
||||
// Version: 1.0.0
|
||||
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
|
||||
// refer to STM32F40x STM32F41x datasheets
|
||||
// refer to STM32F42x STM32F43x datasheets
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <h> Debug MCU configuration register (DBGMCU_CR)
|
||||
// <o.2> DBG_STANDBY <i> Debug Standby Mode
|
||||
// <o.1> DBG_STOP <i> Debug Stop Mode
|
||||
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
|
||||
// </h>
|
||||
DbgMCU_CR = 0x00000007;
|
||||
|
||||
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
|
||||
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
|
||||
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
|
||||
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
|
||||
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
|
||||
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
|
||||
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
|
||||
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
|
||||
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
|
||||
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
|
||||
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
|
||||
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
|
||||
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
|
||||
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
|
||||
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
|
||||
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
|
||||
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB1_Fz = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
|
||||
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
|
||||
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
|
||||
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
|
||||
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB2_Fz = 0x00000000;
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
File diff suppressed because one or more lines are too long
|
|
@ -1,4 +1,4 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
|
@ -45,7 +45,7 @@
|
|||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath />
|
||||
<ListingPath></ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
|
|
@ -104,16 +104,16 @@
|
|||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll />
|
||||
<sDllPa />
|
||||
<sDlgDll />
|
||||
<sDlgPa />
|
||||
<sIfile />
|
||||
<tDll />
|
||||
<tDllPa />
|
||||
<tDlgDll />
|
||||
<tDlgPa />
|
||||
<tIfile />
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
|
|
@ -130,7 +130,7 @@
|
|||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMDBGFLAGS</Key>
|
||||
<Name />
|
||||
<Name></Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
|
|
@ -162,8 +162,8 @@
|
|||
<BreakByAccess>0</BreakByAccess>
|
||||
<BreakIfRCount>0</BreakIfRCount>
|
||||
<Filename>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c</Filename>
|
||||
<ExecCommand />
|
||||
<Expression />
|
||||
<ExecCommand></ExecCommand>
|
||||
<Expression></Expression>
|
||||
</Bp>
|
||||
<Bp>
|
||||
<Number>1</Number>
|
||||
|
|
@ -178,8 +178,8 @@
|
|||
<BreakByAccess>0</BreakByAccess>
|
||||
<BreakIfRCount>0</BreakIfRCount>
|
||||
<Filename>../Core/Src/main.c</Filename>
|
||||
<ExecCommand />
|
||||
<Expression />
|
||||
<ExecCommand></ExecCommand>
|
||||
<Expression></Expression>
|
||||
</Bp>
|
||||
<Bp>
|
||||
<Number>2</Number>
|
||||
|
|
@ -194,8 +194,8 @@
|
|||
<BreakByAccess>0</BreakByAccess>
|
||||
<BreakIfRCount>0</BreakIfRCount>
|
||||
<Filename>../Core/Src/main.c</Filename>
|
||||
<ExecCommand />
|
||||
<Expression />
|
||||
<ExecCommand></ExecCommand>
|
||||
<Expression></Expression>
|
||||
</Bp>
|
||||
</Breakpoint>
|
||||
<WatchWindow1>
|
||||
|
|
@ -297,19 +297,19 @@
|
|||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable />
|
||||
<LintConfigFile />
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName />
|
||||
<pszMrule />
|
||||
<pSingCmds />
|
||||
<pMultCmds />
|
||||
<pMisraNamep />
|
||||
<pszMrulep />
|
||||
<pSingCmdsp />
|
||||
<pMultCmdsp />
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<DebugDescription>
|
||||
<Enable>0</Enable>
|
||||
<EnableFlashSeq>0</EnableFlashSeq>
|
||||
|
|
|
|||
|
|
@ -1,7 +1,10 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_projx.xsd">
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>semi-finished_product_testing</TargetName>
|
||||
|
|
@ -13,31 +16,31 @@
|
|||
<TargetCommonOption>
|
||||
<Device>STM32F407VGTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F4xx_DFP.2.17.1</PackID>
|
||||
<PackURL>https://www.keil.com/pack/</PackURL>
|
||||
<PackID>Keil.STM32F4xx_DFP.2.12.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ</Cpu>
|
||||
<FlashUtilSpec />
|
||||
<StartupFile />
|
||||
<FlashDriverDll />
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile />
|
||||
<MemoryEnv />
|
||||
<Cmp />
|
||||
<Asm />
|
||||
<Linker />
|
||||
<OHString />
|
||||
<InfinionOptionDll />
|
||||
<SLE66CMisc />
|
||||
<SLE66AMisc />
|
||||
<SLE66LinkerMisc />
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath />
|
||||
<IncludePath />
|
||||
<LibPath />
|
||||
<RegisterFilePath />
|
||||
<DBRegisterFilePath />
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
|
|
@ -52,15 +55,15 @@
|
|||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath />
|
||||
<ListingPath></ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
|
|
@ -69,8 +72,8 @@
|
|||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
|
|
@ -79,15 +82,15 @@
|
|||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>1</SelectedForBatchBuild>
|
||||
<SVCSIdString />
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
|
|
@ -101,8 +104,8 @@
|
|||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument />
|
||||
<IncludeLibraryModules />
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
|
|
@ -136,10 +139,10 @@
|
|||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2V8M.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4 />
|
||||
<pFcarmOut />
|
||||
<pFcarmGrp />
|
||||
<pFcArmRoot />
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
|
|
@ -172,7 +175,7 @@
|
|||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName />
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
|
|
@ -306,7 +309,7 @@
|
|||
<Size>0x4000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector />
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
|
|
@ -333,9 +336,9 @@
|
|||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls />
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,STM32F407xx</Define>
|
||||
<Undefine />
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/board/inc;../User/driver;../User/system</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
|
|
@ -351,9 +354,9 @@
|
|||
<useXO>0</useXO>
|
||||
<ClangAsOpt>1</ClangAsOpt>
|
||||
<VariousControls>
|
||||
<MiscControls />
|
||||
<Define />
|
||||
<Undefine />
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>../Core/Inc</IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
|
|
@ -364,15 +367,15 @@
|
|||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange />
|
||||
<DataAddressRange />
|
||||
<pXoBase />
|
||||
<ScatterFile />
|
||||
<IncludeLibs />
|
||||
<IncludeLibsPath />
|
||||
<Misc />
|
||||
<LinkerInputFile />
|
||||
<DisabledWarnings />
|
||||
<TextAddressRange></TextAddressRange>
|
||||
<DataAddressRange></DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
|
|
@ -1138,18 +1141,20 @@
|
|||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis />
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0" />
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="semi-finished_product_testing" />
|
||||
<targetInfo name="semi-finished_product_testing"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files />
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
|
|
@ -1158,5 +1163,5 @@
|
|||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
</Project>
|
||||
|
||||
</Project>
|
||||
|
|
|
|||
|
|
@ -1,2 +0,0 @@
|
|||
[EXTDLL]
|
||||
Count=0
|
||||
File diff suppressed because it is too large
Load Diff
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Reference in New Issue