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串口接收噪音干扰导致进入接收错误中断

This commit is contained in:
王绪洁 2025-04-02 11:51:00 +08:00
parent b0bc99da14
commit e586a22976
16 changed files with 6321 additions and 6376 deletions
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399
Core/Inc/stm32f4xx_hal_conf.h
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@ -25,8 +25,7 @@
#define __STM32F4xx_HAL_CONF_H #define __STM32F4xx_HAL_CONF_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" extern "C" {
{
#endif #endif
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
@ -34,8 +33,8 @@ extern "C"
/* ########################## Module Selection ############################## */ /* ########################## Module Selection ############################## */
/** /**
* @brief This is the list of modules to be used in the HAL driver * @brief This is the list of modules to be used in the HAL driver
*/ */
#define HAL_MODULE_ENABLED #define HAL_MODULE_ENABLED
/* #define HAL_CRYP_MODULE_ENABLED */ /* #define HAL_CRYP_MODULE_ENABLED */
@ -92,114 +91,114 @@ extern "C"
/* ########################## HSE/HSI Values adaptation ##################### */ /* ########################## HSE/HSI Values adaptation ##################### */
/** /**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency * This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL). * (when HSE is used as system clock source, directly or through the PLL).
*/ */
#if !defined(HSE_VALUE) #if !defined (HSE_VALUE)
#define HSE_VALUE 11059200U /*!< Value of the External oscillator in Hz */ #define HSE_VALUE 11059200U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */ #endif /* HSE_VALUE */
#if !defined(HSE_STARTUP_TIMEOUT) #if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */ #endif /* HSE_STARTUP_TIMEOUT */
/** /**
* @brief Internal High Speed oscillator (HSI) value. * @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency * This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL). * (when HSI is used as system clock source, directly or through the PLL).
*/ */
#if !defined(HSI_VALUE) #if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */ #endif /* HSI_VALUE */
/** /**
* @brief Internal Low Speed oscillator (LSI) value. * @brief Internal Low Speed oscillator (LSI) value.
*/ */
#if !defined(LSI_VALUE) #if !defined (LSI_VALUE)
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/ #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz \ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations \ The real value may vary depending on the variations
in voltage and temperature.*/ in voltage and temperature.*/
/** /**
* @brief External Low Speed oscillator (LSE) value. * @brief External Low Speed oscillator (LSE) value.
*/ */
#if !defined(LSE_VALUE) #if !defined (LSE_VALUE)
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */ #endif /* LSE_VALUE */
#if !defined(LSE_STARTUP_TIMEOUT) #if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */ #endif /* LSE_STARTUP_TIMEOUT */
/** /**
* @brief External clock source for I2S peripheral * @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source * This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad. * frequency, this source is inserted directly through I2S_CKIN pad.
*/ */
#if !defined(EXTERNAL_CLOCK_VALUE) #if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External audio frequency in Hz*/ #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External audio frequency in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */ #endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE, /* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */ === you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */ /* ########################### System Configuration ######################### */
/** /**
* @brief This is the HAL system configuration section * @brief This is the HAL system configuration section
*/ */
#define VDD_VALUE 3300U /*!< Value of VDD in mv */ #define VDD_VALUE 3300U /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY 15U /*!< tick interrupt priority */ #define TICK_INT_PRIORITY 15U /*!< tick interrupt priority */
#define USE_RTOS 0U #define USE_RTOS 0U
#define PREFETCH_ENABLE 1U #define PREFETCH_ENABLE 1U
#define INSTRUCTION_CACHE_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U #define DATA_CACHE_ENABLE 1U
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ #define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ #define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ #define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ #define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ #define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ #define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ #define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ #define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ #define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ #define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ #define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ #define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ #define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */ #define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
#define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */ #define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ #define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ #define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ #define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ #define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ #define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ #define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ #define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ #define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ #define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ #define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ #define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ #define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ #define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ #define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ #define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ #define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ #define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ #define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ #define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ #define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ #define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ #define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ #define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ #define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
/* ########################## Assert Selection ############################## */ /* ########################## Assert Selection ############################## */
/** /**
* @brief Uncomment the line below to expanse the "assert_param" macro in the * @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code * HAL drivers code
*/ */
/* #define USE_FULL_ASSERT 1U */ /* #define USE_FULL_ASSERT 1U */
/* ################## Ethernet peripheral configuration ##################### */ /* ################## Ethernet peripheral configuration ##################### */
@ -207,286 +206,286 @@ extern "C"
/* Section 1 : Ethernet peripheral configuration */ /* Section 1 : Ethernet peripheral configuration */
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
#define MAC_ADDR0 2U #define MAC_ADDR0 2U
#define MAC_ADDR1 0U #define MAC_ADDR1 0U
#define MAC_ADDR2 0U #define MAC_ADDR2 0U
#define MAC_ADDR3 0U #define MAC_ADDR3 0U
#define MAC_ADDR4 0U #define MAC_ADDR4 0U
#define MAC_ADDR5 0U #define MAC_ADDR5 0U
/* Definition of the Ethernet driver buffers size and count */ /* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE 1536 /* buffer size for receive */ #define ETH_RX_BUF_SIZE 1536 /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ #define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */ /* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/ /* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U #define DP83848_PHY_ADDRESS 0x01U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY 0x000000FFU #define PHY_RESET_DELAY 0x000000FFU
/* PHY Configuration delay */ /* PHY Configuration delay */
#define PHY_CONFIG_DELAY 0x00000FFFU #define PHY_CONFIG_DELAY 0x00000FFFU
#define PHY_READ_TO 0x0000FFFFU #define PHY_READ_TO 0x0000FFFFU
#define PHY_WRITE_TO 0x0000FFFFU #define PHY_WRITE_TO 0x0000FFFFU
/* Section 3: Common PHY Registers */ /* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ #define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ #define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ #define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ #define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ #define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ #define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ #define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ #define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */ /* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ #define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
/* ################## SPI peripheral configuration ########################## */ /* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver * Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver * Deactivated: CRC code cleaned from driver
*/ */
#define USE_SPI_CRC 0U #define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
/** /**
* @brief Include module's header file * @brief Include module's header file
*/ */
#ifdef HAL_RCC_MODULE_ENABLED #ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f4xx_hal_rcc.h" #include "stm32f4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */ #endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED #ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f4xx_hal_gpio.h" #include "stm32f4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */ #endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED #ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f4xx_hal_exti.h" #include "stm32f4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */ #endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED #ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f4xx_hal_dma.h" #include "stm32f4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */ #endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED #ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f4xx_hal_cortex.h" #include "stm32f4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */ #endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED #ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f4xx_hal_adc.h" #include "stm32f4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */ #endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED #ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f4xx_hal_can.h" #include "stm32f4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */ #endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED #ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_can_legacy.h" #include "stm32f4xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED #ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f4xx_hal_crc.h" #include "stm32f4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */ #endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED #ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32f4xx_hal_cryp.h" #include "stm32f4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */ #endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED #ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32f4xx_hal_dma2d.h" #include "stm32f4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */ #endif /* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED #ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f4xx_hal_dac.h" #include "stm32f4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */ #endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED #ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32f4xx_hal_dcmi.h" #include "stm32f4xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */ #endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED #ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f4xx_hal_eth.h" #include "stm32f4xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */ #endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED #ifdef HAL_ETH_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_eth_legacy.h" #include "stm32f4xx_hal_eth_legacy.h"
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */ #endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED #ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f4xx_hal_flash.h" #include "stm32f4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */ #endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED #ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sram.h" #include "stm32f4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */ #endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED #ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f4xx_hal_nor.h" #include "stm32f4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */ #endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED #ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f4xx_hal_nand.h" #include "stm32f4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */ #endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED #ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f4xx_hal_pccard.h" #include "stm32f4xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */ #endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED #ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sdram.h" #include "stm32f4xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */ #endif /* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED #ifdef HAL_HASH_MODULE_ENABLED
#include "stm32f4xx_hal_hash.h" #include "stm32f4xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */ #endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED #ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f4xx_hal_i2c.h" #include "stm32f4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */ #endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED #ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_smbus.h" #include "stm32f4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */ #endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED #ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f4xx_hal_i2s.h" #include "stm32f4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */ #endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED #ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f4xx_hal_iwdg.h" #include "stm32f4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */ #endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED #ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32f4xx_hal_ltdc.h" #include "stm32f4xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */ #endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED #ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f4xx_hal_pwr.h" #include "stm32f4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */ #endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED #ifdef HAL_RNG_MODULE_ENABLED
#include "stm32f4xx_hal_rng.h" #include "stm32f4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */ #endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED #ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f4xx_hal_rtc.h" #include "stm32f4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */ #endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED #ifdef HAL_SAI_MODULE_ENABLED
#include "stm32f4xx_hal_sai.h" #include "stm32f4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */ #endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED #ifdef HAL_SD_MODULE_ENABLED
#include "stm32f4xx_hal_sd.h" #include "stm32f4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */ #endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED #ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f4xx_hal_spi.h" #include "stm32f4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */ #endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED #ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f4xx_hal_tim.h" #include "stm32f4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */ #endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED #ifdef HAL_UART_MODULE_ENABLED
#include "stm32f4xx_hal_uart.h" #include "stm32f4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */ #endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED #ifdef HAL_USART_MODULE_ENABLED
#include "stm32f4xx_hal_usart.h" #include "stm32f4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */ #endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED #ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f4xx_hal_irda.h" #include "stm32f4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */ #endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED #ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f4xx_hal_smartcard.h" #include "stm32f4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */ #endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED #ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f4xx_hal_wwdg.h" #include "stm32f4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */ #endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED #ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f4xx_hal_pcd.h" #include "stm32f4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */ #endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED #ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f4xx_hal_hcd.h" #include "stm32f4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */ #endif /* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED #ifdef HAL_DSI_MODULE_ENABLED
#include "stm32f4xx_hal_dsi.h" #include "stm32f4xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */ #endif /* HAL_DSI_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED #ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32f4xx_hal_qspi.h" #include "stm32f4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */ #endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED #ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f4xx_hal_cec.h" #include "stm32f4xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */ #endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_FMPI2C_MODULE_ENABLED #ifdef HAL_FMPI2C_MODULE_ENABLED
#include "stm32f4xx_hal_fmpi2c.h" #include "stm32f4xx_hal_fmpi2c.h"
#endif /* HAL_FMPI2C_MODULE_ENABLED */ #endif /* HAL_FMPI2C_MODULE_ENABLED */
#ifdef HAL_FMPSMBUS_MODULE_ENABLED #ifdef HAL_FMPSMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_fmpsmbus.h" #include "stm32f4xx_hal_fmpsmbus.h"
#endif /* HAL_FMPSMBUS_MODULE_ENABLED */ #endif /* HAL_FMPSMBUS_MODULE_ENABLED */
#ifdef HAL_SPDIFRX_MODULE_ENABLED #ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32f4xx_hal_spdifrx.h" #include "stm32f4xx_hal_spdifrx.h"
#endif /* HAL_SPDIFRX_MODULE_ENABLED */ #endif /* HAL_SPDIFRX_MODULE_ENABLED */
#ifdef HAL_DFSDM_MODULE_ENABLED #ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32f4xx_hal_dfsdm.h" #include "stm32f4xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */ #endif /* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED #ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32f4xx_hal_lptim.h" #include "stm32f4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */ #endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED #ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f4xx_hal_mmc.h" #include "stm32f4xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */ #endif /* HAL_MMC_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
/** /**
* @brief The assert_param macro is used for function's parameters check. * @brief The assert_param macro is used for function's parameters check.
* @param expr If expr is false, it calls assert_failed function * @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source * which reports the name of the source file and the source
* line number of the call that failed. * line number of the call that failed.
* If expr is true, it returns no value. * If expr is true, it returns no value.
* @retval None * @retval None
*/ */
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */ /* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t *file, uint32_t line); void assert_failed(uint8_t* file, uint32_t line);
#else #else
#define assert_param(expr) ((void)0U) #define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */ #endif /* USE_FULL_ASSERT */
#ifdef __cplusplus #ifdef __cplusplus

1
Core/Inc/stm32f4xx_it.h
View File

@ -71,7 +71,6 @@ void UART4_IRQHandler(void);
void UART5_IRQHandler(void); void UART5_IRQHandler(void);
void DMA2_Stream2_IRQHandler(void); void DMA2_Stream2_IRQHandler(void);
void ETH_IRQHandler(void); void ETH_IRQHandler(void);
void ETH_WKUP_IRQHandler(void);
void DMA2_Stream7_IRQHandler(void); void DMA2_Stream7_IRQHandler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */

38
Core/Src/dma.c
View File

@ -1,21 +1,21 @@
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file dma.c * @file dma.c
* @brief This file provides code for the configuration * @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers. * of all the requested memory to memory DMA transfers.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* Copyright (c) 2025 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved. * All rights reserved.
* *
* This software is licensed under terms that can be found in the LICENSE file * This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component. * in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS. * If no LICENSE file comes with this software, it is provided AS-IS.
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */ /* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -34,8 +34,8 @@
/* USER CODE END 1 */ /* USER CODE END 1 */
/** /**
* Enable DMA controller clock * Enable DMA controller clock
*/ */
void MX_DMA_Init(void) void MX_DMA_Init(void)
{ {
@ -74,10 +74,8 @@ void MX_DMA_Init(void)
/* DMA2_Stream7_IRQn interrupt configuration */ /* DMA2_Stream7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0); HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
} }
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
/* USER CODE END 2 */ /* USER CODE END 2 */

42
Core/Src/freertos.c
View File

@ -80,18 +80,18 @@ extern struct tcp_pcb *server_pcb_control;
extern void tcp_abort(struct tcp_pcb *pcb); extern void tcp_abort(struct tcp_pcb *pcb);
/* USER CODE END FunctionPrototypes */ /* USER CODE END FunctionPrototypes */
void start_tcp_task(void const *argument); void start_tcp_task(void const * argument);
void start_led_toggle_task(void const *argument); void start_led_toggle_task(void const * argument);
void start_dac_task(void const *argument); void start_dac_task(void const * argument);
void start_adc_task(void const *argument); void start_adc_task(void const * argument);
void start_gpio_di_do_task(void const *argument); void start_gpio_di_do_task(void const * argument);
void start_ec11_task(void const *argument); void start_ec11_task(void const * argument);
extern void MX_LWIP_Init(void); extern void MX_LWIP_Init(void);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* GetIdleTaskMemory prototype (linked to static allocation support) */ /* GetIdleTaskMemory prototype (linked to static allocation support) */
void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize); void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */ /* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer; static StaticTask_t xIdleTaskTCBBuffer;
@ -107,12 +107,11 @@ void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackTyp
/* USER CODE END GET_IDLE_TASK_MEMORY */ /* USER CODE END GET_IDLE_TASK_MEMORY */
/** /**
* @brief FreeRTOS initialization * @brief FreeRTOS initialization
* @param None * @param None
* @retval None * @retval None
*/ */
void MX_FREERTOS_Init(void) void MX_FREERTOS_Init(void) {
{
/* USER CODE BEGIN Init */ /* USER CODE BEGIN Init */
/* USER CODE END Init */ /* USER CODE END Init */
@ -161,6 +160,7 @@ void MX_FREERTOS_Init(void)
/* USER CODE BEGIN RTOS_THREADS */ /* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */ /* add threads, ... */
/* USER CODE END RTOS_THREADS */ /* USER CODE END RTOS_THREADS */
} }
/* USER CODE BEGIN Header_start_tcp_task */ /* USER CODE BEGIN Header_start_tcp_task */
@ -170,7 +170,7 @@ void MX_FREERTOS_Init(void)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_tcp_task */ /* USER CODE END Header_start_tcp_task */
void start_tcp_task(void const *argument) void start_tcp_task(void const * argument)
{ {
/* init code for LWIP */ /* init code for LWIP */
MX_LWIP_Init(); MX_LWIP_Init();
@ -244,7 +244,7 @@ void start_tcp_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_led_toggle_task */ /* USER CODE END Header_start_led_toggle_task */
void start_led_toggle_task(void const *argument) void start_led_toggle_task(void const * argument)
{ {
/* USER CODE BEGIN start_led_toggle_task */ /* USER CODE BEGIN start_led_toggle_task */
/* Infinite loop */ /* Infinite loop */
@ -265,14 +265,14 @@ void start_led_toggle_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_dac_task */ /* USER CODE END Header_start_dac_task */
void start_dac_task(void const *argument) void start_dac_task(void const * argument)
{ {
/* USER CODE BEGIN start_dac_task */ /* USER CODE BEGIN start_dac_task */
dac161s997_init(); dac161s997_init();
/* Infinite loop */ /* Infinite loop */
for (;;) for (;;)
{ {
osThreadSuspend(adc_taskHandle); // 暂停ADC任务，防止DAC采集时产生干<EFBFBD>???????,因为ADC和DAC采用的是同一路SPI，但是时序不<E5BA8F>??????? osThreadSuspend(adc_taskHandle); // æš‚å<EFBFBD>œADC任务，防止DAC采集时产生干ï¿????????,因为ADCå’ŒDAC采用的是å<C2AF>Œä¸€è·¯SPI，但是时åº<C3A5>ä¸<C3A4>ï¿????????
dac161s997_output(DAC161S997_1, current_buff[0]); dac161s997_output(DAC161S997_1, current_buff[0]);
dac161s997_output(DAC161S997_2, current_buff[1]); dac161s997_output(DAC161S997_2, current_buff[1]);
osThreadResume(adc_taskHandle); osThreadResume(adc_taskHandle);
@ -288,14 +288,14 @@ void start_dac_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_adc_task */ /* USER CODE END Header_start_adc_task */
void start_adc_task(void const *argument) void start_adc_task(void const * argument)
{ {
/* USER CODE BEGIN start_adc_task */ /* USER CODE BEGIN start_adc_task */
ad7124_setup(); ad7124_setup();
/* Infinite loop */ /* Infinite loop */
for (;;) for (;;)
{ {
osThreadSuspend(dac_taskHandle); // 暂停DAC任务，防止ADC采集时产生干<EFBFBD>???????,因为ADC和DAC采用的是同一路SPI，但是时序不<E5BA8F>??????? osThreadSuspend(dac_taskHandle); // æš‚å<EFBFBD>œDAC任务，防止ADC采集时产生干ï¿????????,因为ADCå’ŒDAC采用的是å<C2AF>Œä¸€è·¯SPI，但是时åº<C3A5>ä¸<C3A4>ï¿????????
uint8_t ch = 0; uint8_t ch = 0;
for (ch = STOP_NC_ADC; ch < AD7124_CHANNEL_EN_MAX; ch++) for (ch = STOP_NC_ADC; ch < AD7124_CHANNEL_EN_MAX; ch++)
{ {
@ -315,7 +315,7 @@ void start_adc_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_gpio_di_do_task */ /* USER CODE END Header_start_gpio_di_do_task */
void start_gpio_di_do_task(void const *argument) void start_gpio_di_do_task(void const * argument)
{ {
/* USER CODE BEGIN start_gpio_di_do_task */ /* USER CODE BEGIN start_gpio_di_do_task */
/* Infinite loop */ /* Infinite loop */
@ -334,7 +334,7 @@ void start_gpio_di_do_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_ec11_task */ /* USER CODE END Header_start_ec11_task */
void start_ec11_task(void const *argument) void start_ec11_task(void const * argument)
{ {
/* USER CODE BEGIN start_ec11_task */ /* USER CODE BEGIN start_ec11_task */
/* Infinite loop */ /* Infinite loop */

89
Core/Src/main.c
View File

@ -82,14 +82,20 @@ uint8_t tcp_echo_flags_ble2 = 0;
uint8_t tcp_echo_flags_control = 0; uint8_t tcp_echo_flags_control = 0;
uint8_t send_data_flag_cmd = 0; uint8_t send_data_flag_cmd = 0;
// TEST
// uint8_t data_flag = 0;
// uint32_t receive_times1 = 0;
// uint32_t receive_times2 = 0;
// ENDTEST
extern struct netif gnetif; extern struct netif gnetif;
extern ip4_addr_t ipaddr; extern ip4_addr_t ipaddr;
/* USER CODE END 0 */ /* USER CODE END 0 */
/** /**
* @brief The application entry point. * @brief The application entry point.
* @retval int * @retval int
*/ */
int main(void) int main(void)
{ {
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
@ -164,22 +170,22 @@ int main(void)
} }
/** /**
* @brief System Clock Configuration * @brief System Clock Configuration
* @retval None * @retval None
*/ */
void SystemClock_Config(void) void SystemClock_Config(void)
{ {
RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage /** Configure the main internal regulator output voltage
*/ */
__HAL_RCC_PWR_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters /** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure. * in the RCC_OscInitTypeDef structure.
*/ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@ -194,9 +200,8 @@ void SystemClock_Config(void)
} }
/** Initializes the CPU, AHB and APB buses clocks /** Initializes the CPU, AHB and APB buses clocks
*/ */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
@ -209,7 +214,27 @@ void SystemClock_Config(void)
} }
/* USER CODE BEGIN 4 */ /* USER CODE BEGIN 4 */
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
if (huart == &huart5)
{
__HAL_UNLOCK(huart);
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE))
{
__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_NE); // 清除错误标志
}
HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp));
}
if (huart == &huart2)
{
__HAL_UNLOCK(huart);
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE))
{
__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_NE); // 清除错误标志
}
HAL_UARTEx_ReceiveToIdle_DMA(&huart2, hart2_uart2.rx_data_temp, ARRAY_LEN(hart2_uart2.rx_data_temp));
}
}
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
{ {
if (huart == &huart1) if (huart == &huart1)
@ -273,6 +298,7 @@ void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
user_send_data_hart1(hart1_uart5.rx_data, Size); user_send_data_hart1(hart1_uart5.rx_data, Size);
} }
HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp)); HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp));
memset(hart1_uart5.rx_data_temp, 0, ARRAY_LEN(hart1_uart5.rx_data_temp));
} }
if (huart == &huart2) if (huart == &huart2)
{ {
@ -328,19 +354,20 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
/* USER CODE END 4 */ /* USER CODE END 4 */
/** /**
* @brief Period elapsed callback in non blocking mode * @brief Period elapsed callback in non blocking mode
* @note This function is called when TIM4 interrupt took place, inside * @note This function is called when TIM4 interrupt took place, inside
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
* a global variable "uwTick" used as application time base. * a global variable "uwTick" used as application time base.
* @param htim : TIM handle * @param htim : TIM handle
* @retval None * @retval None
*/ */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{ {
/* USER CODE BEGIN Callback 0 */ /* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */ /* USER CODE END Callback 0 */
if (htim->Instance == TIM4) { if (htim->Instance == TIM4)
{
HAL_IncTick(); HAL_IncTick();
} }
/* USER CODE BEGIN Callback 1 */ /* USER CODE BEGIN Callback 1 */
@ -349,9 +376,9 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
} }
/** /**
* @brief This function is executed in case of error occurrence. * @brief This function is executed in case of error occurrence.
* @retval None * @retval None
*/ */
void Error_Handler(void) void Error_Handler(void)
{ {
/* USER CODE BEGIN Error_Handler_Debug */ /* USER CODE BEGIN Error_Handler_Debug */
@ -363,14 +390,14 @@ void Error_Handler(void)
/* USER CODE END Error_Handler_Debug */ /* USER CODE END Error_Handler_Debug */
} }
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
/** /**
* @brief Reports the name of the source file and the source line number * @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred. * where the assert_param error has occurred.
* @param file: pointer to the source file name * @param file: pointer to the source file name
* @param line: assert_param error line source number * @param line: assert_param error line source number
* @retval None * @retval None
*/ */
void assert_failed(uint8_t *file, uint32_t line) void assert_failed(uint8_t *file, uint32_t line)
{ {
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */

14
Core/Src/stm32f4xx_it.c
View File

@ -455,20 +455,6 @@ void ETH_IRQHandler(void)
/* USER CODE END ETH_IRQn 1 */ /* USER CODE END ETH_IRQn 1 */
} }
/**
* @brief This function handles Ethernet wake-up interrupt through EXTI line 19.
*/
void ETH_WKUP_IRQHandler(void)
{
/* USER CODE BEGIN ETH_WKUP_IRQn 0 */
/* USER CODE END ETH_WKUP_IRQn 0 */
HAL_ETH_IRQHandler(&heth);
/* USER CODE BEGIN ETH_WKUP_IRQn 1 */
/* USER CODE END ETH_WKUP_IRQn 1 */
}
/** /**
* @brief This function handles DMA2 stream7 global interrupt. * @brief This function handles DMA2 stream7 global interrupt.
*/ */

145
Core/Src/usart.c
View File

@ -66,7 +66,6 @@ void MX_UART4_Init(void)
/* USER CODE BEGIN UART4_Init 2 */ /* USER CODE BEGIN UART4_Init 2 */
//__HAL_UART_ENABLE_IT(&huart4, UART_IT_IDLE); // 使能IDLE中断 //__HAL_UART_ENABLE_IT(&huart4, UART_IT_IDLE); // 使能IDLE中断
/* USER CODE END UART4_Init 2 */ /* USER CODE END UART4_Init 2 */
} }
/* UART5 init function */ /* UART5 init function */
void MX_UART5_Init(void) void MX_UART5_Init(void)
@ -95,7 +94,6 @@ void MX_UART5_Init(void)
// __HAL_UART_ENABLE_IT(&huart5, UART_IT_RXNE); // 接收中断 // __HAL_UART_ENABLE_IT(&huart5, UART_IT_RXNE); // 接收中断
// __HAL_UART_ENABLE_IT(&huart5, UART_IT_IDLE); // 空闲中断 // __HAL_UART_ENABLE_IT(&huart5, UART_IT_IDLE); // 空闲中断
/* USER CODE END UART5_Init 2 */ /* USER CODE END UART5_Init 2 */
} }
/* USART1 init function */ /* USART1 init function */
@ -124,7 +122,6 @@ void MX_USART1_UART_Init(void)
/* USER CODE BEGIN USART1_Init 2 */ /* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */ /* USER CODE END USART1_Init 2 */
} }
/* USART2 init function */ /* USART2 init function */
@ -154,7 +151,6 @@ void MX_USART2_UART_Init(void)
// __HAL_UART_ENABLE_IT(&huart2, UART_IT_RXNE); // 接收中断 // __HAL_UART_ENABLE_IT(&huart2, UART_IT_RXNE); // 接收中断
// __HAL_UART_ENABLE_IT(&huart2, UART_IT_IDLE); // 使能IDLE中断 // __HAL_UART_ENABLE_IT(&huart2, UART_IT_IDLE); // 使能IDLE中断
/* USER CODE END USART2_Init 2 */ /* USER CODE END USART2_Init 2 */
} }
/* USART3 init function */ /* USART3 init function */
@ -183,18 +179,17 @@ void MX_USART3_UART_Init(void)
/* USER CODE BEGIN USART3_Init 2 */ /* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */ /* USER CODE END USART3_Init 2 */
} }
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) void HAL_UART_MspInit(UART_HandleTypeDef *uartHandle)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(uartHandle->Instance==UART4) if (uartHandle->Instance == UART4)
{ {
/* USER CODE BEGIN UART4_MspInit 0 */ /* USER CODE BEGIN UART4_MspInit 0 */
/* USER CODE END UART4_MspInit 0 */ /* USER CODE END UART4_MspInit 0 */
/* UART4 clock enable */ /* UART4 clock enable */
__HAL_RCC_UART4_CLK_ENABLE(); __HAL_RCC_UART4_CLK_ENABLE();
@ -203,7 +198,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
PC10 ------> UART4_TX PC10 ------> UART4_TX
PC11 ------> UART4_RX PC11 ------> UART4_RX
*/ */
GPIO_InitStruct.Pin = LCD_TX_Pin|LCD_RX_Pin; GPIO_InitStruct.Pin = LCD_TX_Pin | LCD_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -227,7 +222,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmarx,hdma_uart4_rx); __HAL_LINKDMA(uartHandle, hdmarx, hdma_uart4_rx);
/* UART4_TX Init */ /* UART4_TX Init */
hdma_uart4_tx.Instance = DMA1_Stream4; hdma_uart4_tx.Instance = DMA1_Stream4;
@ -245,20 +240,20 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmatx,hdma_uart4_tx); __HAL_LINKDMA(uartHandle, hdmatx, hdma_uart4_tx);
/* UART4 interrupt Init */ /* UART4 interrupt Init */
HAL_NVIC_SetPriority(UART4_IRQn, 5, 0); HAL_NVIC_SetPriority(UART4_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(UART4_IRQn); HAL_NVIC_EnableIRQ(UART4_IRQn);
/* USER CODE BEGIN UART4_MspInit 1 */ /* USER CODE BEGIN UART4_MspInit 1 */
/* USER CODE END UART4_MspInit 1 */ /* USER CODE END UART4_MspInit 1 */
} }
else if(uartHandle->Instance==UART5) else if (uartHandle->Instance == UART5)
{ {
/* USER CODE BEGIN UART5_MspInit 0 */ /* USER CODE BEGIN UART5_MspInit 0 */
/* USER CODE END UART5_MspInit 0 */ /* USER CODE END UART5_MspInit 0 */
/* UART5 clock enable */ /* UART5 clock enable */
__HAL_RCC_UART5_CLK_ENABLE(); __HAL_RCC_UART5_CLK_ENABLE();
@ -299,7 +294,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmatx,hdma_uart5_tx); __HAL_LINKDMA(uartHandle, hdmatx, hdma_uart5_tx);
/* UART5_RX Init */ /* UART5_RX Init */
hdma_uart5_rx.Instance = DMA1_Stream0; hdma_uart5_rx.Instance = DMA1_Stream0;
@ -317,20 +312,20 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmarx,hdma_uart5_rx); __HAL_LINKDMA(uartHandle, hdmarx, hdma_uart5_rx);
/* UART5 interrupt Init */ /* UART5 interrupt Init */
HAL_NVIC_SetPriority(UART5_IRQn, 5, 0); HAL_NVIC_SetPriority(UART5_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(UART5_IRQn); HAL_NVIC_EnableIRQ(UART5_IRQn);
/* USER CODE BEGIN UART5_MspInit 1 */ /* USER CODE BEGIN UART5_MspInit 1 */
/* USER CODE END UART5_MspInit 1 */ /* USER CODE END UART5_MspInit 1 */
} }
else if(uartHandle->Instance==USART1) else if (uartHandle->Instance == USART1)
{ {
/* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */
/* USART1 clock enable */ /* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE(); __HAL_RCC_USART1_CLK_ENABLE();
@ -339,7 +334,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
PA9 ------> USART1_TX PA9 ------> USART1_TX
PA10 ------> USART1_RX PA10 ------> USART1_RX
*/ */
GPIO_InitStruct.Pin = USB_TX_Pin|USB_RX_Pin; GPIO_InitStruct.Pin = USB_TX_Pin | USB_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -363,7 +358,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx); __HAL_LINKDMA(uartHandle, hdmarx, hdma_usart1_rx);
/* USART1_TX Init */ /* USART1_TX Init */
hdma_usart1_tx.Instance = DMA2_Stream7; hdma_usart1_tx.Instance = DMA2_Stream7;
@ -381,20 +376,20 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx); __HAL_LINKDMA(uartHandle, hdmatx, hdma_usart1_tx);
/* USART1 interrupt Init */ /* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0); HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn); HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */
} }
else if(uartHandle->Instance==USART2) else if (uartHandle->Instance == USART2)
{ {
/* USER CODE BEGIN USART2_MspInit 0 */ /* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */ /* USER CODE END USART2_MspInit 0 */
/* USART2 clock enable */ /* USART2 clock enable */
__HAL_RCC_USART2_CLK_ENABLE(); __HAL_RCC_USART2_CLK_ENABLE();
@ -403,7 +398,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
PD5 ------> USART2_TX PD5 ------> USART2_TX
PD6 ------> USART2_RX PD6 ------> USART2_RX
*/ */
GPIO_InitStruct.Pin = HART2_TX_Pin|HART2_RX_Pin; GPIO_InitStruct.Pin = HART2_TX_Pin | HART2_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -427,7 +422,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx); __HAL_LINKDMA(uartHandle, hdmarx, hdma_usart2_rx);
/* USART2_TX Init */ /* USART2_TX Init */
hdma_usart2_tx.Instance = DMA1_Stream6; hdma_usart2_tx.Instance = DMA1_Stream6;
@ -445,20 +440,20 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx); __HAL_LINKDMA(uartHandle, hdmatx, hdma_usart2_tx);
/* USART2 interrupt Init */ /* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_IRQn, 5, 0); HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART2_IRQn); HAL_NVIC_EnableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */
} }
else if(uartHandle->Instance==USART3) else if (uartHandle->Instance == USART3)
{ {
/* USER CODE BEGIN USART3_MspInit 0 */ /* USER CODE BEGIN USART3_MspInit 0 */
/* USER CODE END USART3_MspInit 0 */ /* USER CODE END USART3_MspInit 0 */
/* USART3 clock enable */ /* USART3 clock enable */
__HAL_RCC_USART3_CLK_ENABLE(); __HAL_RCC_USART3_CLK_ENABLE();
@ -467,7 +462,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
PD8 ------> USART3_TX PD8 ------> USART3_TX
PD9 ------> USART3_RX PD9 ------> USART3_RX
*/ */
GPIO_InitStruct.Pin = BLE2_TX_Pin|BLE2_RX_Pin; GPIO_InitStruct.Pin = BLE2_TX_Pin | BLE2_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP; GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -491,7 +486,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart3_rx); __HAL_LINKDMA(uartHandle, hdmarx, hdma_usart3_rx);
/* USART3_TX Init */ /* USART3_TX Init */
hdma_usart3_tx.Instance = DMA1_Stream3; hdma_usart3_tx.Instance = DMA1_Stream3;
@ -509,25 +504,25 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
Error_Handler(); Error_Handler();
} }
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx); __HAL_LINKDMA(uartHandle, hdmatx, hdma_usart3_tx);
/* USART3 interrupt Init */ /* USART3 interrupt Init */
HAL_NVIC_SetPriority(USART3_IRQn, 5, 0); HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART3_IRQn); HAL_NVIC_EnableIRQ(USART3_IRQn);
/* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE BEGIN USART3_MspInit 1 */
/* USER CODE END USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */
} }
} }
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) void HAL_UART_MspDeInit(UART_HandleTypeDef *uartHandle)
{ {
if(uartHandle->Instance==UART4) if (uartHandle->Instance == UART4)
{ {
/* USER CODE BEGIN UART4_MspDeInit 0 */ /* USER CODE BEGIN UART4_MspDeInit 0 */
/* USER CODE END UART4_MspDeInit 0 */ /* USER CODE END UART4_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_UART4_CLK_DISABLE(); __HAL_RCC_UART4_CLK_DISABLE();
@ -535,7 +530,7 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
PC10 ------> UART4_TX PC10 ------> UART4_TX
PC11 ------> UART4_RX PC11 ------> UART4_RX
*/ */
HAL_GPIO_DeInit(GPIOC, LCD_TX_Pin|LCD_RX_Pin); HAL_GPIO_DeInit(GPIOC, LCD_TX_Pin | LCD_RX_Pin);
/* UART4 DMA DeInit */ /* UART4 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx); HAL_DMA_DeInit(uartHandle->hdmarx);
@ -543,15 +538,15 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
/* UART4 interrupt Deinit */ /* UART4 interrupt Deinit */
HAL_NVIC_DisableIRQ(UART4_IRQn); HAL_NVIC_DisableIRQ(UART4_IRQn);
/* USER CODE BEGIN UART4_MspDeInit 1 */ /* USER CODE BEGIN UART4_MspDeInit 1 */
/* USER CODE END UART4_MspDeInit 1 */ /* USER CODE END UART4_MspDeInit 1 */
} }
else if(uartHandle->Instance==UART5) else if (uartHandle->Instance == UART5)
{ {
/* USER CODE BEGIN UART5_MspDeInit 0 */ /* USER CODE BEGIN UART5_MspDeInit 0 */
/* USER CODE END UART5_MspDeInit 0 */ /* USER CODE END UART5_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_UART5_CLK_DISABLE(); __HAL_RCC_UART5_CLK_DISABLE();
@ -569,15 +564,15 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
/* UART5 interrupt Deinit */ /* UART5 interrupt Deinit */
HAL_NVIC_DisableIRQ(UART5_IRQn); HAL_NVIC_DisableIRQ(UART5_IRQn);
/* USER CODE BEGIN UART5_MspDeInit 1 */ /* USER CODE BEGIN UART5_MspDeInit 1 */
/* USER CODE END UART5_MspDeInit 1 */ /* USER CODE END UART5_MspDeInit 1 */
} }
else if(uartHandle->Instance==USART1) else if (uartHandle->Instance == USART1)
{ {
/* USER CODE BEGIN USART1_MspDeInit 0 */ /* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */ /* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE(); __HAL_RCC_USART1_CLK_DISABLE();
@ -585,7 +580,7 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
PA9 ------> USART1_TX PA9 ------> USART1_TX
PA10 ------> USART1_RX PA10 ------> USART1_RX
*/ */
HAL_GPIO_DeInit(GPIOA, USB_TX_Pin|USB_RX_Pin); HAL_GPIO_DeInit(GPIOA, USB_TX_Pin | USB_RX_Pin);
/* USART1 DMA DeInit */ /* USART1 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx); HAL_DMA_DeInit(uartHandle->hdmarx);
@ -593,15 +588,15 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
/* USART1 interrupt Deinit */ /* USART1 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART1_IRQn); HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */ /* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */ /* USER CODE END USART1_MspDeInit 1 */
} }
else if(uartHandle->Instance==USART2) else if (uartHandle->Instance == USART2)
{ {
/* USER CODE BEGIN USART2_MspDeInit 0 */ /* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */ /* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE(); __HAL_RCC_USART2_CLK_DISABLE();
@ -609,7 +604,7 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
PD5 ------> USART2_TX PD5 ------> USART2_TX
PD6 ------> USART2_RX PD6 ------> USART2_RX
*/ */
HAL_GPIO_DeInit(GPIOD, HART2_TX_Pin|HART2_RX_Pin); HAL_GPIO_DeInit(GPIOD, HART2_TX_Pin | HART2_RX_Pin);
/* USART2 DMA DeInit */ /* USART2 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx); HAL_DMA_DeInit(uartHandle->hdmarx);
@ -617,15 +612,15 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
/* USART2 interrupt Deinit */ /* USART2 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART2_IRQn); HAL_NVIC_DisableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspDeInit 1 */ /* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */ /* USER CODE END USART2_MspDeInit 1 */
} }
else if(uartHandle->Instance==USART3) else if (uartHandle->Instance == USART3)
{ {
/* USER CODE BEGIN USART3_MspDeInit 0 */ /* USER CODE BEGIN USART3_MspDeInit 0 */
/* USER CODE END USART3_MspDeInit 0 */ /* USER CODE END USART3_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_USART3_CLK_DISABLE(); __HAL_RCC_USART3_CLK_DISABLE();
@ -633,7 +628,7 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
PD8 ------> USART3_TX PD8 ------> USART3_TX
PD9 ------> USART3_RX PD9 ------> USART3_RX
*/ */
HAL_GPIO_DeInit(GPIOD, BLE2_TX_Pin|BLE2_RX_Pin); HAL_GPIO_DeInit(GPIOD, BLE2_TX_Pin | BLE2_RX_Pin);
/* USART3 DMA DeInit */ /* USART3 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx); HAL_DMA_DeInit(uartHandle->hdmarx);
@ -641,9 +636,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
/* USART3 interrupt Deinit */ /* USART3 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART3_IRQn); HAL_NVIC_DisableIRQ(USART3_IRQn);
/* USER CODE BEGIN USART3_MspDeInit 1 */ /* USER CODE BEGIN USART3_MspDeInit 1 */
/* USER CODE END USART3_MspDeInit 1 */ /* USER CODE END USART3_MspDeInit 1 */
} }
} }

2
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
View File

@ -1,6 +1,6 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx_hal_uart.c * @file stm32f4xx_hal_uart.c
* @author MCD Application Team * @author MCD Application Team
* @brief UART HAL module driver. * @brief UART HAL module driver.
* This file provides firmware functions to manage the following * This file provides firmware functions to manage the following

57
LWIP/App/lwip.c
View File

@ -22,7 +22,7 @@
#include "lwip.h" #include "lwip.h"
#include "lwip/init.h" #include "lwip/init.h"
#include "lwip/netif.h" #include "lwip/netif.h"
#if defined(__CC_ARM) /* MDK ARM Compiler */ #if defined ( __CC_ARM ) /* MDK ARM Compiler */
#include "lwip/sio.h" #include "lwip/sio.h"
#endif /* MDK ARM Compiler */ #endif /* MDK ARM Compiler */
#include "ethernetif.h" #include "ethernetif.h"
@ -53,8 +53,8 @@ uint8_t GATEWAY_ADDRESS[4];
/* USER CODE END 2 */ /* USER CODE END 2 */
/** /**
* LwIP initialization function * LwIP initialization function
*/ */
void MX_LWIP_Init(void) void MX_LWIP_Init(void)
{ {
/* IP addresses initialization */ /* IP addresses initialization */
@ -71,15 +71,15 @@ void MX_LWIP_Init(void)
GATEWAY_ADDRESS[2] = 1; GATEWAY_ADDRESS[2] = 1;
GATEWAY_ADDRESS[3] = 29; GATEWAY_ADDRESS[3] = 29;
/* USER CODE BEGIN IP_ADDRESSES */ /* USER CODE BEGIN IP_ADDRESSES */
/* USER CODE END IP_ADDRESSES */ /* USER CODE END IP_ADDRESSES */
/* Initilialize the LwIP stack with RTOS */ /* Initilialize the LwIP stack with RTOS */
tcpip_init(NULL, NULL); tcpip_init( NULL, NULL );
/* IP addresses initialization without DHCP (IPv4) */ /* IP addresses initialization without DHCP (IPv4) */
IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]); IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1], NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]); IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]); IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);
/* add the network interface (IPv4/IPv6) with RTOS */ /* add the network interface (IPv4/IPv6) with RTOS */
@ -103,19 +103,19 @@ void MX_LWIP_Init(void)
netif_set_link_callback(&gnetif, ethernet_link_status_updated); netif_set_link_callback(&gnetif, ethernet_link_status_updated);
/* Create the Ethernet link handler thread */ /* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthLink, ethernet_link_thread, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2); osThreadDef(EthLink, ethernet_link_thread, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2);
osThreadCreate(osThread(EthLink), &gnetif); osThreadCreate(osThread(EthLink), &gnetif);
/* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
flash_read_data(FLASH_USER_START_ADDR, IP_ADDRESS, 4); flash_read_data(FLASH_USER_START_ADDR, IP_ADDRESS, 4);
if (IP_ADDRESS[0] == 192) if (IP_ADDRESS[0] == 192)
{ {
IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]); IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
gnetif.ip_addr = ipaddr; gnetif.ip_addr = ipaddr;
} }
/* USER CODE END 3 */ /* USER CODE END 3 */
} }
#ifdef USE_OBSOLETE_USER_CODE_SECTION_4 #ifdef USE_OBSOLETE_USER_CODE_SECTION_4
@ -126,25 +126,25 @@ void MX_LWIP_Init(void)
#endif #endif
/** /**
* @brief Notify the User about the network interface config status * @brief Notify the User about the network interface config status
* @param netif: the network interface * @param netif: the network interface
* @retval None * @retval None
*/ */
static void ethernet_link_status_updated(struct netif *netif) static void ethernet_link_status_updated(struct netif *netif)
{ {
if (netif_is_up(netif)) if (netif_is_up(netif))
{ {
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
/* USER CODE END 5 */ /* USER CODE END 5 */
} }
else /* netif is down */ else /* netif is down */
{ {
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
/* USER CODE END 6 */ /* USER CODE END 6 */
} }
} }
#if defined(__CC_ARM) /* MDK ARM Compiler */ #if defined ( __CC_ARM ) /* MDK ARM Compiler */
/** /**
* Opens a serial device for communication. * Opens a serial device for communication.
* *
@ -155,9 +155,9 @@ sio_fd_t sio_open(u8_t devnum)
{ {
sio_fd_t sd; sio_fd_t sd;
/* USER CODE BEGIN 7 */ /* USER CODE BEGIN 7 */
sd = 0; // dummy code sd = 0; // dummy code
/* USER CODE END 7 */ /* USER CODE END 7 */
return sd; return sd;
} }
@ -172,8 +172,8 @@ sio_fd_t sio_open(u8_t devnum)
*/ */
void sio_send(u8_t c, sio_fd_t fd) void sio_send(u8_t c, sio_fd_t fd)
{ {
/* USER CODE BEGIN 8 */ /* USER CODE BEGIN 8 */
/* USER CODE END 8 */ /* USER CODE END 8 */
} }
/** /**
@ -191,9 +191,9 @@ u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len)
{ {
u32_t recved_bytes; u32_t recved_bytes;
/* USER CODE BEGIN 9 */ /* USER CODE BEGIN 9 */
recved_bytes = 0; // dummy code recved_bytes = 0; // dummy code
/* USER CODE END 9 */ /* USER CODE END 9 */
return recved_bytes; return recved_bytes;
} }
@ -210,9 +210,10 @@ u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len)
{ {
u32_t recved_bytes; u32_t recved_bytes;
/* USER CODE BEGIN 10 */ /* USER CODE BEGIN 10 */
recved_bytes = 0; // dummy code recved_bytes = 0; // dummy code
/* USER CODE END 10 */ /* USER CODE END 10 */
return recved_bytes; return recved_bytes;
} }
#endif /* MDK ARM Compiler */ #endif /* MDK ARM Compiler */

4
LWIP/Target/ethernetif.c
View File

@ -613,8 +613,6 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
/* Peripheral interrupt init */ /* Peripheral interrupt init */
HAL_NVIC_SetPriority(ETH_IRQn, 5, 0); HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(ETH_IRQn); HAL_NVIC_EnableIRQ(ETH_IRQn);
HAL_NVIC_SetPriority(ETH_WKUP_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(ETH_WKUP_IRQn);
/* USER CODE BEGIN ETH_MspInit 1 */ /* USER CODE BEGIN ETH_MspInit 1 */
/* USER CODE END ETH_MspInit 1 */ /* USER CODE END ETH_MspInit 1 */
@ -651,8 +649,6 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
/* Peripheral interrupt Deinit*/ /* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(ETH_IRQn); HAL_NVIC_DisableIRQ(ETH_IRQn);
HAL_NVIC_DisableIRQ(ETH_WKUP_IRQn);
/* USER CODE BEGIN ETH_MspDeInit 1 */ /* USER CODE BEGIN ETH_MspDeInit 1 */
/* USER CODE END ETH_MspDeInit 1 */ /* USER CODE END ETH_MspDeInit 1 */

48
MDK-ARM/DebugConfig/semi-finished_product_testing_STM32F407VGTx.dbgconf Normal file
View File

@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

90
MDK-ARM/semi-finished_product_testing.uvoptx
View File

@ -148,7 +148,56 @@
<Name>-U090F00028316303030303032 -O2254 -SF500 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO31 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name> <Name>-U090F00028316303030303032 -O2254 -SF500 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO31 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
</SetRegEntry> </SetRegEntry>
</TargetDriverDllRegistry> </TargetDriverDllRegistry>
<Breakpoint/> <Breakpoint>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>2413</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134234492</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c\2413</Expression>
</Bp>
<Bp>
<Number>1</Number>
<Type>0</Type>
<LineNumber>224</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134234260</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../Core/Src/main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../Core/Src/main.c\224</Expression>
</Bp>
<Bp>
<Number>2</Number>
<Type>0</Type>
<LineNumber>226</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134234266</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../Core/Src/main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../Core/Src/main.c\226</Expression>
</Bp>
</Breakpoint>
<WatchWindow1> <WatchWindow1>
<Ww> <Ww>
<count>0</count> <count>0</count>
@ -175,12 +224,47 @@
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>lwip_taskHandle,0x0A</ItemText> <ItemText>lwip_taskHandle,0x0A</ItemText>
</Ww> </Ww>
<Ww>
<count>5</count>
<WinNumber>1</WinNumber>
<ItemText>current_buff</ItemText>
</Ww>
<Ww>
<count>6</count>
<WinNumber>1</WinNumber>
<ItemText>huart2</ItemText>
</Ww>
<Ww>
<count>7</count>
<WinNumber>1</WinNumber>
<ItemText>data_flag</ItemText>
</Ww>
<Ww>
<count>8</count>
<WinNumber>1</WinNumber>
<ItemText>receive_times1</ItemText>
</Ww>
<Ww>
<count>9</count>
<WinNumber>1</WinNumber>
<ItemText>receive_times2</ItemText>
</Ww>
<Ww>
<count>10</count>
<WinNumber>1</WinNumber>
<ItemText>hart1_uart5</ItemText>
</Ww>
<Ww>
<count>11</count>
<WinNumber>1</WinNumber>
<ItemText>huart5</ItemText>
</Ww>
</WatchWindow1> </WatchWindow1>
<MemoryWindow1> <MemoryWindow1>
<Mm> <Mm>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<SubType>0</SubType> <SubType>0</SubType>
<ItemText>buf</ItemText> <ItemText>0x2000207a</ItemText>
<AccSizeX>0</AccSizeX> <AccSizeX>0</AccSizeX>
</Mm> </Mm>
</MemoryWindow1> </MemoryWindow1>
@ -446,7 +530,7 @@
<Group> <Group>
<GroupName>Drivers/STM32F4xx_HAL_Driver</GroupName> <GroupName>Drivers/STM32F4xx_HAL_Driver</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>

2
MDK-ARM/semi-finished_product_testing/ExtDll.iex Normal file
View File

@ -0,0 +1,2 @@
[EXTDLL]
Count=0

198
MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm
View File

@ -1,198 +0,0 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.36.0.0
Copyright (C) 2021 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: aaa Administrator, aaa, LIC=6XJT4-F8J98-8YUVV-P833R-DBAKX-Y8EU6
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.36.0.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 7 (build 960)
Assembler: Armasm.exe V5.06 update 7 (build 960)
Linker/Locator: ArmLink.exe V5.06 update 7 (build 960)
Library Manager: ArmAr.exe V5.06 update 7 (build 960)
Hex Converter: FromElf.exe V5.06 update 7 (build 960)
CPU DLL: SARMCM3.DLL V5.36.0.0
Dialog DLL: DCM.DLL V1.17.3.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.9.0
Dialog DLL: TCM.DLL V1.53.0.0
<h2>Project:</h2>
D:\WORK\positioner_testing\Semi-finished product testing\MDK-ARM\semi-finished_product_testing.uvprojx
Project File Date: 03/31/2025
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 7 (build 960)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'semi-finished_product_testing'
assembling startup_stm32f407xx.s...
compiling lan8742.c...
compiling gpio.c...
compiling dma.c...
compiling tim.c...
compiling stm32f4xx_hal_msp.c...
compiling stm32f4xx_hal_timebase_tim.c...
compiling usart.c...
compiling main.c...
compiling lwip.c...
compiling ethernetif.c...
compiling stm32f4xx_hal_rcc.c...
compiling freertos.c...
compiling spi.c...
compiling stm32f4xx_it.c...
compiling stm32f4xx_hal_rcc_ex.c...
compiling stm32f4xx_hal_flash.c...
compiling stm32f4xx_hal_flash_ex.c...
compiling stm32f4xx_hal_flash_ramfunc.c...
compiling stm32f4xx_hal_gpio.c...
compiling stm32f4xx_hal_dma_ex.c...
compiling stm32f4xx_hal_dma.c...
compiling stm32f4xx_hal_pwr_ex.c...
compiling stm32f4xx_hal_pwr.c...
compiling stm32f4xx_hal_cortex.c...
compiling stm32f4xx_hal_exti.c...
compiling stm32f4xx_hal_eth.c...
compiling stm32f4xx_hal.c...
compiling stm32f4xx_hal_spi.c...
compiling croutine.c...
compiling stm32f4xx_hal_tim_ex.c...
compiling stm32f4xx_hal_tim.c...
compiling event_groups.c...
compiling stream_buffer.c...
compiling list.c...
compiling stm32f4xx_hal_uart.c...
compiling timers.c...
compiling heap_4.c...
compiling tasks.c...
compiling queue.c...
compiling system_stm32f4xx.c...
compiling cmsis_os.c...
compiling port.c...
compiling ccp.c...
compiling auth.c...
compiling chap_ms.c...
compiling chap-md5.c...
compiling demand.c...
compiling chap-new.c...
compiling eui64.c...
compiling fsm.c...
compiling eap.c...
compiling ipcp.c...
compiling ipv6cp.c...
compiling lcp.c...
compiling magic.c...
compiling multilink.c...
compiling mppe.c...
compiling ppp.c...
compiling pppapi.c...
compiling pppoe.c...
compiling pppcrypt.c...
compiling pppol2tp.c...
compiling pppos.c...
compiling upap.c...
compiling utils.c...
compiling vj.c...
compiling bridgeif.c...
compiling bridgeif_fdb.c...
compiling ethernet.c...
compiling lowpan6.c...
compiling lowpan6_ble.c...
compiling lowpan6_common.c...
compiling zepif.c...
compiling slipif.c...
compiling ecp.c...
compiling if_api.c...
compiling netdb.c...
compiling err.c...
compiling netbuf.c...
compiling api_msg.c...
compiling api_lib.c...
compiling netifapi.c...
compiling tcpip.c...
compiling altcp.c...
compiling sockets.c...
compiling altcp_tcp.c...
compiling altcp_alloc.c...
compiling def.c...
compiling dns.c...
compiling mem.c...
compiling ip.c...
compiling inet_chksum.c...
compiling init.c...
compiling memp.c...
compiling raw.c...
compiling netif.c...
compiling stats.c...
compiling pbuf.c...
compiling sys.c...
compiling tcp.c...
compiling tcp_in.c...
compiling tcp_out.c...
compiling timeouts.c...
compiling udp.c...
compiling autoip.c...
compiling etharp.c...
compiling igmp.c...
compiling icmp.c...
compiling dhcp.c...
compiling ip4.c...
compiling ip4_addr.c...
compiling ip4_frag.c...
compiling dhcp6.c...
compiling ethip6.c...
compiling icmp6.c...
compiling ble_mx_02.c...
compiling inet6.c...
compiling ip6.c...
compiling ip6_addr.c...
compiling ip6_frag.c...
compiling mld6.c...
compiling user_lib.c...
compiling nd6.c...
compiling sys_arch.c...
compiling leds.c...
compiling linear_encoder.c...
compiling communication_protocol.c...
compiling mqtt.c...
compiling tcpclient.c...
compiling tcpserverc.c...
compiling ad7124.c...
compiling dac161s997.c...
compiling ht1200m.c...
compiling user_gpio.c...
compiling user_spi.c...
compiling user_flash.c...
compiling uart_lcd.c...
linking...
Program Size: Code=93900 RO-data=1472 RW-data=1640 ZI-data=62880
FromELF: creating hex file...
"semi-finished_product_testing\semi-finished_product_testing.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.8.0.pack
ARM.CMSIS.5.8.0
CMSIS (Common Microcontroller Software Interface Standard)
* Component: CORE Version: 5.5.0
Package Vendor: Keil
https://www.keil.com/pack/Keil.STM32F4xx_DFP.2.17.1.pack
Keil.STM32F4xx_DFP.2.17.1
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_semi-finished_product_testing
C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.8.0\CMSIS\Core\Include
C:\Users\Administrator\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.17.1\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.5.0
Include file: CMSIS\Core\Include\tz_context.h
Build Time Elapsed: 00:00:09
</pre>
</body>
</html>

11560
MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.hex
View File

File diff suppressed because it is too large Load Diff

8
semi-finished_product_testing.ioc
View File

@ -241,19 +241,19 @@ Mcu.UserName=STM32F407VGTx
MxCube.Version=6.8.0 MxCube.Version=6.8.0
MxDb.Version=DB.6.0.80 MxDb.Version=DB.6.0.80
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream0_IRQn=true\:5\:0\:true\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream7_IRQn=true\:5\:0\:true\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.EXTI1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.EXTI1_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true\:true
NVIC.EXTI3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.EXTI3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.ForceEnableDMAVector=true NVIC.ForceEnableDMAVector=true
@ -271,7 +271,7 @@ NVIC.TIM4_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
NVIC.TimeBase=TIM4_IRQn NVIC.TimeBase=TIM4_IRQn
NVIC.TimeBaseIP=TIM4 NVIC.TimeBaseIP=TIM4
NVIC.UART4_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.UART4_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.UART5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.UART5_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true\:true
NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true