串口接收噪音干扰导致进入接收错误中断
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e586a22976
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@ -25,8 +25,7 @@
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#define __STM32F4xx_HAL_CONF_H
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#ifdef __cplusplus
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extern "C"
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{
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extern "C" {
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#endif
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/* Exported types ------------------------------------------------------------*/
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@ -118,8 +117,8 @@ extern "C"
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*/
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#if !defined (LSI_VALUE)
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#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
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#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz \
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The real value may vary depending on the variations \
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#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
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The real value may vary depending on the variations
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in voltage and temperature.*/
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/**
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* @brief External Low Speed oscillator (LSE) value.
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@ -71,7 +71,6 @@ void UART4_IRQHandler(void);
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void UART5_IRQHandler(void);
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void DMA2_Stream2_IRQHandler(void);
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void ETH_IRQHandler(void);
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void ETH_WKUP_IRQHandler(void);
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void DMA2_Stream7_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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@ -74,10 +74,8 @@ void MX_DMA_Init(void)
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/* DMA2_Stream7_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
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}
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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@ -111,8 +111,7 @@ void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackTyp
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* @param None
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* @retval None
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*/
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void MX_FREERTOS_Init(void)
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{
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void MX_FREERTOS_Init(void) {
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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@ -161,6 +160,7 @@ void MX_FREERTOS_Init(void)
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/* USER CODE BEGIN RTOS_THREADS */
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/* add threads, ... */
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/* USER CODE END RTOS_THREADS */
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}
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/* USER CODE BEGIN Header_start_tcp_task */
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@ -272,7 +272,7 @@ void start_dac_task(void const *argument)
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/* Infinite loop */
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for (;;)
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{
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osThreadSuspend(adc_taskHandle); // 暂停ADC任务,防止DAC采集时产生干<E7949F>???????,因为ADC和DAC采用的是同一路SPI,但是时序不<E5BA8F>???????
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osThreadSuspend(adc_taskHandle); // 暂停ADC任务,防止DAC采集时产生干<E7949F><EFBFBD>????????,因为ADC和DAC采用的是同一路SPI,但是时序不<E5BA8F><EFBFBD>????????
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dac161s997_output(DAC161S997_1, current_buff[0]);
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dac161s997_output(DAC161S997_2, current_buff[1]);
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osThreadResume(adc_taskHandle);
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@ -295,7 +295,7 @@ void start_adc_task(void const *argument)
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/* Infinite loop */
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for (;;)
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{
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osThreadSuspend(dac_taskHandle); // 暂停DAC任务,防止ADC采集时产生干<E7949F>???????,因为ADC和DAC采用的是同一路SPI,但是时序不<E5BA8F>???????
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osThreadSuspend(dac_taskHandle); // 暂停DAC任务,防止ADC采集时产生干<E7949F><EFBFBD>????????,因为ADC和DAC采用的是同一路SPI,但是时序不<E5BA8F><EFBFBD>????????
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uint8_t ch = 0;
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for (ch = STOP_NC_ADC; ch < AD7124_CHANNEL_EN_MAX; ch++)
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{
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@ -82,6 +82,12 @@ uint8_t tcp_echo_flags_ble2 = 0;
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uint8_t tcp_echo_flags_control = 0;
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uint8_t send_data_flag_cmd = 0;
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// TEST
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// uint8_t data_flag = 0;
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// uint32_t receive_times1 = 0;
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// uint32_t receive_times2 = 0;
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// ENDTEST
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extern struct netif gnetif;
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extern ip4_addr_t ipaddr;
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/* USER CODE END 0 */
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@ -195,8 +201,7 @@ void SystemClock_Config(void)
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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}
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/* USER CODE BEGIN 4 */
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void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
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{
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if (huart == &huart5)
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{
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__HAL_UNLOCK(huart);
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if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE))
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{
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__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_NE); // 清除错误标志
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}
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HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp));
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}
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if (huart == &huart2)
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{
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__HAL_UNLOCK(huart);
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if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE))
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{
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__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_NE); // 清除错误标志
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}
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HAL_UARTEx_ReceiveToIdle_DMA(&huart2, hart2_uart2.rx_data_temp, ARRAY_LEN(hart2_uart2.rx_data_temp));
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}
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}
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void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
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{
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if (huart == &huart1)
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@ -273,6 +298,7 @@ void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
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user_send_data_hart1(hart1_uart5.rx_data, Size);
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}
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HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp));
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memset(hart1_uart5.rx_data_temp, 0, ARRAY_LEN(hart1_uart5.rx_data_temp));
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}
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if (huart == &huart2)
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{
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@ -340,7 +366,8 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
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/* USER CODE BEGIN Callback 0 */
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/* USER CODE END Callback 0 */
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if (htim->Instance == TIM4) {
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if (htim->Instance == TIM4)
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{
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HAL_IncTick();
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}
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/* USER CODE BEGIN Callback 1 */
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@ -455,20 +455,6 @@ void ETH_IRQHandler(void)
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/* USER CODE END ETH_IRQn 1 */
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}
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/**
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* @brief This function handles Ethernet wake-up interrupt through EXTI line 19.
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*/
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void ETH_WKUP_IRQHandler(void)
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{
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/* USER CODE BEGIN ETH_WKUP_IRQn 0 */
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/* USER CODE END ETH_WKUP_IRQn 0 */
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HAL_ETH_IRQHandler(&heth);
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/* USER CODE BEGIN ETH_WKUP_IRQn 1 */
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/* USER CODE END ETH_WKUP_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream7 global interrupt.
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*/
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@ -66,7 +66,6 @@ void MX_UART4_Init(void)
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/* USER CODE BEGIN UART4_Init 2 */
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//__HAL_UART_ENABLE_IT(&huart4, UART_IT_IDLE); // 使能IDLE中断
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/* USER CODE END UART4_Init 2 */
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}
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/* UART5 init function */
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void MX_UART5_Init(void)
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// __HAL_UART_ENABLE_IT(&huart5, UART_IT_RXNE); // 接收中断
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// __HAL_UART_ENABLE_IT(&huart5, UART_IT_IDLE); // 空闲中断
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/* USER CODE END UART5_Init 2 */
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}
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/* USART1 init function */
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/* USER CODE BEGIN USART1_Init 2 */
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/* USER CODE END USART1_Init 2 */
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}
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/* USART2 init function */
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// __HAL_UART_ENABLE_IT(&huart2, UART_IT_RXNE); // 接收中断
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// __HAL_UART_ENABLE_IT(&huart2, UART_IT_IDLE); // 使能IDLE中断
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/* USER CODE END USART2_Init 2 */
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}
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/* USART3 init function */
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/* USER CODE BEGIN USART3_Init 2 */
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/* USER CODE END USART3_Init 2 */
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}
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void HAL_UART_MspInit(UART_HandleTypeDef *uartHandle)
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return recved_bytes;
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}
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#endif /* MDK ARM Compiler */
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/* Peripheral interrupt init */
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HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(ETH_IRQn);
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HAL_NVIC_SetPriority(ETH_WKUP_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(ETH_WKUP_IRQn);
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/* USER CODE BEGIN ETH_MspInit 1 */
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/* USER CODE END ETH_MspInit 1 */
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/* Peripheral interrupt Deinit*/
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HAL_NVIC_DisableIRQ(ETH_IRQn);
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HAL_NVIC_DisableIRQ(ETH_WKUP_IRQn);
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/* USER CODE BEGIN ETH_MspDeInit 1 */
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/* USER CODE END ETH_MspDeInit 1 */
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@ -0,0 +1,48 @@
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// File: STM32F405_415_407_417_427_437_429_439.dbgconf
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// Version: 1.0.0
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// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
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// refer to STM32F40x STM32F41x datasheets
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// refer to STM32F42x STM32F43x datasheets
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU configuration register (DBGMCU_CR)
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// <o.2> DBG_STANDBY <i> Debug Standby Mode
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// <o.1> DBG_STOP <i> Debug Stop Mode
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// <o.0> DBG_SLEEP <i> Debug Sleep Mode
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// </h>
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DbgMCU_CR = 0x00000007;
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// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
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// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
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// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
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// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
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// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
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// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
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// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
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// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
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// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
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// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
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// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
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// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
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// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
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// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
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// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
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// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
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// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
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// </h>
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DbgMCU_APB1_Fz = 0x00000000;
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// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
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// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
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// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
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// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
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// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
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// </h>
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DbgMCU_APB2_Fz = 0x00000000;
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// <<< end of configuration section >>>
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@ -148,7 +148,56 @@
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<Name>-U090F00028316303030303032 -O2254 -SF500 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO31 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
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</SetRegEntry>
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</TargetDriverDllRegistry>
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<Breakpoint/>
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<Breakpoint>
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<Bp>
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<Number>0</Number>
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<Type>0</Type>
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<LineNumber>2413</LineNumber>
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<EnabledFlag>1</EnabledFlag>
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<Address>134234492</Address>
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<ByteObject>0</ByteObject>
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<HtxType>0</HtxType>
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<ManyObjects>0</ManyObjects>
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<SizeOfObject>0</SizeOfObject>
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<BreakByAccess>0</BreakByAccess>
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<BreakIfRCount>1</BreakIfRCount>
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<Filename>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c</Filename>
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<ExecCommand></ExecCommand>
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<Expression>\\semi_finished_product_testing\../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c\2413</Expression>
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</Bp>
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<Bp>
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<Number>1</Number>
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<Type>0</Type>
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<LineNumber>224</LineNumber>
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<EnabledFlag>1</EnabledFlag>
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<Address>134234260</Address>
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<ByteObject>0</ByteObject>
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<HtxType>0</HtxType>
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<ManyObjects>0</ManyObjects>
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<SizeOfObject>0</SizeOfObject>
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<BreakByAccess>0</BreakByAccess>
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<BreakIfRCount>1</BreakIfRCount>
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<Filename>../Core/Src/main.c</Filename>
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<ExecCommand></ExecCommand>
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<Expression>\\semi_finished_product_testing\../Core/Src/main.c\224</Expression>
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</Bp>
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<Bp>
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<Number>2</Number>
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<Type>0</Type>
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<LineNumber>226</LineNumber>
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<EnabledFlag>1</EnabledFlag>
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<Address>134234266</Address>
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<ByteObject>0</ByteObject>
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<HtxType>0</HtxType>
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<ManyObjects>0</ManyObjects>
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<SizeOfObject>0</SizeOfObject>
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<BreakByAccess>0</BreakByAccess>
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<BreakIfRCount>1</BreakIfRCount>
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<Filename>../Core/Src/main.c</Filename>
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<ExecCommand></ExecCommand>
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<Expression>\\semi_finished_product_testing\../Core/Src/main.c\226</Expression>
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</Bp>
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</Breakpoint>
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<WatchWindow1>
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<Ww>
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<count>0</count>
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<WinNumber>1</WinNumber>
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<ItemText>lwip_taskHandle,0x0A</ItemText>
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</Ww>
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<Ww>
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<count>5</count>
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<WinNumber>1</WinNumber>
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<ItemText>current_buff</ItemText>
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</Ww>
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<Ww>
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<count>6</count>
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<WinNumber>1</WinNumber>
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<ItemText>huart2</ItemText>
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</Ww>
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<Ww>
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<count>7</count>
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<WinNumber>1</WinNumber>
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<ItemText>data_flag</ItemText>
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</Ww>
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<Ww>
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<count>8</count>
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<WinNumber>1</WinNumber>
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<ItemText>receive_times1</ItemText>
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</Ww>
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<Ww>
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<count>9</count>
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<WinNumber>1</WinNumber>
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<ItemText>receive_times2</ItemText>
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</Ww>
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<Ww>
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<count>10</count>
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<WinNumber>1</WinNumber>
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<ItemText>hart1_uart5</ItemText>
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</Ww>
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<Ww>
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<count>11</count>
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<WinNumber>1</WinNumber>
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<ItemText>huart5</ItemText>
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</Ww>
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</WatchWindow1>
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<MemoryWindow1>
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<Mm>
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<WinNumber>1</WinNumber>
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<SubType>0</SubType>
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<ItemText>buf</ItemText>
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<ItemText>0x2000207a</ItemText>
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<AccSizeX>0</AccSizeX>
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</Mm>
|
||||
</MemoryWindow1>
|
||||
|
@ -446,7 +530,7 @@
|
|||
|
||||
<Group>
|
||||
<GroupName>Drivers/STM32F4xx_HAL_Driver</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
|
|
|
@ -0,0 +1,2 @@
|
|||
[EXTDLL]
|
||||
Count=0
|
|
@ -1,198 +0,0 @@
|
|||
<html>
|
||||
<body>
|
||||
<pre>
|
||||
<h1>µVision Build Log</h1>
|
||||
<h2>Tool Versions:</h2>
|
||||
IDE-Version: ¦ÌVision V5.36.0.0
|
||||
Copyright (C) 2021 ARM Ltd and ARM Germany GmbH. All rights reserved.
|
||||
License Information: aaa Administrator, aaa, LIC=6XJT4-F8J98-8YUVV-P833R-DBAKX-Y8EU6
|
||||
|
||||
Tool Versions:
|
||||
Toolchain: MDK-ARM Professional Version: 5.36.0.0
|
||||
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
|
||||
C Compiler: Armcc.exe V5.06 update 7 (build 960)
|
||||
Assembler: Armasm.exe V5.06 update 7 (build 960)
|
||||
Linker/Locator: ArmLink.exe V5.06 update 7 (build 960)
|
||||
Library Manager: ArmAr.exe V5.06 update 7 (build 960)
|
||||
Hex Converter: FromElf.exe V5.06 update 7 (build 960)
|
||||
CPU DLL: SARMCM3.DLL V5.36.0.0
|
||||
Dialog DLL: DCM.DLL V1.17.3.0
|
||||
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.9.0
|
||||
Dialog DLL: TCM.DLL V1.53.0.0
|
||||
|
||||
<h2>Project:</h2>
|
||||
D:\WORK\positioner_testing\Semi-finished product testing\MDK-ARM\semi-finished_product_testing.uvprojx
|
||||
Project File Date: 03/31/2025
|
||||
|
||||
<h2>Output:</h2>
|
||||
*** Using Compiler 'V5.06 update 7 (build 960)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
|
||||
Build target 'semi-finished_product_testing'
|
||||
assembling startup_stm32f407xx.s...
|
||||
compiling lan8742.c...
|
||||
compiling gpio.c...
|
||||
compiling dma.c...
|
||||
compiling tim.c...
|
||||
compiling stm32f4xx_hal_msp.c...
|
||||
compiling stm32f4xx_hal_timebase_tim.c...
|
||||
compiling usart.c...
|
||||
compiling main.c...
|
||||
compiling lwip.c...
|
||||
compiling ethernetif.c...
|
||||
compiling stm32f4xx_hal_rcc.c...
|
||||
compiling freertos.c...
|
||||
compiling spi.c...
|
||||
compiling stm32f4xx_it.c...
|
||||
compiling stm32f4xx_hal_rcc_ex.c...
|
||||
compiling stm32f4xx_hal_flash.c...
|
||||
compiling stm32f4xx_hal_flash_ex.c...
|
||||
compiling stm32f4xx_hal_flash_ramfunc.c...
|
||||
compiling stm32f4xx_hal_gpio.c...
|
||||
compiling stm32f4xx_hal_dma_ex.c...
|
||||
compiling stm32f4xx_hal_dma.c...
|
||||
compiling stm32f4xx_hal_pwr_ex.c...
|
||||
compiling stm32f4xx_hal_pwr.c...
|
||||
compiling stm32f4xx_hal_cortex.c...
|
||||
compiling stm32f4xx_hal_exti.c...
|
||||
compiling stm32f4xx_hal_eth.c...
|
||||
compiling stm32f4xx_hal.c...
|
||||
compiling stm32f4xx_hal_spi.c...
|
||||
compiling croutine.c...
|
||||
compiling stm32f4xx_hal_tim_ex.c...
|
||||
compiling stm32f4xx_hal_tim.c...
|
||||
compiling event_groups.c...
|
||||
compiling stream_buffer.c...
|
||||
compiling list.c...
|
||||
compiling stm32f4xx_hal_uart.c...
|
||||
compiling timers.c...
|
||||
compiling heap_4.c...
|
||||
compiling tasks.c...
|
||||
compiling queue.c...
|
||||
compiling system_stm32f4xx.c...
|
||||
compiling cmsis_os.c...
|
||||
compiling port.c...
|
||||
compiling ccp.c...
|
||||
compiling auth.c...
|
||||
compiling chap_ms.c...
|
||||
compiling chap-md5.c...
|
||||
compiling demand.c...
|
||||
compiling chap-new.c...
|
||||
compiling eui64.c...
|
||||
compiling fsm.c...
|
||||
compiling eap.c...
|
||||
compiling ipcp.c...
|
||||
compiling ipv6cp.c...
|
||||
compiling lcp.c...
|
||||
compiling magic.c...
|
||||
compiling multilink.c...
|
||||
compiling mppe.c...
|
||||
compiling ppp.c...
|
||||
compiling pppapi.c...
|
||||
compiling pppoe.c...
|
||||
compiling pppcrypt.c...
|
||||
compiling pppol2tp.c...
|
||||
compiling pppos.c...
|
||||
compiling upap.c...
|
||||
compiling utils.c...
|
||||
compiling vj.c...
|
||||
compiling bridgeif.c...
|
||||
compiling bridgeif_fdb.c...
|
||||
compiling ethernet.c...
|
||||
compiling lowpan6.c...
|
||||
compiling lowpan6_ble.c...
|
||||
compiling lowpan6_common.c...
|
||||
compiling zepif.c...
|
||||
compiling slipif.c...
|
||||
compiling ecp.c...
|
||||
compiling if_api.c...
|
||||
compiling netdb.c...
|
||||
compiling err.c...
|
||||
compiling netbuf.c...
|
||||
compiling api_msg.c...
|
||||
compiling api_lib.c...
|
||||
compiling netifapi.c...
|
||||
compiling tcpip.c...
|
||||
compiling altcp.c...
|
||||
compiling sockets.c...
|
||||
compiling altcp_tcp.c...
|
||||
compiling altcp_alloc.c...
|
||||
compiling def.c...
|
||||
compiling dns.c...
|
||||
compiling mem.c...
|
||||
compiling ip.c...
|
||||
compiling inet_chksum.c...
|
||||
compiling init.c...
|
||||
compiling memp.c...
|
||||
compiling raw.c...
|
||||
compiling netif.c...
|
||||
compiling stats.c...
|
||||
compiling pbuf.c...
|
||||
compiling sys.c...
|
||||
compiling tcp.c...
|
||||
compiling tcp_in.c...
|
||||
compiling tcp_out.c...
|
||||
compiling timeouts.c...
|
||||
compiling udp.c...
|
||||
compiling autoip.c...
|
||||
compiling etharp.c...
|
||||
compiling igmp.c...
|
||||
compiling icmp.c...
|
||||
compiling dhcp.c...
|
||||
compiling ip4.c...
|
||||
compiling ip4_addr.c...
|
||||
compiling ip4_frag.c...
|
||||
compiling dhcp6.c...
|
||||
compiling ethip6.c...
|
||||
compiling icmp6.c...
|
||||
compiling ble_mx_02.c...
|
||||
compiling inet6.c...
|
||||
compiling ip6.c...
|
||||
compiling ip6_addr.c...
|
||||
compiling ip6_frag.c...
|
||||
compiling mld6.c...
|
||||
compiling user_lib.c...
|
||||
compiling nd6.c...
|
||||
compiling sys_arch.c...
|
||||
compiling leds.c...
|
||||
compiling linear_encoder.c...
|
||||
compiling communication_protocol.c...
|
||||
compiling mqtt.c...
|
||||
compiling tcpclient.c...
|
||||
compiling tcpserverc.c...
|
||||
compiling ad7124.c...
|
||||
compiling dac161s997.c...
|
||||
compiling ht1200m.c...
|
||||
compiling user_gpio.c...
|
||||
compiling user_spi.c...
|
||||
compiling user_flash.c...
|
||||
compiling uart_lcd.c...
|
||||
linking...
|
||||
Program Size: Code=93900 RO-data=1472 RW-data=1640 ZI-data=62880
|
||||
FromELF: creating hex file...
|
||||
"semi-finished_product_testing\semi-finished_product_testing.axf" - 0 Error(s), 0 Warning(s).
|
||||
|
||||
<h2>Software Packages used:</h2>
|
||||
|
||||
Package Vendor: ARM
|
||||
http://www.keil.com/pack/ARM.CMSIS.5.8.0.pack
|
||||
ARM.CMSIS.5.8.0
|
||||
CMSIS (Common Microcontroller Software Interface Standard)
|
||||
* Component: CORE Version: 5.5.0
|
||||
|
||||
Package Vendor: Keil
|
||||
https://www.keil.com/pack/Keil.STM32F4xx_DFP.2.17.1.pack
|
||||
Keil.STM32F4xx_DFP.2.17.1
|
||||
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
|
||||
|
||||
<h2>Collection of Component include folders:</h2>
|
||||
.\RTE\_semi-finished_product_testing
|
||||
C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.8.0\CMSIS\Core\Include
|
||||
C:\Users\Administrator\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.17.1\Drivers\CMSIS\Device\ST\STM32F4xx\Include
|
||||
|
||||
<h2>Collection of Component Files used:</h2>
|
||||
|
||||
* Component: ARM::CMSIS:CORE:5.5.0
|
||||
Include file: CMSIS\Core\Include\tz_context.h
|
||||
Build Time Elapsed: 00:00:09
|
||||
</pre>
|
||||
</body>
|
||||
</html>
|
File diff suppressed because it is too large
Load Diff
|
@ -241,19 +241,19 @@ Mcu.UserName=STM32F407VGTx
|
|||
MxCube.Version=6.8.0
|
||||
MxDb.Version=DB.6.0.80
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream0_IRQn=true\:5\:0\:true\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream7_IRQn=true\:5\:0\:true\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.EXTI1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.EXTI1_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true\:true
|
||||
NVIC.EXTI3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
|
@ -271,7 +271,7 @@ NVIC.TIM4_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
|
|||
NVIC.TimeBase=TIM4_IRQn
|
||||
NVIC.TimeBaseIP=TIM4
|
||||
NVIC.UART4_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.UART5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.UART5_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true\:true
|
||||
NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
|
|
Loading…
Reference in New Issue