CubeMX版本更新
This commit is contained in:
parent
3d9a527b07
commit
d64ef6f220
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@ -23,8 +23,7 @@
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#define __MAIN_H
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#ifdef __cplusplus
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extern "C"
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{
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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@ -35,10 +34,10 @@ extern "C"
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#include "stdio.h"
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#include "tcpserverc.h"
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#include <string.h>
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/* USER CODE END Includes */
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/* USER CODE END Includes */
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/* Exported types ------------------------------------------------------------*/
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/* USER CODE BEGIN ET */
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/* Exported types ------------------------------------------------------------*/
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/* USER CODE BEGIN ET */
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extern uint8_t tcp_echo_flags_control;
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extern uint8_t send_data_flag_cmd;
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@ -63,20 +62,20 @@ extern "C"
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#define LOCAL_PORT 5001
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/* USER CODE END ET */
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/* USER CODE END ET */
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/* Exported constants --------------------------------------------------------*/
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/* USER CODE BEGIN EC */
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/* Exported constants --------------------------------------------------------*/
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/* USER CODE BEGIN EC */
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/* USER CODE END EC */
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/* USER CODE END EC */
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/* Exported macro ------------------------------------------------------------*/
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/* USER CODE BEGIN EM */
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/* Exported macro ------------------------------------------------------------*/
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/* USER CODE BEGIN EM */
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/* USER CODE END EM */
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/* USER CODE END EM */
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/* Exported functions prototypes ---------------------------------------------*/
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void Error_Handler(void);
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/* Exported functions prototypes ---------------------------------------------*/
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void Error_Handler(void);
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/* USER CODE BEGIN EFP */
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@ -169,7 +168,7 @@ extern "C"
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/* USER CODE BEGIN Private defines */
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#define TRUE 0
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#define FAIL -1
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/* USER CODE END Private defines */
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/* USER CODE END Private defines */
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#ifdef __cplusplus
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}
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@ -221,8 +221,8 @@
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/* Section 2: PHY configuration section */
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/* DP83848_PHY_ADDRESS Address*/
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#define DP83848_PHY_ADDRESS 0x01U
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/* LAN8742A PHY Address*/
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#define LAN8742A_PHY_ADDRESS 0x00U
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/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
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#define PHY_RESET_DELAY 0x000000FFU
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/* PHY Configuration delay */
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@ -252,10 +252,13 @@
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#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
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/* Section 4: Extended PHY Registers */
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#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
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#define PHY_SR ((uint16_t)0x001FU) /*!< PHY status register Offset */
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#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
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#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
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#define PHY_SPEED_STATUS ((uint16_t)0x0004U) /*!< PHY Speed mask */
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#define PHY_DUPLEX_STATUS ((uint16_t)0x0010U) /*!< PHY Duplex mask */
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#define PHY_ISFR ((uint16_t)0x1DU) /*!< PHY Interrupt Source Flag register Offset */
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#define PHY_ISFR_INT4 ((uint16_t)0x0010U) /*!< PHY Link down inturrupt */
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/* ################## SPI peripheral configuration ########################## */
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@ -63,15 +63,15 @@ extern uint8_t tcp_echo_flags_control;
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extern uint8_t send_data_flag_cmd;
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/* USER CODE END FunctionPrototypes */
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void start_tcp_task(void const *argument);
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void start_gpio_di_do_task(void const *argument);
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void start_leds_task(void const *argument);
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void start_tcp_task(void const * argument);
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void start_gpio_di_do_task(void const * argument);
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void start_leds_task(void const * argument);
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extern void MX_LWIP_Init(void);
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void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
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/* GetIdleTaskMemory prototype (linked to static allocation support) */
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void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize);
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void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
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/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
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static StaticTask_t xIdleTaskTCBBuffer;
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@ -87,12 +87,11 @@ void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackTyp
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/* USER CODE END GET_IDLE_TASK_MEMORY */
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/**
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* @brief FreeRTOS initialization
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* @param None
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* @retval None
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*/
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void MX_FREERTOS_Init(void)
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{
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* @brief FreeRTOS initialization
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* @param None
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* @retval None
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*/
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void MX_FREERTOS_Init(void) {
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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@ -129,6 +128,7 @@ void MX_FREERTOS_Init(void)
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/* USER CODE BEGIN RTOS_THREADS */
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/* add threads, ... */
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/* USER CODE END RTOS_THREADS */
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}
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/* USER CODE BEGIN Header_start_tcp_task */
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@ -138,7 +138,7 @@ void MX_FREERTOS_Init(void)
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* @retval None
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*/
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/* USER CODE END Header_start_tcp_task */
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void start_tcp_task(void const *argument)
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void start_tcp_task(void const * argument)
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{
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/* init code for LWIP */
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MX_LWIP_Init();
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@ -161,7 +161,7 @@ void start_tcp_task(void const *argument)
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* @retval None
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*/
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/* USER CODE END Header_start_gpio_di_do_task */
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void start_gpio_di_do_task(void const *argument)
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void start_gpio_di_do_task(void const * argument)
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{
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/* USER CODE BEGIN start_gpio_di_do_task */
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/* Infinite loop */
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@ -171,9 +171,9 @@ void start_gpio_di_do_task(void const *argument)
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uint8_t tx_data_len = 7 + DI_MAX;
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uint8_t tx_data[32] = {0};
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tx_data[0] = FRAME_HEAD; // 帧头
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tx_data[1] = COM_OK; // 状态
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tx_data[2] = DEVICE_NUM; // 设备号
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tx_data[3] = SEND_STATE_CMD; // 命令号
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tx_data[1] = COM_OK; // 状æ??
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tx_data[2] = DEVICE_NUM; // 设备å<EFBFBD>?
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tx_data[3] = SEND_STATE_CMD; // 命令å<EFBFBD>?
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tx_data[4] = DI_MAX; // 数据长度
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for (di_ch = 0; di_ch < DI_MAX; di_ch++)
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{
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@ -208,7 +208,7 @@ void start_gpio_di_do_task(void const *argument)
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* @retval None
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*/
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/* USER CODE END Header_start_leds_task */
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void start_leds_task(void const *argument)
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void start_leds_task(void const * argument)
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{
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/* USER CODE BEGIN start_leds_task */
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/* Infinite loop */
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@ -67,9 +67,9 @@ uint8_t send_data_flag_cmd = 0;
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/* USER CODE END 0 */
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/**
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* @brief The application entry point.
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* @retval int
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*/
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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/* USER CODE BEGIN 1 */
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@ -106,6 +106,7 @@ int main(void)
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/* Start scheduler */
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osKernelStart();
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/* We should never get here as control is now taken by the scheduler */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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@ -119,22 +120,22 @@ int main(void)
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}
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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/** Configure the main internal regulator output voltage
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*/
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*/
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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@ -149,8 +150,9 @@ void SystemClock_Config(void)
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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@ -167,20 +169,19 @@ void SystemClock_Config(void)
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/* USER CODE END 4 */
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/**
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* @brief Period elapsed callback in non blocking mode
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* @note This function is called when TIM1 interrupt took place, inside
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* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
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* a global variable "uwTick" used as application time base.
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* @param htim : TIM handle
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* @retval None
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*/
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* @brief Period elapsed callback in non blocking mode
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* @note This function is called when TIM1 interrupt took place, inside
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* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
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* a global variable "uwTick" used as application time base.
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* @param htim : TIM handle
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* @retval None
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*/
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void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
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{
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/* USER CODE BEGIN Callback 0 */
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/* USER CODE END Callback 0 */
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if (htim->Instance == TIM1)
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{
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if (htim->Instance == TIM1) {
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HAL_IncTick();
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}
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/* USER CODE BEGIN Callback 1 */
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@ -189,9 +190,9 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
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}
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/**
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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void Error_Handler(void)
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{
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/* USER CODE BEGIN Error_Handler_Debug */
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@ -203,14 +204,14 @@ void Error_Handler(void)
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/* USER CODE END Error_Handler_Debug */
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}
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#ifdef USE_FULL_ASSERT
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#ifdef USE_FULL_ASSERT
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/**
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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*/
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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{
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/* USER CODE BEGIN 6 */
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@ -20,6 +20,7 @@
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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@ -38,7 +38,7 @@
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/* Private define ------------------------------------------------------------*/
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/* The time to block waiting for input. */
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#define TIME_WAITING_FOR_INPUT (portMAX_DELAY)
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#define TIME_WAITING_FOR_INPUT ( portMAX_DELAY )
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/* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */
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/* Stack size of the interface thread */
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#define INTERFACE_THREAD_STACK_SIZE (350)
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@ -48,8 +48,8 @@
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#define IFNAME1 't'
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/* ETH Setting */
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#define ETH_DMA_TRANSMIT_TIMEOUT (20U)
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#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
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#define ETH_DMA_TRANSMIT_TIMEOUT ( 20U )
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#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
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/* USER CODE BEGIN 1 */
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@ -81,8 +81,8 @@
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/* Data Type Definitions */
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typedef enum
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{
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RX_ALLOC_OK = 0x00,
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RX_ALLOC_ERROR = 0x01
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RX_ALLOC_OK = 0x00,
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RX_ALLOC_ERROR = 0x01
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} RxAllocStatusTypeDef;
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typedef struct
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@ -92,40 +92,40 @@ typedef struct
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} RxBuff_t;
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/* Memory Pool Declaration */
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#define ETH_RX_BUFFER_CNT 12U
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#define ETH_RX_BUFFER_CNT 12U
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LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool");
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/* Variable Definitions */
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static uint8_t RxAllocStatus;
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */
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osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */
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osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */
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osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */
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/* Global Ethernet handle */
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ETH_HandleTypeDef heth;
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ETH_TxPacketConfig TxConfig;
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/* Private function prototypes -----------------------------------------------*/
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static void ethernetif_input(void const *argument);
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static void ethernetif_input(void const * argument);
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int32_t ETH_PHY_IO_Init(void);
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int32_t ETH_PHY_IO_DeInit(void);
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int32_t ETH_PHY_IO_DeInit (void);
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
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int32_t ETH_PHY_IO_GetTick(void);
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lan8742_Object_t LAN8742;
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lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
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ETH_PHY_IO_DeInit,
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ETH_PHY_IO_WriteReg,
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ETH_PHY_IO_ReadReg,
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ETH_PHY_IO_GetTick};
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lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
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ETH_PHY_IO_DeInit,
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ETH_PHY_IO_WriteReg,
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ETH_PHY_IO_ReadReg,
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ETH_PHY_IO_GetTick};
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/* USER CODE BEGIN 3 */
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@ -135,33 +135,33 @@ lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
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void pbuf_free_custom(struct pbuf *p);
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/**
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* @brief Ethernet Rx Transfer completed callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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* @brief Ethernet Rx Transfer completed callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
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{
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osSemaphoreRelease(RxPktSemaphore);
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}
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/**
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* @brief Ethernet Tx Transfer completed callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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* @brief Ethernet Tx Transfer completed callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
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{
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osSemaphoreRelease(TxPktSemaphore);
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}
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/**
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* @brief Ethernet DMA transfer error callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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* @brief Ethernet DMA transfer error callback
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* @param handlerEth: ETH handler
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* @retval None
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*/
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void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
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{
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if ((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
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if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
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{
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||||
osSemaphoreRelease(RxPktSemaphore);
|
||||
osSemaphoreRelease(RxPktSemaphore);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -187,7 +187,7 @@ static void low_level_init(struct netif *netif)
|
|||
ETH_MACConfigTypeDef MACConf = {0};
|
||||
/* Start ETH HAL Init */
|
||||
|
||||
uint8_t MACAddr[6];
|
||||
uint8_t MACAddr[6] ;
|
||||
heth.Instance = ETH;
|
||||
MACAddr[0] = 0x00;
|
||||
MACAddr[1] = 0x80;
|
||||
|
|
@ -210,7 +210,7 @@ static void low_level_init(struct netif *netif)
|
|||
|
||||
hal_eth_init_status = HAL_ETH_Init(&heth);
|
||||
|
||||
memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig));
|
||||
memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
|
||||
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
|
||||
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
|
||||
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
|
||||
|
|
@ -226,23 +226,23 @@ static void low_level_init(struct netif *netif)
|
|||
netif->hwaddr_len = ETH_HWADDR_LEN;
|
||||
|
||||
/* set MAC hardware address */
|
||||
netif->hwaddr[0] = heth.Init.MACAddr[0];
|
||||
netif->hwaddr[1] = heth.Init.MACAddr[1];
|
||||
netif->hwaddr[2] = heth.Init.MACAddr[2];
|
||||
netif->hwaddr[3] = heth.Init.MACAddr[3];
|
||||
netif->hwaddr[4] = heth.Init.MACAddr[4];
|
||||
netif->hwaddr[5] = heth.Init.MACAddr[5];
|
||||
netif->hwaddr[0] = heth.Init.MACAddr[0];
|
||||
netif->hwaddr[1] = heth.Init.MACAddr[1];
|
||||
netif->hwaddr[2] = heth.Init.MACAddr[2];
|
||||
netif->hwaddr[3] = heth.Init.MACAddr[3];
|
||||
netif->hwaddr[4] = heth.Init.MACAddr[4];
|
||||
netif->hwaddr[5] = heth.Init.MACAddr[5];
|
||||
|
||||
/* maximum transfer unit */
|
||||
netif->mtu = ETH_MAX_PAYLOAD;
|
||||
|
||||
/* Accept broadcast address and ARP traffic */
|
||||
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
|
||||
#if LWIP_ARP
|
||||
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
|
||||
#else
|
||||
netif->flags |= NETIF_FLAG_BROADCAST;
|
||||
#endif /* LWIP_ARP */
|
||||
/* Accept broadcast address and ARP traffic */
|
||||
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
|
||||
#if LWIP_ARP
|
||||
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
|
||||
#else
|
||||
netif->flags |= NETIF_FLAG_BROADCAST;
|
||||
#endif /* LWIP_ARP */
|
||||
|
||||
/* create a binary semaphore used for informing ethernetif of frame reception */
|
||||
RxPktSemaphore = xSemaphoreCreateBinary();
|
||||
|
|
@ -251,14 +251,14 @@ static void low_level_init(struct netif *netif)
|
|||
TxPktSemaphore = xSemaphoreCreateBinary();
|
||||
|
||||
/* create the task that handles the ETH_MAC */
|
||||
/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
|
||||
/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
|
||||
osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE);
|
||||
osThreadCreate(osThread(EthIf), netif);
|
||||
/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
|
||||
/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
|
||||
|
||||
/* USER CODE BEGIN PHY_PRE_CONFIG */
|
||||
/* USER CODE BEGIN PHY_PRE_CONFIG */
|
||||
|
||||
/* USER CODE END PHY_PRE_CONFIG */
|
||||
/* USER CODE END PHY_PRE_CONFIG */
|
||||
/* Set PHY IO functions */
|
||||
LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx);
|
||||
|
||||
|
|
@ -270,7 +270,7 @@ static void low_level_init(struct netif *netif)
|
|||
PHYLinkState = LAN8742_GetLinkState(&LAN8742);
|
||||
|
||||
/* Get link state */
|
||||
if (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
|
||||
if(PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
|
||||
{
|
||||
netif_set_link_down(netif);
|
||||
netif_set_down(netif);
|
||||
|
|
@ -301,20 +301,21 @@ static void low_level_init(struct netif *netif)
|
|||
break;
|
||||
}
|
||||
|
||||
/* Get MAC Config MAC */
|
||||
HAL_ETH_GetMACConfig(&heth, &MACConf);
|
||||
MACConf.DuplexMode = duplex;
|
||||
MACConf.Speed = speed;
|
||||
HAL_ETH_SetMACConfig(&heth, &MACConf);
|
||||
/* Get MAC Config MAC */
|
||||
HAL_ETH_GetMACConfig(&heth, &MACConf);
|
||||
MACConf.DuplexMode = duplex;
|
||||
MACConf.Speed = speed;
|
||||
HAL_ETH_SetMACConfig(&heth, &MACConf);
|
||||
|
||||
HAL_ETH_Start_IT(&heth);
|
||||
netif_set_up(netif);
|
||||
netif_set_link_up(netif);
|
||||
HAL_ETH_Start_IT(&heth);
|
||||
netif_set_up(netif);
|
||||
netif_set_link_up(netif);
|
||||
|
||||
/* USER CODE BEGIN PHY_POST_CONFIG */
|
||||
/* USER CODE BEGIN PHY_POST_CONFIG */
|
||||
|
||||
/* USER CODE END PHY_POST_CONFIG */
|
||||
/* USER CODE END PHY_POST_CONFIG */
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -322,9 +323,9 @@ static void low_level_init(struct netif *netif)
|
|||
}
|
||||
#endif /* LWIP_ARP || LWIP_ETHERNET */
|
||||
|
||||
/* USER CODE BEGIN LOW_LEVEL_INIT */
|
||||
/* USER CODE BEGIN LOW_LEVEL_INIT */
|
||||
|
||||
/* USER CODE END LOW_LEVEL_INIT */
|
||||
/* USER CODE END LOW_LEVEL_INIT */
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -350,22 +351,22 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
|
|||
err_t errval = ERR_OK;
|
||||
ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
|
||||
|
||||
memset(Txbuffer, 0, ETH_TX_DESC_CNT * sizeof(ETH_BufferTypeDef));
|
||||
memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
|
||||
|
||||
for (q = p; q != NULL; q = q->next)
|
||||
for(q = p; q != NULL; q = q->next)
|
||||
{
|
||||
if (i >= ETH_TX_DESC_CNT)
|
||||
if(i >= ETH_TX_DESC_CNT)
|
||||
return ERR_IF;
|
||||
|
||||
Txbuffer[i].buffer = q->payload;
|
||||
Txbuffer[i].len = q->len;
|
||||
|
||||
if (i > 0)
|
||||
if(i>0)
|
||||
{
|
||||
Txbuffer[i - 1].next = &Txbuffer[i];
|
||||
Txbuffer[i-1].next = &Txbuffer[i];
|
||||
}
|
||||
|
||||
if (q->next == NULL)
|
||||
if(q->next == NULL)
|
||||
{
|
||||
Txbuffer[i].next = NULL;
|
||||
}
|
||||
|
|
@ -380,7 +381,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
|
|||
pbuf_ref(p);
|
||||
|
||||
HAL_ETH_Transmit_IT(&heth, &TxConfig);
|
||||
while (osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT) != osOK)
|
||||
while(osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
|
||||
|
||||
{
|
||||
}
|
||||
|
|
@ -397,12 +398,12 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
|
|||
* @param netif the lwip network interface structure for this ethernetif
|
||||
* @return a pbuf filled with the received packet (including MAC header)
|
||||
* NULL on memory error
|
||||
*/
|
||||
static struct pbuf *low_level_input(struct netif *netif)
|
||||
*/
|
||||
static struct pbuf * low_level_input(struct netif *netif)
|
||||
{
|
||||
struct pbuf *p = NULL;
|
||||
|
||||
if (RxAllocStatus == RX_ALLOC_OK)
|
||||
if(RxAllocStatus == RX_ALLOC_OK)
|
||||
{
|
||||
HAL_ETH_ReadData(&heth, (void **)&p);
|
||||
}
|
||||
|
|
@ -419,26 +420,26 @@ static struct pbuf *low_level_input(struct netif *netif)
|
|||
*
|
||||
* @param netif the lwip network interface structure for this ethernetif
|
||||
*/
|
||||
static void ethernetif_input(void const *argument)
|
||||
static void ethernetif_input(void const * argument)
|
||||
{
|
||||
struct pbuf *p = NULL;
|
||||
struct netif *netif = (struct netif *)argument;
|
||||
struct netif *netif = (struct netif *) argument;
|
||||
|
||||
for (;;)
|
||||
for( ;; )
|
||||
{
|
||||
if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
|
||||
{
|
||||
do
|
||||
{
|
||||
p = low_level_input(netif);
|
||||
p = low_level_input( netif );
|
||||
if (p != NULL)
|
||||
{
|
||||
if (netif->input(p, netif) != ERR_OK)
|
||||
if (netif->input( p, netif) != ERR_OK )
|
||||
{
|
||||
pbuf_free(p);
|
||||
}
|
||||
}
|
||||
} while (p != NULL);
|
||||
} while(p!=NULL);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -455,11 +456,12 @@ static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const
|
|||
err_t errval;
|
||||
errval = ERR_OK;
|
||||
|
||||
/* USER CODE BEGIN 5 */
|
||||
/* USER CODE BEGIN 5 */
|
||||
|
||||
/* USER CODE END 5 */
|
||||
/* USER CODE END 5 */
|
||||
|
||||
return errval;
|
||||
|
||||
}
|
||||
#endif /* LWIP_ARP */
|
||||
|
||||
|
|
@ -522,13 +524,13 @@ err_t ethernetif_init(struct netif *netif)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Custom Rx pbuf free callback
|
||||
* @param pbuf: pbuf to be freed
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Custom Rx pbuf free callback
|
||||
* @param pbuf: pbuf to be freed
|
||||
* @retval None
|
||||
*/
|
||||
void pbuf_free_custom(struct pbuf *p)
|
||||
{
|
||||
struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p;
|
||||
struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
|
||||
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
|
||||
|
||||
/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
|
||||
|
|
@ -557,19 +559,19 @@ u32_t sys_now(void)
|
|||
/* USER CODE END 6 */
|
||||
|
||||
/**
|
||||
* @brief Initializes the ETH MSP.
|
||||
* @param ethHandle: ETH handle
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Initializes the ETH MSP.
|
||||
* @param ethHandle: ETH handle
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
|
||||
void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if (ethHandle->Instance == ETH)
|
||||
if(ethHandle->Instance==ETH)
|
||||
{
|
||||
/* USER CODE BEGIN ETH_MspInit 0 */
|
||||
/* USER CODE BEGIN ETH_MspInit 0 */
|
||||
|
||||
/* USER CODE END ETH_MspInit 0 */
|
||||
/* USER CODE END ETH_MspInit 0 */
|
||||
/* Enable Peripheral clock */
|
||||
__HAL_RCC_ETH_CLK_ENABLE();
|
||||
|
||||
|
|
@ -587,21 +589,21 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
|
|||
PB12 ------> ETH_TXD0
|
||||
PB13 ------> ETH_TXD1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
|
|
@ -611,19 +613,19 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
|
|||
/* Peripheral interrupt init */
|
||||
HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(ETH_IRQn);
|
||||
/* USER CODE BEGIN ETH_MspInit 1 */
|
||||
/* USER CODE BEGIN ETH_MspInit 1 */
|
||||
|
||||
/* USER CODE END ETH_MspInit 1 */
|
||||
/* USER CODE END ETH_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
|
||||
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
|
||||
{
|
||||
if (ethHandle->Instance == ETH)
|
||||
if(ethHandle->Instance==ETH)
|
||||
{
|
||||
/* USER CODE BEGIN ETH_MspDeInit 0 */
|
||||
/* USER CODE BEGIN ETH_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END ETH_MspDeInit 0 */
|
||||
/* USER CODE END ETH_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_ETH_CLK_DISABLE();
|
||||
|
||||
|
|
@ -638,18 +640,18 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
|
|||
PB12 ------> ETH_TXD0
|
||||
PB13 ------> ETH_TXD1
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
|
||||
|
||||
/* Peripheral interrupt Deinit*/
|
||||
HAL_NVIC_DisableIRQ(ETH_IRQn);
|
||||
|
||||
/* USER CODE BEGIN ETH_MspDeInit 1 */
|
||||
/* USER CODE BEGIN ETH_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END ETH_MspDeInit 1 */
|
||||
/* USER CODE END ETH_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -657,10 +659,10 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
|
|||
PHI IO Functions
|
||||
*******************************************************************************/
|
||||
/**
|
||||
* @brief Initializes the MDIO interface GPIO and clocks.
|
||||
* @param None
|
||||
* @retval 0 if OK, -1 if ERROR
|
||||
*/
|
||||
* @brief Initializes the MDIO interface GPIO and clocks.
|
||||
* @param None
|
||||
* @retval 0 if OK, -1 if ERROR
|
||||
*/
|
||||
int32_t ETH_PHY_IO_Init(void)
|
||||
{
|
||||
/* We assume that MDIO GPIO configuration is already done
|
||||
|
|
@ -674,25 +676,25 @@ int32_t ETH_PHY_IO_Init(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief De-Initializes the MDIO interface .
|
||||
* @param None
|
||||
* @retval 0 if OK, -1 if ERROR
|
||||
*/
|
||||
int32_t ETH_PHY_IO_DeInit(void)
|
||||
* @brief De-Initializes the MDIO interface .
|
||||
* @param None
|
||||
* @retval 0 if OK, -1 if ERROR
|
||||
*/
|
||||
int32_t ETH_PHY_IO_DeInit (void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read a PHY register through the MDIO interface.
|
||||
* @param DevAddr: PHY port address
|
||||
* @param RegAddr: PHY register address
|
||||
* @param pRegVal: pointer to hold the register value
|
||||
* @retval 0 if OK -1 if Error
|
||||
*/
|
||||
* @brief Read a PHY register through the MDIO interface.
|
||||
* @param DevAddr: PHY port address
|
||||
* @param RegAddr: PHY register address
|
||||
* @param pRegVal: pointer to hold the register value
|
||||
* @retval 0 if OK -1 if Error
|
||||
*/
|
||||
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
|
||||
{
|
||||
if (HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
|
||||
if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
|
@ -701,15 +703,15 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Write a value to a PHY register through the MDIO interface.
|
||||
* @param DevAddr: PHY port address
|
||||
* @param RegAddr: PHY register address
|
||||
* @param RegVal: Value to be written
|
||||
* @retval 0 if OK -1 if Error
|
||||
*/
|
||||
* @brief Write a value to a PHY register through the MDIO interface.
|
||||
* @param DevAddr: PHY port address
|
||||
* @param RegAddr: PHY register address
|
||||
* @param RegVal: Value to be written
|
||||
* @retval 0 if OK -1 if Error
|
||||
*/
|
||||
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
|
||||
{
|
||||
if (HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
|
||||
if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
|
@ -718,84 +720,84 @@ int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Get the time in millisecons used for internal PHY driver process.
|
||||
* @retval Time value
|
||||
*/
|
||||
* @brief Get the time in millisecons used for internal PHY driver process.
|
||||
* @retval Time value
|
||||
*/
|
||||
int32_t ETH_PHY_IO_GetTick(void)
|
||||
{
|
||||
return HAL_GetTick();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check the ETH link state then update ETH driver and netif link accordingly.
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Check the ETH link state then update ETH driver and netif link accordingly.
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void ethernet_link_thread(void const *argument)
|
||||
void ethernet_link_thread(void const * argument)
|
||||
{
|
||||
ETH_MACConfigTypeDef MACConf = {0};
|
||||
int32_t PHYLinkState = 0;
|
||||
uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
|
||||
|
||||
struct netif *netif = (struct netif *)argument;
|
||||
/* USER CODE BEGIN ETH link init */
|
||||
struct netif *netif = (struct netif *) argument;
|
||||
/* USER CODE BEGIN ETH link init */
|
||||
|
||||
/* USER CODE END ETH link init */
|
||||
/* USER CODE END ETH link init */
|
||||
|
||||
for (;;)
|
||||
for(;;)
|
||||
{
|
||||
PHYLinkState = LAN8742_GetLinkState(&LAN8742);
|
||||
PHYLinkState = LAN8742_GetLinkState(&LAN8742);
|
||||
|
||||
if (netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
|
||||
if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
|
||||
{
|
||||
HAL_ETH_Stop_IT(&heth);
|
||||
netif_set_down(netif);
|
||||
netif_set_link_down(netif);
|
||||
}
|
||||
else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
|
||||
{
|
||||
switch (PHYLinkState)
|
||||
{
|
||||
HAL_ETH_Stop_IT(&heth);
|
||||
netif_set_down(netif);
|
||||
netif_set_link_down(netif);
|
||||
}
|
||||
else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
|
||||
{
|
||||
switch (PHYLinkState)
|
||||
{
|
||||
case LAN8742_STATUS_100MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_100MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (linkchanged)
|
||||
{
|
||||
/* Get MAC Config MAC */
|
||||
HAL_ETH_GetMACConfig(&heth, &MACConf);
|
||||
MACConf.DuplexMode = duplex;
|
||||
MACConf.Speed = speed;
|
||||
HAL_ETH_SetMACConfig(&heth, &MACConf);
|
||||
HAL_ETH_Start_IT(&heth);
|
||||
netif_set_up(netif);
|
||||
netif_set_link_up(netif);
|
||||
}
|
||||
case LAN8742_STATUS_100MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_100MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN ETH link Thread core code for User BSP */
|
||||
if(linkchanged)
|
||||
{
|
||||
/* Get MAC Config MAC */
|
||||
HAL_ETH_GetMACConfig(&heth, &MACConf);
|
||||
MACConf.DuplexMode = duplex;
|
||||
MACConf.Speed = speed;
|
||||
HAL_ETH_SetMACConfig(&heth, &MACConf);
|
||||
HAL_ETH_Start_IT(&heth);
|
||||
netif_set_up(netif);
|
||||
netif_set_link_up(netif);
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE END ETH link Thread core code for User BSP */
|
||||
/* USER CODE BEGIN ETH link Thread core code for User BSP */
|
||||
|
||||
/* USER CODE END ETH link Thread core code for User BSP */
|
||||
|
||||
osDelay(100);
|
||||
}
|
||||
|
|
@ -803,7 +805,7 @@ void ethernet_link_thread(void const *argument)
|
|||
|
||||
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
|
||||
{
|
||||
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
|
||||
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
|
||||
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
|
||||
if (p)
|
||||
{
|
||||
|
|
@ -820,12 +822,12 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buff)
|
|||
RxAllocStatus = RX_ALLOC_ERROR;
|
||||
*buff = NULL;
|
||||
}
|
||||
/* USER CODE END HAL ETH RxAllocateCallback */
|
||||
/* USER CODE END HAL ETH RxAllocateCallback */
|
||||
}
|
||||
|
||||
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
|
||||
{
|
||||
/* USER CODE BEGIN HAL ETH RxLinkCallback */
|
||||
/* USER CODE BEGIN HAL ETH RxLinkCallback */
|
||||
|
||||
struct pbuf **ppStart = (struct pbuf **)pStart;
|
||||
struct pbuf **ppEnd = (struct pbuf **)pEnd;
|
||||
|
|
@ -857,18 +859,19 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
|
|||
p->tot_len += Length;
|
||||
}
|
||||
|
||||
/* USER CODE END HAL ETH RxLinkCallback */
|
||||
/* USER CODE END HAL ETH RxLinkCallback */
|
||||
}
|
||||
|
||||
void HAL_ETH_TxFreeCallback(uint32_t *buff)
|
||||
void HAL_ETH_TxFreeCallback(uint32_t * buff)
|
||||
{
|
||||
/* USER CODE BEGIN HAL ETH TxFreeCallback */
|
||||
/* USER CODE BEGIN HAL ETH TxFreeCallback */
|
||||
|
||||
pbuf_free((struct pbuf *)buff);
|
||||
|
||||
/* USER CODE END HAL ETH TxFreeCallback */
|
||||
/* USER CODE END HAL ETH TxFreeCallback */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 8 */
|
||||
|
||||
/* USER CODE END 8 */
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,48 @@
|
|||
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
|
||||
// Version: 1.0.0
|
||||
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
|
||||
// refer to STM32F40x STM32F41x datasheets
|
||||
// refer to STM32F42x STM32F43x datasheets
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <h> Debug MCU configuration register (DBGMCU_CR)
|
||||
// <o.2> DBG_STANDBY <i> Debug Standby Mode
|
||||
// <o.1> DBG_STOP <i> Debug Stop Mode
|
||||
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
|
||||
// </h>
|
||||
DbgMCU_CR = 0x00000007;
|
||||
|
||||
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
|
||||
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
|
||||
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
|
||||
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
|
||||
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
|
||||
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
|
||||
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
|
||||
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
|
||||
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
|
||||
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
|
||||
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
|
||||
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
|
||||
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
|
||||
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
|
||||
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
|
||||
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
|
||||
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB1_Fz = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
|
||||
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
|
||||
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
|
||||
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
|
||||
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB2_Fz = 0x00000000;
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
File diff suppressed because one or more lines are too long
|
|
@ -1,4 +1,4 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
|
@ -45,7 +45,7 @@
|
|||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath></ListingPath>
|
||||
<ListingPath />
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
|
|
@ -104,16 +104,16 @@
|
|||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<sDll />
|
||||
<sDllPa />
|
||||
<sDlgDll />
|
||||
<sDlgPa />
|
||||
<sIfile />
|
||||
<tDll />
|
||||
<tDllPa />
|
||||
<tDlgDll />
|
||||
<tDlgPa />
|
||||
<tIfile />
|
||||
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
|
|
@ -130,7 +130,7 @@
|
|||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMDBGFLAGS</Key>
|
||||
<Name></Name>
|
||||
<Name />
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
|
|
@ -148,7 +148,7 @@
|
|||
<Name>-U-O142 -O2254 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Breakpoint />
|
||||
<WatchWindow1>
|
||||
<Ww>
|
||||
<count>0</count>
|
||||
|
|
@ -185,19 +185,19 @@
|
|||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<LintExecutable />
|
||||
<LintConfigFile />
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<pMisraName />
|
||||
<pszMrule />
|
||||
<pSingCmds />
|
||||
<pMultCmds />
|
||||
<pMisraNamep />
|
||||
<pszMrulep />
|
||||
<pSingCmdsp />
|
||||
<pMultCmdsp />
|
||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableFlashSeq>0</EnableFlashSeq>
|
||||
|
|
|
|||
|
|
@ -1,10 +1,7 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_projx.xsd">
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>remote_dido_unit</TargetName>
|
||||
|
|
@ -16,31 +13,31 @@
|
|||
<TargetCommonOption>
|
||||
<Device>STM32F407VGTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F4xx_DFP.2.16.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<PackID>Keil.STM32F4xx_DFP.2.17.1</PackID>
|
||||
<PackURL>https://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<FlashUtilSpec />
|
||||
<StartupFile />
|
||||
<FlashDriverDll />
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<RegisterFile />
|
||||
<MemoryEnv />
|
||||
<Cmp />
|
||||
<Asm />
|
||||
<Linker />
|
||||
<OHString />
|
||||
<InfinionOptionDll />
|
||||
<SLE66CMisc />
|
||||
<SLE66AMisc />
|
||||
<SLE66LinkerMisc />
|
||||
<SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<BinPath />
|
||||
<IncludePath />
|
||||
<LibPath />
|
||||
<RegisterFilePath />
|
||||
<DBRegisterFilePath />
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
|
|
@ -55,15 +52,15 @@
|
|||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath></ListingPath>
|
||||
<ListingPath />
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
|
|
@ -72,8 +69,8 @@
|
|||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
|
|
@ -82,15 +79,15 @@
|
|||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>1</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
<SVCSIdString />
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
|
|
@ -104,8 +101,8 @@
|
|||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<CustomArgument />
|
||||
<IncludeLibraryModules />
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
|
|
@ -139,10 +136,10 @@
|
|||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2V8M.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<Flash4 />
|
||||
<pFcarmOut />
|
||||
<pFcarmGrp />
|
||||
<pFcArmRoot />
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
|
|
@ -175,7 +172,7 @@
|
|||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<RvctDeviceName />
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
|
|
@ -186,7 +183,6 @@
|
|||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<RvdsCdeCp>0</RvdsCdeCp>
|
||||
<nBranchProt>0</nBranchProt>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
|
|
@ -310,7 +306,7 @@
|
|||
<Size>0x4000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
<RvctStartVector />
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
|
|
@ -337,9 +333,9 @@
|
|||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<MiscControls />
|
||||
<Define>USE_HAL_DRIVER,STM32F407xx</Define>
|
||||
<Undefine></Undefine>
|
||||
<Undefine />
|
||||
<IncludePath>../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/system;../User/board/inc</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
|
|
@ -355,9 +351,9 @@
|
|||
<useXO>0</useXO>
|
||||
<ClangAsOpt>1</ClangAsOpt>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<MiscControls />
|
||||
<Define />
|
||||
<Undefine />
|
||||
<IncludePath>../Core/Inc</IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
|
|
@ -368,15 +364,15 @@
|
|||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange></TextAddressRange>
|
||||
<DataAddressRange></DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
<TextAddressRange />
|
||||
<DataAddressRange />
|
||||
<pXoBase />
|
||||
<ScatterFile />
|
||||
<IncludeLibs />
|
||||
<IncludeLibsPath />
|
||||
<Misc />
|
||||
<LinkerInputFile />
|
||||
<DisabledWarnings />
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
|
|
@ -1067,20 +1063,18 @@
|
|||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<apis />
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0" />
|
||||
<targetInfos>
|
||||
<targetInfo name="remote_dido_unit"/>
|
||||
<targetInfo name="remote_dido_unit" />
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
<files />
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
|
|
@ -1089,5 +1083,5 @@
|
|||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
|
||||
</Project>
|
||||
|
||||
|
|
|
|||
|
|
@ -109,8 +109,8 @@ Mcu.PinsNb=59
|
|||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F407VGTx
|
||||
MxCube.Version=6.8.0
|
||||
MxDb.Version=DB.6.0.80
|
||||
MxCube.Version=6.9.2
|
||||
MxDb.Version=DB.6.0.92
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
|
|
@ -411,6 +411,8 @@ ProjectManager.RegisterCallBack=
|
|||
ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=MDK-ARM V5.32
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UAScriptAfterPath=
|
||||
ProjectManager.UAScriptBeforePath=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LWIP_Init-LWIP-false-HAL-false,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true
|
||||
RCC.48MHZClocksFreq_Value=55296000
|
||||
|
|
|
|||
Loading…
Reference in New Issue