CubeMX版本更新
This commit is contained in:
parent
3d9a527b07
commit
d64ef6f220
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@ -23,8 +23,7 @@
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#define __MAIN_H
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#define __MAIN_H
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C"
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extern "C" {
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{
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#endif
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#endif
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/* Includes ------------------------------------------------------------------*/
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/* Includes ------------------------------------------------------------------*/
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@ -221,8 +221,8 @@
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/* Section 2: PHY configuration section */
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/* Section 2: PHY configuration section */
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/* DP83848_PHY_ADDRESS Address*/
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/* LAN8742A PHY Address*/
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#define DP83848_PHY_ADDRESS 0x01U
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#define LAN8742A_PHY_ADDRESS 0x00U
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/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
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/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
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#define PHY_RESET_DELAY 0x000000FFU
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#define PHY_RESET_DELAY 0x000000FFU
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/* PHY Configuration delay */
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/* PHY Configuration delay */
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@ -252,10 +252,13 @@
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#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
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#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
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/* Section 4: Extended PHY Registers */
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/* Section 4: Extended PHY Registers */
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#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
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#define PHY_SR ((uint16_t)0x001FU) /*!< PHY status register Offset */
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#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
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#define PHY_SPEED_STATUS ((uint16_t)0x0004U) /*!< PHY Speed mask */
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#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
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#define PHY_DUPLEX_STATUS ((uint16_t)0x0010U) /*!< PHY Duplex mask */
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#define PHY_ISFR ((uint16_t)0x1DU) /*!< PHY Interrupt Source Flag register Offset */
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#define PHY_ISFR_INT4 ((uint16_t)0x0010U) /*!< PHY Link down inturrupt */
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/* ################## SPI peripheral configuration ########################## */
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/* ################## SPI peripheral configuration ########################## */
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@ -91,8 +91,7 @@ void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackTyp
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* @param None
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* @param None
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* @retval None
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* @retval None
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*/
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*/
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void MX_FREERTOS_Init(void)
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void MX_FREERTOS_Init(void) {
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{
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/* USER CODE BEGIN Init */
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* USER CODE END Init */
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@ -129,6 +128,7 @@ void MX_FREERTOS_Init(void)
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/* USER CODE BEGIN RTOS_THREADS */
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/* USER CODE BEGIN RTOS_THREADS */
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/* add threads, ... */
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/* add threads, ... */
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/* USER CODE END RTOS_THREADS */
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/* USER CODE END RTOS_THREADS */
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}
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}
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/* USER CODE BEGIN Header_start_tcp_task */
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/* USER CODE BEGIN Header_start_tcp_task */
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@ -171,9 +171,9 @@ void start_gpio_di_do_task(void const *argument)
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uint8_t tx_data_len = 7 + DI_MAX;
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uint8_t tx_data_len = 7 + DI_MAX;
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uint8_t tx_data[32] = {0};
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uint8_t tx_data[32] = {0};
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tx_data[0] = FRAME_HEAD; // 帧头
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tx_data[0] = FRAME_HEAD; // 帧头
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tx_data[1] = COM_OK; // 状态
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tx_data[1] = COM_OK; // 状æ??
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tx_data[2] = DEVICE_NUM; // 设备号
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tx_data[2] = DEVICE_NUM; // 设备å<EFBFBD>?
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tx_data[3] = SEND_STATE_CMD; // 命令号
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tx_data[3] = SEND_STATE_CMD; // 命令å<EFBFBD>?
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tx_data[4] = DI_MAX; // 数据长度
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tx_data[4] = DI_MAX; // 数据长度
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for (di_ch = 0; di_ch < DI_MAX; di_ch++)
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for (di_ch = 0; di_ch < DI_MAX; di_ch++)
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{
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{
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@ -106,6 +106,7 @@ int main(void)
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/* Start scheduler */
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/* Start scheduler */
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osKernelStart();
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osKernelStart();
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/* We should never get here as control is now taken by the scheduler */
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/* We should never get here as control is now taken by the scheduler */
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/* Infinite loop */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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/* USER CODE BEGIN WHILE */
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@ -150,7 +151,8 @@ void SystemClock_Config(void)
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/** Initializes the CPU, AHB and APB buses clocks
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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@ -179,8 +181,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
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/* USER CODE BEGIN Callback 0 */
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/* USER CODE BEGIN Callback 0 */
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/* USER CODE END Callback 0 */
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/* USER CODE END Callback 0 */
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if (htim->Instance == TIM1)
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if (htim->Instance == TIM1) {
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{
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HAL_IncTick();
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HAL_IncTick();
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}
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}
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/* USER CODE BEGIN Callback 1 */
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/* USER CODE BEGIN Callback 1 */
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@ -20,6 +20,7 @@
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/* Includes ------------------------------------------------------------------*/
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* USER CODE END Includes */
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@ -315,6 +315,7 @@ static void low_level_init(struct netif *netif)
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/* USER CODE END PHY_POST_CONFIG */
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/* USER CODE END PHY_POST_CONFIG */
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}
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}
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}
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}
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else
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else
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{
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{
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@ -460,6 +461,7 @@ static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const
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/* USER CODE END 5 */
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/* USER CODE END 5 */
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return errval;
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return errval;
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}
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}
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#endif /* LWIP_ARP */
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#endif /* LWIP_ARP */
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@ -872,3 +874,4 @@ void HAL_ETH_TxFreeCallback(uint32_t *buff)
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/* USER CODE BEGIN 8 */
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/* USER CODE BEGIN 8 */
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/* USER CODE END 8 */
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/* USER CODE END 8 */
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@ -0,0 +1,48 @@
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// File: STM32F405_415_407_417_427_437_429_439.dbgconf
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// Version: 1.0.0
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// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
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// refer to STM32F40x STM32F41x datasheets
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// refer to STM32F42x STM32F43x datasheets
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU configuration register (DBGMCU_CR)
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// <o.2> DBG_STANDBY <i> Debug Standby Mode
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// <o.1> DBG_STOP <i> Debug Stop Mode
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// <o.0> DBG_SLEEP <i> Debug Sleep Mode
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// </h>
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DbgMCU_CR = 0x00000007;
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// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
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// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
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// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
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// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
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// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
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// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
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// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
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// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
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// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
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// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
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// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
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// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
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// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
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// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
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// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
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// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
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// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
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// </h>
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DbgMCU_APB1_Fz = 0x00000000;
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// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
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// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
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// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
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// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
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// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
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// </h>
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DbgMCU_APB2_Fz = 0x00000000;
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// <<< end of configuration section >>>
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File diff suppressed because one or more lines are too long
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@ -1,4 +1,4 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<?xml version="1.0" encoding="UTF-8"?>
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<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
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<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
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<SchemaVersion>1.0</SchemaVersion>
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<SchemaVersion>1.0</SchemaVersion>
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<PageWidth>79</PageWidth>
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<PageWidth>79</PageWidth>
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<PageLength>66</PageLength>
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<PageLength>66</PageLength>
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<TabStop>8</TabStop>
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<TabStop>8</TabStop>
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<ListingPath></ListingPath>
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<ListingPath />
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</OPTLEX>
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</OPTLEX>
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<ListingPage>
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<ListingPage>
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<CreateCListing>1</CreateCListing>
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<CreateCListing>1</CreateCListing>
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@ -104,16 +104,16 @@
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<bSchkAxf>0</bSchkAxf>
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<bSchkAxf>0</bSchkAxf>
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<bTchkAxf>0</bTchkAxf>
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<bTchkAxf>0</bTchkAxf>
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<nTsel>6</nTsel>
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<nTsel>6</nTsel>
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<sDll></sDll>
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<sDll />
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<sDllPa></sDllPa>
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<sDllPa />
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<sDlgDll></sDlgDll>
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<sDlgDll />
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<sDlgPa></sDlgPa>
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<sDlgPa />
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<sIfile></sIfile>
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<sIfile />
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<tDll></tDll>
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<tDll />
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<tDllPa></tDllPa>
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<tDllPa />
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<tDlgDll></tDlgDll>
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<tDlgDll />
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<tDlgPa></tDlgPa>
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<tDlgPa />
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<tIfile></tIfile>
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<tIfile />
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<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
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<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
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</DebugOpt>
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</DebugOpt>
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<TargetDriverDllRegistry>
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<TargetDriverDllRegistry>
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<SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Number>0</Number>
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<Key>ARMDBGFLAGS</Key>
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<Key>ARMDBGFLAGS</Key>
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<Name></Name>
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<Name />
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</SetRegEntry>
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</SetRegEntry>
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<SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Number>0</Number>
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@ -185,19 +185,19 @@
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<newCpu>0</newCpu>
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<newCpu>0</newCpu>
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<uProt>0</uProt>
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<uProt>0</uProt>
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</DebugFlag>
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</DebugFlag>
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<LintExecutable></LintExecutable>
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<LintExecutable />
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<LintConfigFile></LintConfigFile>
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<LintConfigFile />
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<bLintAuto>0</bLintAuto>
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<bLintAuto>0</bLintAuto>
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<bAutoGenD>0</bAutoGenD>
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<bAutoGenD>0</bAutoGenD>
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<LntExFlags>0</LntExFlags>
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<LntExFlags>0</LntExFlags>
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<pMisraName></pMisraName>
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<pMisraName />
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<pszMrule></pszMrule>
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<pszMrule />
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<pSingCmds></pSingCmds>
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<pSingCmds />
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<pMultCmds></pMultCmds>
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<pMultCmds />
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<pMisraNamep></pMisraNamep>
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<pMisraNamep />
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<pszMrulep></pszMrulep>
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<pszMrulep />
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<pSingCmdsp></pSingCmdsp>
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<pSingCmdsp />
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<pMultCmdsp></pMultCmdsp>
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<pMultCmdsp />
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<DebugDescription>
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<DebugDescription>
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<Enable>1</Enable>
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<Enable>1</Enable>
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<EnableFlashSeq>0</EnableFlashSeq>
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<EnableFlashSeq>0</EnableFlashSeq>
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@ -1,10 +1,7 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<?xml version="1.0" encoding="UTF-8"?>
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<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_projx.xsd">
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<SchemaVersion>2.1</SchemaVersion>
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<SchemaVersion>2.1</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Targets>
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<Targets>
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<Target>
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<Target>
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<TargetName>remote_dido_unit</TargetName>
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<TargetName>remote_dido_unit</TargetName>
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<TargetCommonOption>
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<TargetCommonOption>
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<Device>STM32F407VGTx</Device>
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<Device>STM32F407VGTx</Device>
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<Vendor>STMicroelectronics</Vendor>
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<Vendor>STMicroelectronics</Vendor>
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<PackID>Keil.STM32F4xx_DFP.2.16.0</PackID>
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<PackID>Keil.STM32F4xx_DFP.2.17.1</PackID>
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<PackURL>http://www.keil.com/pack/</PackURL>
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<PackURL>https://www.keil.com/pack/</PackURL>
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<Cpu>IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ</Cpu>
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<Cpu>IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ</Cpu>
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<FlashUtilSpec></FlashUtilSpec>
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<FlashUtilSpec />
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<StartupFile></StartupFile>
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<StartupFile />
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<FlashDriverDll></FlashDriverDll>
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<FlashDriverDll />
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<DeviceId>0</DeviceId>
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<DeviceId>0</DeviceId>
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<RegisterFile></RegisterFile>
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<RegisterFile />
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<MemoryEnv></MemoryEnv>
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<MemoryEnv />
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<Cmp></Cmp>
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<Cmp />
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<Asm></Asm>
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<Asm />
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<Linker></Linker>
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<Linker />
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<OHString></OHString>
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<OHString />
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<InfinionOptionDll></InfinionOptionDll>
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<InfinionOptionDll />
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<SLE66CMisc></SLE66CMisc>
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<SLE66CMisc />
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<SLE66AMisc></SLE66AMisc>
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<SLE66AMisc />
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<SLE66LinkerMisc></SLE66LinkerMisc>
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<SLE66LinkerMisc />
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<SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile>
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<SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile>
|
||||||
<bCustSvd>0</bCustSvd>
|
<bCustSvd>0</bCustSvd>
|
||||||
<UseEnv>0</UseEnv>
|
<UseEnv>0</UseEnv>
|
||||||
<BinPath></BinPath>
|
<BinPath />
|
||||||
<IncludePath></IncludePath>
|
<IncludePath />
|
||||||
<LibPath></LibPath>
|
<LibPath />
|
||||||
<RegisterFilePath></RegisterFilePath>
|
<RegisterFilePath />
|
||||||
<DBRegisterFilePath></DBRegisterFilePath>
|
<DBRegisterFilePath />
|
||||||
<TargetStatus>
|
<TargetStatus>
|
||||||
<Error>0</Error>
|
<Error>0</Error>
|
||||||
<ExitCodeStop>0</ExitCodeStop>
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
@ -55,15 +52,15 @@
|
||||||
<CreateHexFile>0</CreateHexFile>
|
<CreateHexFile>0</CreateHexFile>
|
||||||
<DebugInformation>1</DebugInformation>
|
<DebugInformation>1</DebugInformation>
|
||||||
<BrowseInformation>0</BrowseInformation>
|
<BrowseInformation>0</BrowseInformation>
|
||||||
<ListingPath></ListingPath>
|
<ListingPath />
|
||||||
<HexFormatSelection>1</HexFormatSelection>
|
<HexFormatSelection>1</HexFormatSelection>
|
||||||
<Merge32K>0</Merge32K>
|
<Merge32K>0</Merge32K>
|
||||||
<CreateBatchFile>0</CreateBatchFile>
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
<BeforeCompile>
|
<BeforeCompile>
|
||||||
<RunUserProg1>0</RunUserProg1>
|
<RunUserProg1>0</RunUserProg1>
|
||||||
<RunUserProg2>0</RunUserProg2>
|
<RunUserProg2>0</RunUserProg2>
|
||||||
<UserProg1Name></UserProg1Name>
|
<UserProg1Name />
|
||||||
<UserProg2Name></UserProg2Name>
|
<UserProg2Name />
|
||||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
<nStopU1X>0</nStopU1X>
|
<nStopU1X>0</nStopU1X>
|
||||||
|
@ -72,8 +69,8 @@
|
||||||
<BeforeMake>
|
<BeforeMake>
|
||||||
<RunUserProg1>0</RunUserProg1>
|
<RunUserProg1>0</RunUserProg1>
|
||||||
<RunUserProg2>0</RunUserProg2>
|
<RunUserProg2>0</RunUserProg2>
|
||||||
<UserProg1Name></UserProg1Name>
|
<UserProg1Name />
|
||||||
<UserProg2Name></UserProg2Name>
|
<UserProg2Name />
|
||||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
<nStopB1X>0</nStopB1X>
|
<nStopB1X>0</nStopB1X>
|
||||||
|
@ -82,15 +79,15 @@
|
||||||
<AfterMake>
|
<AfterMake>
|
||||||
<RunUserProg1>0</RunUserProg1>
|
<RunUserProg1>0</RunUserProg1>
|
||||||
<RunUserProg2>0</RunUserProg2>
|
<RunUserProg2>0</RunUserProg2>
|
||||||
<UserProg1Name></UserProg1Name>
|
<UserProg1Name />
|
||||||
<UserProg2Name></UserProg2Name>
|
<UserProg2Name />
|
||||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
<nStopA1X>0</nStopA1X>
|
<nStopA1X>0</nStopA1X>
|
||||||
<nStopA2X>0</nStopA2X>
|
<nStopA2X>0</nStopA2X>
|
||||||
</AfterMake>
|
</AfterMake>
|
||||||
<SelectedForBatchBuild>1</SelectedForBatchBuild>
|
<SelectedForBatchBuild>1</SelectedForBatchBuild>
|
||||||
<SVCSIdString></SVCSIdString>
|
<SVCSIdString />
|
||||||
</TargetCommonOption>
|
</TargetCommonOption>
|
||||||
<CommonProperty>
|
<CommonProperty>
|
||||||
<UseCPPCompiler>0</UseCPPCompiler>
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
@ -104,8 +101,8 @@
|
||||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
<PublicsOnly>0</PublicsOnly>
|
<PublicsOnly>0</PublicsOnly>
|
||||||
<StopOnExitCode>3</StopOnExitCode>
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
<CustomArgument></CustomArgument>
|
<CustomArgument />
|
||||||
<IncludeLibraryModules></IncludeLibraryModules>
|
<IncludeLibraryModules />
|
||||||
<ComprImg>0</ComprImg>
|
<ComprImg>0</ComprImg>
|
||||||
</CommonProperty>
|
</CommonProperty>
|
||||||
<DllOption>
|
<DllOption>
|
||||||
|
@ -139,10 +136,10 @@
|
||||||
<bUseTDR>1</bUseTDR>
|
<bUseTDR>1</bUseTDR>
|
||||||
<Flash2>BIN\UL2V8M.DLL</Flash2>
|
<Flash2>BIN\UL2V8M.DLL</Flash2>
|
||||||
<Flash3>"" ()</Flash3>
|
<Flash3>"" ()</Flash3>
|
||||||
<Flash4></Flash4>
|
<Flash4 />
|
||||||
<pFcarmOut></pFcarmOut>
|
<pFcarmOut />
|
||||||
<pFcarmGrp></pFcarmGrp>
|
<pFcarmGrp />
|
||||||
<pFcArmRoot></pFcArmRoot>
|
<pFcArmRoot />
|
||||||
<FcArmLst>0</FcArmLst>
|
<FcArmLst>0</FcArmLst>
|
||||||
</Utilities>
|
</Utilities>
|
||||||
<TargetArmAds>
|
<TargetArmAds>
|
||||||
|
@ -175,7 +172,7 @@
|
||||||
<RvctClst>0</RvctClst>
|
<RvctClst>0</RvctClst>
|
||||||
<GenPPlst>0</GenPPlst>
|
<GenPPlst>0</GenPPlst>
|
||||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||||
<RvctDeviceName></RvctDeviceName>
|
<RvctDeviceName />
|
||||||
<mOS>0</mOS>
|
<mOS>0</mOS>
|
||||||
<uocRom>0</uocRom>
|
<uocRom>0</uocRom>
|
||||||
<uocRam>0</uocRam>
|
<uocRam>0</uocRam>
|
||||||
|
@ -186,7 +183,6 @@
|
||||||
<RvdsVP>2</RvdsVP>
|
<RvdsVP>2</RvdsVP>
|
||||||
<RvdsMve>0</RvdsMve>
|
<RvdsMve>0</RvdsMve>
|
||||||
<RvdsCdeCp>0</RvdsCdeCp>
|
<RvdsCdeCp>0</RvdsCdeCp>
|
||||||
<nBranchProt>0</nBranchProt>
|
|
||||||
<hadIRAM2>1</hadIRAM2>
|
<hadIRAM2>1</hadIRAM2>
|
||||||
<hadIROM2>0</hadIROM2>
|
<hadIROM2>0</hadIROM2>
|
||||||
<StupSel>8</StupSel>
|
<StupSel>8</StupSel>
|
||||||
|
@ -310,7 +306,7 @@
|
||||||
<Size>0x4000</Size>
|
<Size>0x4000</Size>
|
||||||
</OCR_RVCT10>
|
</OCR_RVCT10>
|
||||||
</OnChipMemories>
|
</OnChipMemories>
|
||||||
<RvctStartVector></RvctStartVector>
|
<RvctStartVector />
|
||||||
</ArmAdsMisc>
|
</ArmAdsMisc>
|
||||||
<Cads>
|
<Cads>
|
||||||
<interw>1</interw>
|
<interw>1</interw>
|
||||||
|
@ -337,9 +333,9 @@
|
||||||
<v6WtE>0</v6WtE>
|
<v6WtE>0</v6WtE>
|
||||||
<v6Rtti>0</v6Rtti>
|
<v6Rtti>0</v6Rtti>
|
||||||
<VariousControls>
|
<VariousControls>
|
||||||
<MiscControls></MiscControls>
|
<MiscControls />
|
||||||
<Define>USE_HAL_DRIVER,STM32F407xx</Define>
|
<Define>USE_HAL_DRIVER,STM32F407xx</Define>
|
||||||
<Undefine></Undefine>
|
<Undefine />
|
||||||
<IncludePath>../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/system;../User/board/inc</IncludePath>
|
<IncludePath>../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/system;../User/board/inc</IncludePath>
|
||||||
</VariousControls>
|
</VariousControls>
|
||||||
</Cads>
|
</Cads>
|
||||||
|
@ -355,9 +351,9 @@
|
||||||
<useXO>0</useXO>
|
<useXO>0</useXO>
|
||||||
<ClangAsOpt>1</ClangAsOpt>
|
<ClangAsOpt>1</ClangAsOpt>
|
||||||
<VariousControls>
|
<VariousControls>
|
||||||
<MiscControls></MiscControls>
|
<MiscControls />
|
||||||
<Define></Define>
|
<Define />
|
||||||
<Undefine></Undefine>
|
<Undefine />
|
||||||
<IncludePath>../Core/Inc</IncludePath>
|
<IncludePath>../Core/Inc</IncludePath>
|
||||||
</VariousControls>
|
</VariousControls>
|
||||||
</Aads>
|
</Aads>
|
||||||
|
@ -368,15 +364,15 @@
|
||||||
<noStLib>0</noStLib>
|
<noStLib>0</noStLib>
|
||||||
<RepFail>1</RepFail>
|
<RepFail>1</RepFail>
|
||||||
<useFile>0</useFile>
|
<useFile>0</useFile>
|
||||||
<TextAddressRange></TextAddressRange>
|
<TextAddressRange />
|
||||||
<DataAddressRange></DataAddressRange>
|
<DataAddressRange />
|
||||||
<pXoBase></pXoBase>
|
<pXoBase />
|
||||||
<ScatterFile></ScatterFile>
|
<ScatterFile />
|
||||||
<IncludeLibs></IncludeLibs>
|
<IncludeLibs />
|
||||||
<IncludeLibsPath></IncludeLibsPath>
|
<IncludeLibsPath />
|
||||||
<Misc></Misc>
|
<Misc />
|
||||||
<LinkerInputFile></LinkerInputFile>
|
<LinkerInputFile />
|
||||||
<DisabledWarnings></DisabledWarnings>
|
<DisabledWarnings />
|
||||||
</LDads>
|
</LDads>
|
||||||
</TargetArmAds>
|
</TargetArmAds>
|
||||||
</TargetOption>
|
</TargetOption>
|
||||||
|
@ -1067,7 +1063,6 @@
|
||||||
</Groups>
|
</Groups>
|
||||||
</Target>
|
</Target>
|
||||||
</Targets>
|
</Targets>
|
||||||
|
|
||||||
<RTE>
|
<RTE>
|
||||||
<apis />
|
<apis />
|
||||||
<components>
|
<components>
|
||||||
|
@ -1080,7 +1075,6 @@
|
||||||
</components>
|
</components>
|
||||||
<files />
|
<files />
|
||||||
</RTE>
|
</RTE>
|
||||||
|
|
||||||
<LayerInfo>
|
<LayerInfo>
|
||||||
<Layers>
|
<Layers>
|
||||||
<Layer>
|
<Layer>
|
||||||
|
@ -1089,5 +1083,5 @@
|
||||||
</Layer>
|
</Layer>
|
||||||
</Layers>
|
</Layers>
|
||||||
</LayerInfo>
|
</LayerInfo>
|
||||||
|
|
||||||
</Project>
|
</Project>
|
||||||
|
|
||||||
|
|
|
@ -109,8 +109,8 @@ Mcu.PinsNb=59
|
||||||
Mcu.ThirdPartyNb=0
|
Mcu.ThirdPartyNb=0
|
||||||
Mcu.UserConstants=
|
Mcu.UserConstants=
|
||||||
Mcu.UserName=STM32F407VGTx
|
Mcu.UserName=STM32F407VGTx
|
||||||
MxCube.Version=6.8.0
|
MxCube.Version=6.9.2
|
||||||
MxDb.Version=DB.6.0.80
|
MxDb.Version=DB.6.0.92
|
||||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||||
NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||||
|
@ -411,6 +411,8 @@ ProjectManager.RegisterCallBack=
|
||||||
ProjectManager.StackSize=0x400
|
ProjectManager.StackSize=0x400
|
||||||
ProjectManager.TargetToolchain=MDK-ARM V5.32
|
ProjectManager.TargetToolchain=MDK-ARM V5.32
|
||||||
ProjectManager.ToolChainLocation=
|
ProjectManager.ToolChainLocation=
|
||||||
|
ProjectManager.UAScriptAfterPath=
|
||||||
|
ProjectManager.UAScriptBeforePath=
|
||||||
ProjectManager.UnderRoot=false
|
ProjectManager.UnderRoot=false
|
||||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LWIP_Init-LWIP-false-HAL-false,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true
|
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LWIP_Init-LWIP-false-HAL-false,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true
|
||||||
RCC.48MHZClocksFreq_Value=55296000
|
RCC.48MHZClocksFreq_Value=55296000
|
||||||
|
|
Loading…
Reference in New Issue