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CubeMX版本更新

This commit is contained in:
王绪洁 2025-04-10 09:18:10 +08:00
parent 3d9a527b07
commit d64ef6f220
11 changed files with 2307 additions and 351 deletions
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29
Core/Inc/main.h
View File

@ -23,8 +23,7 @@
#define __MAIN_H #define __MAIN_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" extern "C" {
{
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -35,10 +34,10 @@ extern "C"
#include "stdio.h" #include "stdio.h"
#include "tcpserverc.h" #include "tcpserverc.h"
#include <string.h> #include <string.h>
/* USER CODE END Includes */ /* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */ /* USER CODE BEGIN ET */
extern uint8_t tcp_echo_flags_control; extern uint8_t tcp_echo_flags_control;
extern uint8_t send_data_flag_cmd; extern uint8_t send_data_flag_cmd;
@ -63,20 +62,20 @@ extern "C"
#define LOCAL_PORT 5001 #define LOCAL_PORT 5001
/* USER CODE END ET */ /* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */ /* USER CODE BEGIN EC */
/* USER CODE END EC */ /* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */ /* USER CODE BEGIN EM */
/* USER CODE END EM */ /* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/ /* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void); void Error_Handler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */
@ -169,7 +168,7 @@ extern "C"
/* USER CODE BEGIN Private defines */ /* USER CODE BEGIN Private defines */
#define TRUE 0 #define TRUE 0
#define FAIL -1 #define FAIL -1
/* USER CODE END Private defines */ /* USER CODE END Private defines */
#ifdef __cplusplus #ifdef __cplusplus
} }

13
Core/Inc/stm32f4xx_hal_conf.h
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@ -221,8 +221,8 @@
/* Section 2: PHY configuration section */ /* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/ /* LAN8742A PHY Address*/
#define DP83848_PHY_ADDRESS 0x01U #define LAN8742A_PHY_ADDRESS 0x00U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY 0x000000FFU #define PHY_RESET_DELAY 0x000000FFU
/* PHY Configuration delay */ /* PHY Configuration delay */
@ -252,10 +252,13 @@
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */ /* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ #define PHY_SR ((uint16_t)0x001FU) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0004U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0010U) /*!< PHY Duplex mask */
#define PHY_ISFR ((uint16_t)0x1DU) /*!< PHY Interrupt Source Flag register Offset */
#define PHY_ISFR_INT4 ((uint16_t)0x0010U) /*!< PHY Link down inturrupt */
/* ################## SPI peripheral configuration ########################## */ /* ################## SPI peripheral configuration ########################## */

24
Core/Src/freertos.c
View File

@ -63,15 +63,15 @@ extern uint8_t tcp_echo_flags_control;
extern uint8_t send_data_flag_cmd; extern uint8_t send_data_flag_cmd;
/* USER CODE END FunctionPrototypes */ /* USER CODE END FunctionPrototypes */
void start_tcp_task(void const *argument); void start_tcp_task(void const * argument);
void start_gpio_di_do_task(void const *argument); void start_gpio_di_do_task(void const * argument);
void start_leds_task(void const *argument); void start_leds_task(void const * argument);
extern void MX_LWIP_Init(void); extern void MX_LWIP_Init(void);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* GetIdleTaskMemory prototype (linked to static allocation support) */ /* GetIdleTaskMemory prototype (linked to static allocation support) */
void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize); void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */ /* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer; static StaticTask_t xIdleTaskTCBBuffer;
@ -91,8 +91,7 @@ void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackTyp
* @param None * @param None
* @retval None * @retval None
*/ */
void MX_FREERTOS_Init(void) void MX_FREERTOS_Init(void) {
{
/* USER CODE BEGIN Init */ /* USER CODE BEGIN Init */
/* USER CODE END Init */ /* USER CODE END Init */
@ -129,6 +128,7 @@ void MX_FREERTOS_Init(void)
/* USER CODE BEGIN RTOS_THREADS */ /* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */ /* add threads, ... */
/* USER CODE END RTOS_THREADS */ /* USER CODE END RTOS_THREADS */
} }
/* USER CODE BEGIN Header_start_tcp_task */ /* USER CODE BEGIN Header_start_tcp_task */
@ -138,7 +138,7 @@ void MX_FREERTOS_Init(void)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_tcp_task */ /* USER CODE END Header_start_tcp_task */
void start_tcp_task(void const *argument) void start_tcp_task(void const * argument)
{ {
/* init code for LWIP */ /* init code for LWIP */
MX_LWIP_Init(); MX_LWIP_Init();
@ -161,7 +161,7 @@ void start_tcp_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_gpio_di_do_task */ /* USER CODE END Header_start_gpio_di_do_task */
void start_gpio_di_do_task(void const *argument) void start_gpio_di_do_task(void const * argument)
{ {
/* USER CODE BEGIN start_gpio_di_do_task */ /* USER CODE BEGIN start_gpio_di_do_task */
/* Infinite loop */ /* Infinite loop */
@ -171,9 +171,9 @@ void start_gpio_di_do_task(void const *argument)
uint8_t tx_data_len = 7 + DI_MAX; uint8_t tx_data_len = 7 + DI_MAX;
uint8_t tx_data[32] = {0}; uint8_t tx_data[32] = {0};
tx_data[0] = FRAME_HEAD; // 帧头 tx_data[0] = FRAME_HEAD; // 帧头
tx_data[1] = COM_OK; // 状态 tx_data[1] = COM_OK; // 状æ??
tx_data[2] = DEVICE_NUM; // 设备号 tx_data[2] = DEVICE_NUM; // 设备å<EFBFBD>?
tx_data[3] = SEND_STATE_CMD; // 命令号 tx_data[3] = SEND_STATE_CMD; // 命令å<EFBFBD>?
tx_data[4] = DI_MAX; // 数据长度 tx_data[4] = DI_MAX; // 数据长度
for (di_ch = 0; di_ch < DI_MAX; di_ch++) for (di_ch = 0; di_ch < DI_MAX; di_ch++)
{ {
@ -208,7 +208,7 @@ void start_gpio_di_do_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_leds_task */ /* USER CODE END Header_start_leds_task */
void start_leds_task(void const *argument) void start_leds_task(void const * argument)
{ {
/* USER CODE BEGIN start_leds_task */ /* USER CODE BEGIN start_leds_task */
/* Infinite loop */ /* Infinite loop */

7
Core/Src/main.c
View File

@ -106,6 +106,7 @@ int main(void)
/* Start scheduler */ /* Start scheduler */
osKernelStart(); osKernelStart();
/* We should never get here as control is now taken by the scheduler */ /* We should never get here as control is now taken by the scheduler */
/* Infinite loop */ /* Infinite loop */
/* USER CODE BEGIN WHILE */ /* USER CODE BEGIN WHILE */
@ -150,7 +151,8 @@ void SystemClock_Config(void)
/** Initializes the CPU, AHB and APB buses clocks /** Initializes the CPU, AHB and APB buses clocks
*/ */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
@ -179,8 +181,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
/* USER CODE BEGIN Callback 0 */ /* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */ /* USER CODE END Callback 0 */
if (htim->Instance == TIM1) if (htim->Instance == TIM1) {
{
HAL_IncTick(); HAL_IncTick();
} }
/* USER CODE BEGIN Callback 1 */ /* USER CODE BEGIN Callback 1 */

1
Core/Src/stm32f4xx_hal_msp.c
View File

@ -20,6 +20,7 @@
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "main.h" #include "main.h"
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
/* USER CODE END Includes */ /* USER CODE END Includes */

141
LWIP/Target/ethernetif.c
View File

@ -38,7 +38,7 @@
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* The time to block waiting for input. */ /* The time to block waiting for input. */
#define TIME_WAITING_FOR_INPUT (portMAX_DELAY) #define TIME_WAITING_FOR_INPUT ( portMAX_DELAY )
/* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */ /* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */
/* Stack size of the interface thread */ /* Stack size of the interface thread */
#define INTERFACE_THREAD_STACK_SIZE (350) #define INTERFACE_THREAD_STACK_SIZE (350)
@ -48,7 +48,7 @@
#define IFNAME1 't' #define IFNAME1 't'
/* ETH Setting */ /* ETH Setting */
#define ETH_DMA_TRANSMIT_TIMEOUT (20U) #define ETH_DMA_TRANSMIT_TIMEOUT ( 20U )
#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U) #define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
@ -113,9 +113,9 @@ ETH_HandleTypeDef heth;
ETH_TxPacketConfig TxConfig; ETH_TxPacketConfig TxConfig;
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
static void ethernetif_input(void const *argument); static void ethernetif_input(void const * argument);
int32_t ETH_PHY_IO_Init(void); int32_t ETH_PHY_IO_Init(void);
int32_t ETH_PHY_IO_DeInit(void); int32_t ETH_PHY_IO_DeInit (void);
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal); int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal); int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
int32_t ETH_PHY_IO_GetTick(void); int32_t ETH_PHY_IO_GetTick(void);
@ -159,7 +159,7 @@ void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
*/ */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth) void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{ {
if ((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS) if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
{ {
osSemaphoreRelease(RxPktSemaphore); osSemaphoreRelease(RxPktSemaphore);
} }
@ -187,7 +187,7 @@ static void low_level_init(struct netif *netif)
ETH_MACConfigTypeDef MACConf = {0}; ETH_MACConfigTypeDef MACConf = {0};
/* Start ETH HAL Init */ /* Start ETH HAL Init */
uint8_t MACAddr[6]; uint8_t MACAddr[6] ;
heth.Instance = ETH; heth.Instance = ETH;
MACAddr[0] = 0x00; MACAddr[0] = 0x00;
MACAddr[1] = 0x80; MACAddr[1] = 0x80;
@ -210,7 +210,7 @@ static void low_level_init(struct netif *netif)
hal_eth_init_status = HAL_ETH_Init(&heth); hal_eth_init_status = HAL_ETH_Init(&heth);
memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig)); memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
@ -236,13 +236,13 @@ static void low_level_init(struct netif *netif)
/* maximum transfer unit */ /* maximum transfer unit */
netif->mtu = ETH_MAX_PAYLOAD; netif->mtu = ETH_MAX_PAYLOAD;
/* Accept broadcast address and ARP traffic */ /* Accept broadcast address and ARP traffic */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
#if LWIP_ARP #if LWIP_ARP
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
#else #else
netif->flags |= NETIF_FLAG_BROADCAST; netif->flags |= NETIF_FLAG_BROADCAST;
#endif /* LWIP_ARP */ #endif /* LWIP_ARP */
/* create a binary semaphore used for informing ethernetif of frame reception */ /* create a binary semaphore used for informing ethernetif of frame reception */
RxPktSemaphore = xSemaphoreCreateBinary(); RxPktSemaphore = xSemaphoreCreateBinary();
@ -251,14 +251,14 @@ static void low_level_init(struct netif *netif)
TxPktSemaphore = xSemaphoreCreateBinary(); TxPktSemaphore = xSemaphoreCreateBinary();
/* create the task that handles the ETH_MAC */ /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE); osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE);
osThreadCreate(osThread(EthIf), netif); osThreadCreate(osThread(EthIf), netif);
/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
/* USER CODE BEGIN PHY_PRE_CONFIG */ /* USER CODE BEGIN PHY_PRE_CONFIG */
/* USER CODE END PHY_PRE_CONFIG */ /* USER CODE END PHY_PRE_CONFIG */
/* Set PHY IO functions */ /* Set PHY IO functions */
LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx); LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx);
@ -270,7 +270,7 @@ static void low_level_init(struct netif *netif)
PHYLinkState = LAN8742_GetLinkState(&LAN8742); PHYLinkState = LAN8742_GetLinkState(&LAN8742);
/* Get link state */ /* Get link state */
if (PHYLinkState <= LAN8742_STATUS_LINK_DOWN) if(PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
{ {
netif_set_link_down(netif); netif_set_link_down(netif);
netif_set_down(netif); netif_set_down(netif);
@ -311,10 +311,11 @@ static void low_level_init(struct netif *netif)
netif_set_up(netif); netif_set_up(netif);
netif_set_link_up(netif); netif_set_link_up(netif);
/* USER CODE BEGIN PHY_POST_CONFIG */ /* USER CODE BEGIN PHY_POST_CONFIG */
/* USER CODE END PHY_POST_CONFIG */ /* USER CODE END PHY_POST_CONFIG */
} }
} }
else else
{ {
@ -322,9 +323,9 @@ static void low_level_init(struct netif *netif)
} }
#endif /* LWIP_ARP || LWIP_ETHERNET */ #endif /* LWIP_ARP || LWIP_ETHERNET */
/* USER CODE BEGIN LOW_LEVEL_INIT */ /* USER CODE BEGIN LOW_LEVEL_INIT */
/* USER CODE END LOW_LEVEL_INIT */ /* USER CODE END LOW_LEVEL_INIT */
} }
/** /**
@ -350,22 +351,22 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
err_t errval = ERR_OK; err_t errval = ERR_OK;
ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0}; ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
memset(Txbuffer, 0, ETH_TX_DESC_CNT * sizeof(ETH_BufferTypeDef)); memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
for (q = p; q != NULL; q = q->next) for(q = p; q != NULL; q = q->next)
{ {
if (i >= ETH_TX_DESC_CNT) if(i >= ETH_TX_DESC_CNT)
return ERR_IF; return ERR_IF;
Txbuffer[i].buffer = q->payload; Txbuffer[i].buffer = q->payload;
Txbuffer[i].len = q->len; Txbuffer[i].len = q->len;
if (i > 0) if(i>0)
{ {
Txbuffer[i - 1].next = &Txbuffer[i]; Txbuffer[i-1].next = &Txbuffer[i];
} }
if (q->next == NULL) if(q->next == NULL)
{ {
Txbuffer[i].next = NULL; Txbuffer[i].next = NULL;
} }
@ -380,7 +381,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
pbuf_ref(p); pbuf_ref(p);
HAL_ETH_Transmit_IT(&heth, &TxConfig); HAL_ETH_Transmit_IT(&heth, &TxConfig);
while (osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT) != osOK) while(osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
{ {
} }
@ -398,11 +399,11 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
* @return a pbuf filled with the received packet (including MAC header) * @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error * NULL on memory error
*/ */
static struct pbuf *low_level_input(struct netif *netif) static struct pbuf * low_level_input(struct netif *netif)
{ {
struct pbuf *p = NULL; struct pbuf *p = NULL;
if (RxAllocStatus == RX_ALLOC_OK) if(RxAllocStatus == RX_ALLOC_OK)
{ {
HAL_ETH_ReadData(&heth, (void **)&p); HAL_ETH_ReadData(&heth, (void **)&p);
} }
@ -419,26 +420,26 @@ static struct pbuf *low_level_input(struct netif *netif)
* *
* @param netif the lwip network interface structure for this ethernetif * @param netif the lwip network interface structure for this ethernetif
*/ */
static void ethernetif_input(void const *argument) static void ethernetif_input(void const * argument)
{ {
struct pbuf *p = NULL; struct pbuf *p = NULL;
struct netif *netif = (struct netif *)argument; struct netif *netif = (struct netif *) argument;
for (;;) for( ;; )
{ {
if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK) if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
{ {
do do
{ {
p = low_level_input(netif); p = low_level_input( netif );
if (p != NULL) if (p != NULL)
{ {
if (netif->input(p, netif) != ERR_OK) if (netif->input( p, netif) != ERR_OK )
{ {
pbuf_free(p); pbuf_free(p);
} }
} }
} while (p != NULL); } while(p!=NULL);
} }
} }
} }
@ -455,11 +456,12 @@ static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const
err_t errval; err_t errval;
errval = ERR_OK; errval = ERR_OK;
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
/* USER CODE END 5 */ /* USER CODE END 5 */
return errval; return errval;
} }
#endif /* LWIP_ARP */ #endif /* LWIP_ARP */
@ -528,7 +530,7 @@ err_t ethernetif_init(struct netif *netif)
*/ */
void pbuf_free_custom(struct pbuf *p) void pbuf_free_custom(struct pbuf *p)
{ {
struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p; struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf); LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
@ -562,10 +564,10 @@ u32_t sys_now(void)
* @retval None * @retval None
*/ */
void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle) void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if (ethHandle->Instance == ETH) if(ethHandle->Instance==ETH)
{ {
/* USER CODE BEGIN ETH_MspInit 0 */ /* USER CODE BEGIN ETH_MspInit 0 */
@ -587,21 +589,21 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
PB12 ------> ETH_TXD0 PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1 PB13 ------> ETH_TXD1
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5; GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH; GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7; GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH; GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13; GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -617,9 +619,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
} }
} }
void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle) void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
{ {
if (ethHandle->Instance == ETH) if(ethHandle->Instance==ETH)
{ {
/* USER CODE BEGIN ETH_MspDeInit 0 */ /* USER CODE BEGIN ETH_MspDeInit 0 */
@ -638,11 +640,11 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
PB12 ------> ETH_TXD0 PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1 PB13 ------> ETH_TXD1
*/ */
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5); HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13); HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
/* Peripheral interrupt Deinit*/ /* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(ETH_IRQn); HAL_NVIC_DisableIRQ(ETH_IRQn);
@ -678,7 +680,7 @@ int32_t ETH_PHY_IO_Init(void)
* @param None * @param None
* @retval 0 if OK, -1 if ERROR * @retval 0 if OK, -1 if ERROR
*/ */
int32_t ETH_PHY_IO_DeInit(void) int32_t ETH_PHY_IO_DeInit (void)
{ {
return 0; return 0;
} }
@ -692,7 +694,7 @@ int32_t ETH_PHY_IO_DeInit(void)
*/ */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{ {
if (HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK) if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
{ {
return -1; return -1;
} }
@ -709,7 +711,7 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal
*/ */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{ {
if (HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK) if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
{ {
return -1; return -1;
} }
@ -731,28 +733,28 @@ int32_t ETH_PHY_IO_GetTick(void)
* @retval None * @retval None
*/ */
void ethernet_link_thread(void const *argument) void ethernet_link_thread(void const * argument)
{ {
ETH_MACConfigTypeDef MACConf = {0}; ETH_MACConfigTypeDef MACConf = {0};
int32_t PHYLinkState = 0; int32_t PHYLinkState = 0;
uint32_t linkchanged = 0U, speed = 0U, duplex = 0U; uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
struct netif *netif = (struct netif *)argument; struct netif *netif = (struct netif *) argument;
/* USER CODE BEGIN ETH link init */ /* USER CODE BEGIN ETH link init */
/* USER CODE END ETH link init */ /* USER CODE END ETH link init */
for (;;) for(;;)
{ {
PHYLinkState = LAN8742_GetLinkState(&LAN8742); PHYLinkState = LAN8742_GetLinkState(&LAN8742);
if (netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)) if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
{ {
HAL_ETH_Stop_IT(&heth); HAL_ETH_Stop_IT(&heth);
netif_set_down(netif); netif_set_down(netif);
netif_set_link_down(netif); netif_set_link_down(netif);
} }
else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN)) else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
{ {
switch (PHYLinkState) switch (PHYLinkState)
{ {
@ -780,7 +782,7 @@ void ethernet_link_thread(void const *argument)
break; break;
} }
if (linkchanged) if(linkchanged)
{ {
/* Get MAC Config MAC */ /* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf); HAL_ETH_GetMACConfig(&heth, &MACConf);
@ -793,9 +795,9 @@ void ethernet_link_thread(void const *argument)
} }
} }
/* USER CODE BEGIN ETH link Thread core code for User BSP */ /* USER CODE BEGIN ETH link Thread core code for User BSP */
/* USER CODE END ETH link Thread core code for User BSP */ /* USER CODE END ETH link Thread core code for User BSP */
osDelay(100); osDelay(100);
} }
@ -803,7 +805,7 @@ void ethernet_link_thread(void const *argument)
void HAL_ETH_RxAllocateCallback(uint8_t **buff) void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{ {
/* USER CODE BEGIN HAL ETH RxAllocateCallback */ /* USER CODE BEGIN HAL ETH RxAllocateCallback */
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL); struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
if (p) if (p)
{ {
@ -820,12 +822,12 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buff)
RxAllocStatus = RX_ALLOC_ERROR; RxAllocStatus = RX_ALLOC_ERROR;
*buff = NULL; *buff = NULL;
} }
/* USER CODE END HAL ETH RxAllocateCallback */ /* USER CODE END HAL ETH RxAllocateCallback */
} }
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length) void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{ {
/* USER CODE BEGIN HAL ETH RxLinkCallback */ /* USER CODE BEGIN HAL ETH RxLinkCallback */
struct pbuf **ppStart = (struct pbuf **)pStart; struct pbuf **ppStart = (struct pbuf **)pStart;
struct pbuf **ppEnd = (struct pbuf **)pEnd; struct pbuf **ppEnd = (struct pbuf **)pEnd;
@ -857,18 +859,19 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
p->tot_len += Length; p->tot_len += Length;
} }
/* USER CODE END HAL ETH RxLinkCallback */ /* USER CODE END HAL ETH RxLinkCallback */
} }
void HAL_ETH_TxFreeCallback(uint32_t *buff) void HAL_ETH_TxFreeCallback(uint32_t * buff)
{ {
/* USER CODE BEGIN HAL ETH TxFreeCallback */ /* USER CODE BEGIN HAL ETH TxFreeCallback */
pbuf_free((struct pbuf *)buff); pbuf_free((struct pbuf *)buff);
/* USER CODE END HAL ETH TxFreeCallback */ /* USER CODE END HAL ETH TxFreeCallback */
} }
/* USER CODE BEGIN 8 */ /* USER CODE BEGIN 8 */
/* USER CODE END 8 */ /* USER CODE END 8 */

48
MDK-ARM/DebugConfig/remote_dido_unit_STM32F407VGTx.dbgconf Normal file
View File

@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

1905
MDK-ARM/remote_dido_unit.uvguix.Administrator Normal file
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File diff suppressed because one or more lines are too long

48
MDK-ARM/remote_dido_unit.uvoptx
View File

@ -1,4 +1,4 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8"?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> <ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion> <SchemaVersion>1.0</SchemaVersion>
@ -45,7 +45,7 @@
<PageWidth>79</PageWidth> <PageWidth>79</PageWidth>
<PageLength>66</PageLength> <PageLength>66</PageLength>
<TabStop>8</TabStop> <TabStop>8</TabStop>
<ListingPath></ListingPath> <ListingPath />
</OPTLEX> </OPTLEX>
<ListingPage> <ListingPage>
<CreateCListing>1</CreateCListing> <CreateCListing>1</CreateCListing>
@ -104,16 +104,16 @@
<bSchkAxf>0</bSchkAxf> <bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf> <bTchkAxf>0</bTchkAxf>
<nTsel>6</nTsel> <nTsel>6</nTsel>
<sDll></sDll> <sDll />
<sDllPa></sDllPa> <sDllPa />
<sDlgDll></sDlgDll> <sDlgDll />
<sDlgPa></sDlgPa> <sDlgPa />
<sIfile></sIfile> <sIfile />
<tDll></tDll> <tDll />
<tDllPa></tDllPa> <tDllPa />
<tDlgDll></tDlgDll> <tDlgDll />
<tDlgPa></tDlgPa> <tDlgPa />
<tIfile></tIfile> <tIfile />
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon> <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt> </DebugOpt>
<TargetDriverDllRegistry> <TargetDriverDllRegistry>
@ -130,7 +130,7 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ARMDBGFLAGS</Key> <Key>ARMDBGFLAGS</Key>
<Name></Name> <Name />
</SetRegEntry> </SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
@ -148,7 +148,7 @@
<Name>-U-O142 -O2254 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name> <Name>-U-O142 -O2254 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
</SetRegEntry> </SetRegEntry>
</TargetDriverDllRegistry> </TargetDriverDllRegistry>
<Breakpoint/> <Breakpoint />
<WatchWindow1> <WatchWindow1>
<Ww> <Ww>
<count>0</count> <count>0</count>
@ -185,19 +185,19 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<LintExecutable></LintExecutable> <LintExecutable />
<LintConfigFile></LintConfigFile> <LintConfigFile />
<bLintAuto>0</bLintAuto> <bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD> <bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags> <LntExFlags>0</LntExFlags>
<pMisraName></pMisraName> <pMisraName />
<pszMrule></pszMrule> <pszMrule />
<pSingCmds></pSingCmds> <pSingCmds />
<pMultCmds></pMultCmds> <pMultCmds />
<pMisraNamep></pMisraNamep> <pMisraNamep />
<pszMrulep></pszMrulep> <pszMrulep />
<pSingCmdsp></pSingCmdsp> <pSingCmdsp />
<pMultCmdsp></pMultCmdsp> <pMultCmdsp />
<DebugDescription> <DebugDescription>
<Enable>1</Enable> <Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq> <EnableFlashSeq>0</EnableFlashSeq>

120
MDK-ARM/remote_dido_unit.uvprojx
View File

@ -1,10 +1,7 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?> <?xml version="1.0" encoding="UTF-8"?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion> <SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header> <Header>### uVision Project, (C) Keil Software</Header>
<Targets> <Targets>
<Target> <Target>
<TargetName>remote_dido_unit</TargetName> <TargetName>remote_dido_unit</TargetName>
@ -16,31 +13,31 @@
<TargetCommonOption> <TargetCommonOption>
<Device>STM32F407VGTx</Device> <Device>STM32F407VGTx</Device>
<Vendor>STMicroelectronics</Vendor> <Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F4xx_DFP.2.16.0</PackID> <PackID>Keil.STM32F4xx_DFP.2.17.1</PackID>
<PackURL>http://www.keil.com/pack/</PackURL> <PackURL>https://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ</Cpu> <Cpu>IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ</Cpu>
<FlashUtilSpec></FlashUtilSpec> <FlashUtilSpec />
<StartupFile></StartupFile> <StartupFile />
<FlashDriverDll></FlashDriverDll> <FlashDriverDll />
<DeviceId>0</DeviceId> <DeviceId>0</DeviceId>
<RegisterFile></RegisterFile> <RegisterFile />
<MemoryEnv></MemoryEnv> <MemoryEnv />
<Cmp></Cmp> <Cmp />
<Asm></Asm> <Asm />
<Linker></Linker> <Linker />
<OHString></OHString> <OHString />
<InfinionOptionDll></InfinionOptionDll> <InfinionOptionDll />
<SLE66CMisc></SLE66CMisc> <SLE66CMisc />
<SLE66AMisc></SLE66AMisc> <SLE66AMisc />
<SLE66LinkerMisc></SLE66LinkerMisc> <SLE66LinkerMisc />
<SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile> <SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile>
<bCustSvd>0</bCustSvd> <bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv> <UseEnv>0</UseEnv>
<BinPath></BinPath> <BinPath />
<IncludePath></IncludePath> <IncludePath />
<LibPath></LibPath> <LibPath />
<RegisterFilePath></RegisterFilePath> <RegisterFilePath />
<DBRegisterFilePath></DBRegisterFilePath> <DBRegisterFilePath />
<TargetStatus> <TargetStatus>
<Error>0</Error> <Error>0</Error>
<ExitCodeStop>0</ExitCodeStop> <ExitCodeStop>0</ExitCodeStop>
@ -55,15 +52,15 @@
<CreateHexFile>0</CreateHexFile> <CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation> <DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation> <BrowseInformation>0</BrowseInformation>
<ListingPath></ListingPath> <ListingPath />
<HexFormatSelection>1</HexFormatSelection> <HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K> <Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile> <CreateBatchFile>0</CreateBatchFile>
<BeforeCompile> <BeforeCompile>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2> <RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name> <UserProg1Name />
<UserProg2Name></UserProg2Name> <UserProg2Name />
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X> <nStopU1X>0</nStopU1X>
@ -72,8 +69,8 @@
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2> <RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name> <UserProg1Name />
<UserProg2Name></UserProg2Name> <UserProg2Name />
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X> <nStopB1X>0</nStopB1X>
@ -82,15 +79,15 @@
<AfterMake> <AfterMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2> <RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name> <UserProg1Name />
<UserProg2Name></UserProg2Name> <UserProg2Name />
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X> <nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X> <nStopA2X>0</nStopA2X>
</AfterMake> </AfterMake>
<SelectedForBatchBuild>1</SelectedForBatchBuild> <SelectedForBatchBuild>1</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString> <SVCSIdString />
</TargetCommonOption> </TargetCommonOption>
<CommonProperty> <CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler> <UseCPPCompiler>0</UseCPPCompiler>
@ -104,8 +101,8 @@
<AssembleAssemblyFile>0</AssembleAssemblyFile> <AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly> <PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode> <StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument> <CustomArgument />
<IncludeLibraryModules></IncludeLibraryModules> <IncludeLibraryModules />
<ComprImg>0</ComprImg> <ComprImg>0</ComprImg>
</CommonProperty> </CommonProperty>
<DllOption> <DllOption>
@ -139,10 +136,10 @@
<bUseTDR>1</bUseTDR> <bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2V8M.DLL</Flash2> <Flash2>BIN\UL2V8M.DLL</Flash2>
<Flash3>"" ()</Flash3> <Flash3>"" ()</Flash3>
<Flash4></Flash4> <Flash4 />
<pFcarmOut></pFcarmOut> <pFcarmOut />
<pFcarmGrp></pFcarmGrp> <pFcarmGrp />
<pFcArmRoot></pFcArmRoot> <pFcArmRoot />
<FcArmLst>0</FcArmLst> <FcArmLst>0</FcArmLst>
</Utilities> </Utilities>
<TargetArmAds> <TargetArmAds>
@ -175,7 +172,7 @@
<RvctClst>0</RvctClst> <RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst> <GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType> <AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName> <RvctDeviceName />
<mOS>0</mOS> <mOS>0</mOS>
<uocRom>0</uocRom> <uocRom>0</uocRom>
<uocRam>0</uocRam> <uocRam>0</uocRam>
@ -186,7 +183,6 @@
<RvdsVP>2</RvdsVP> <RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve> <RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp> <RvdsCdeCp>0</RvdsCdeCp>
<nBranchProt>0</nBranchProt>
<hadIRAM2>1</hadIRAM2> <hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2> <hadIROM2>0</hadIROM2>
<StupSel>8</StupSel> <StupSel>8</StupSel>
@ -310,7 +306,7 @@
<Size>0x4000</Size> <Size>0x4000</Size>
</OCR_RVCT10> </OCR_RVCT10>
</OnChipMemories> </OnChipMemories>
<RvctStartVector></RvctStartVector> <RvctStartVector />
</ArmAdsMisc> </ArmAdsMisc>
<Cads> <Cads>
<interw>1</interw> <interw>1</interw>
@ -337,9 +333,9 @@
<v6WtE>0</v6WtE> <v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti> <v6Rtti>0</v6Rtti>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls />
<Define>USE_HAL_DRIVER,STM32F407xx</Define> <Define>USE_HAL_DRIVER,STM32F407xx</Define>
<Undefine></Undefine> <Undefine />
<IncludePath>../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/system;../User/board/inc</IncludePath> <IncludePath>../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/system;../User/board/inc</IncludePath>
</VariousControls> </VariousControls>
</Cads> </Cads>
@ -355,9 +351,9 @@
<useXO>0</useXO> <useXO>0</useXO>
<ClangAsOpt>1</ClangAsOpt> <ClangAsOpt>1</ClangAsOpt>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls />
<Define></Define> <Define />
<Undefine></Undefine> <Undefine />
<IncludePath>../Core/Inc</IncludePath> <IncludePath>../Core/Inc</IncludePath>
</VariousControls> </VariousControls>
</Aads> </Aads>
@ -368,15 +364,15 @@
<noStLib>0</noStLib> <noStLib>0</noStLib>
<RepFail>1</RepFail> <RepFail>1</RepFail>
<useFile>0</useFile> <useFile>0</useFile>
<TextAddressRange></TextAddressRange> <TextAddressRange />
<DataAddressRange></DataAddressRange> <DataAddressRange />
<pXoBase></pXoBase> <pXoBase />
<ScatterFile></ScatterFile> <ScatterFile />
<IncludeLibs></IncludeLibs> <IncludeLibs />
<IncludeLibsPath></IncludeLibsPath> <IncludeLibsPath />
<Misc></Misc> <Misc />
<LinkerInputFile></LinkerInputFile> <LinkerInputFile />
<DisabledWarnings></DisabledWarnings> <DisabledWarnings />
</LDads> </LDads>
</TargetArmAds> </TargetArmAds>
</TargetOption> </TargetOption>
@ -1067,20 +1063,18 @@
</Groups> </Groups>
</Target> </Target>
</Targets> </Targets>
<RTE> <RTE>
<apis/> <apis />
<components> <components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core"> <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/> <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0" />
<targetInfos> <targetInfos>
<targetInfo name="remote_dido_unit"/> <targetInfo name="remote_dido_unit" />
</targetInfos> </targetInfos>
</component> </component>
</components> </components>
<files/> <files />
</RTE> </RTE>
<LayerInfo> <LayerInfo>
<Layers> <Layers>
<Layer> <Layer>
@ -1089,5 +1083,5 @@
</Layer> </Layer>
</Layers> </Layers>
</LayerInfo> </LayerInfo>
</Project> </Project>

6
remote_dido_unit.ioc
View File

@ -109,8 +109,8 @@ Mcu.PinsNb=59
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32F407VGTx Mcu.UserName=STM32F407VGTx
MxCube.Version=6.8.0 MxCube.Version=6.9.2
MxDb.Version=DB.6.0.80 MxDb.Version=DB.6.0.92
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
@ -411,6 +411,8 @@ ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400 ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5.32 ProjectManager.TargetToolchain=MDK-ARM V5.32
ProjectManager.ToolChainLocation= ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LWIP_Init-LWIP-false-HAL-false,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LWIP_Init-LWIP-false-HAL-false,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true
RCC.48MHZClocksFreq_Value=55296000 RCC.48MHZClocksFreq_Value=55296000