diff --git a/.mxproject b/.mxproject index 65c7bbb..8e954f8 100644 --- a/.mxproject +++ b/.mxproject @@ -1,44 +1,38 @@ [PreviousLibFiles] -LibFiles=Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_eth.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_spi.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_usart.h;Middlewares\Third_Party\FreeRTOS\Source\include\croutine.h;Middlewares\Third_Party\FreeRTOS\Source\include\deprecated_definitions.h;Middlewares\Third_Party\FreeRTOS\Source\include\event_groups.h;Middlewares\Third_Party\FreeRTOS\Source\include\FreeRTOS.h;Middlewares\Third_Party\FreeRTOS\Source\include\list.h;Middlewares\Third_Party\FreeRTOS\Source\include\message_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_prototypes.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_wrappers.h;Middlewares\Third_Party\FreeRTOS\Source\include\portable.h;Middlewares\Third_Party\FreeRTOS\Source\include\projdefs.h;Middlewares\Third_Party\FreeRTOS\Source\include\queue.h;Middlewares\Third_Party\FreeRTOS\Source\include\semphr.h;Middlewares\Third_Party\FreeRTOS\Source\include\stack_macros.h;Middlewares\Third_Party\FreeRTOS\Source\include\StackMacros.h;Middlewares\Third_Party\FreeRTOS\Source\include\stream_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\task.h;Middlewares\Third_Party\FreeRTOS\Source\include\timers.h;Middlewares\Third_Party\FreeRTOS\Source\include\atomic.h;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.h;Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\portmacro.h;Drivers\BSP\Components\lan8742\lan8742.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ccp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap_ms.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap-md5.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap-new.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\eap.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\eui64.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\fsm.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ipcp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ipv6cp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\lcp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\magic.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\mppe.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp_impl.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppapi.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppcrypt.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppdebug.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppoe.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppol2tp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppos.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\upap.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\vj.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ecp.h;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_eth.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c;Drivers\BSP\Components\lan8742\lan8742.c;Middlewares\Third_Party\LwIP\src\netif\ppp\auth.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ccp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\chap_ms.c;Middlewares\Third_Party\LwIP\src\netif\ppp\chap-md5.c;Middlewares\Third_Party\LwIP\src\netif\ppp\chap-new.c;Middlewares\Third_Party\LwIP\src\netif\ppp\demand.c;Middlewares\Third_Party\LwIP\src\netif\ppp\eap.c;Middlewares\Third_Party\LwIP\src\netif\ppp\eui64.c;Middlewares\Third_Party\LwIP\src\netif\ppp\fsm.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ipcp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ipv6cp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\lcp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\magic.c;Middlewares\Third_Party\LwIP\src\netif\ppp\mppe.c;Middlewares\Third_Party\LwIP\src\netif\ppp\multilink.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ppp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppapi.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppcrypt.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppoe.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppol2tp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppos.c;Middlewares\Third_Party\LwIP\src\netif\ppp\upap.c;Middlewares\Third_Party\LwIP\src\netif\ppp\utils.c;Middlewares\Third_Party\LwIP\src\netif\ppp\vj.c;Middlewares\Third_Party\LwIP\src\netif\bridgeif.c;Middlewares\Third_Party\LwIP\src\netif\bridgeif_fdb.c;Middlewares\Third_Party\LwIP\src\netif\ethernet.c;Middlewares\Third_Party\LwIP\src\netif\lowpan6.c;Middlewares\Third_Party\LwIP\src\netif\lowpan6_ble.c;Middlewares\Third_Party\LwIP\src\netif\lowpan6_common.c;Middlewares\Third_Party\LwIP\src\netif\slipif.c;Middlewares\Third_Party\LwIP\src\netif\zepif.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ecp.c;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_eth.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_spi.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_usart.h;Middlewares\Third_Party\FreeRTOS\Source\include\croutine.h;Middlewares\Third_Party\FreeRTOS\Source\include\deprecated_definitions.h;Middlewares\Third_Party\FreeRTOS\Source\include\event_groups.h;Middlewares\Third_Party\FreeRTOS\Source\include\FreeRTOS.h;Middlewares\Third_Party\FreeRTOS\Source\include\list.h;Middlewares\Third_Party\FreeRTOS\Source\include\message_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_prototypes.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_wrappers.h;Middlewares\Third_Party\FreeRTOS\Source\include\portable.h;Middlewares\Third_Party\FreeRTOS\Source\include\projdefs.h;Middlewares\Third_Party\FreeRTOS\Source\include\queue.h;Middlewares\Third_Party\FreeRTOS\Source\include\semphr.h;Middlewares\Third_Party\FreeRTOS\Source\include\stack_macros.h;Middlewares\Third_Party\FreeRTOS\Source\include\StackMacros.h;Middlewares\Third_Party\FreeRTOS\Source\include\stream_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\task.h;Middlewares\Third_Party\FreeRTOS\Source\include\timers.h;Middlewares\Third_Party\FreeRTOS\Source\include\atomic.h;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.h;Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\portmacro.h;Drivers\BSP\Components\lan8742\lan8742.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ccp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap_ms.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap-md5.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap-new.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\eap.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\eui64.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\fsm.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ipcp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ipv6cp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\lcp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\magic.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\mppe.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp_impl.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppapi.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppcrypt.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppdebug.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppoe.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppol2tp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppos.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\upap.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\vj.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ecp.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Middlewares\Third_Party\LwIP\src\include\lwip\altcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\altcp_tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\altcp_tls.h;Middlewares\Third_Party\LwIP\src\include\lwip\api.h;Middlewares\Third_Party\LwIP\src\include\lwip\arch.h;Middlewares\Third_Party\LwIP\src\include\lwip\autoip.h;Middlewares\Third_Party\LwIP\src\include\lwip\debug.h;Middlewares\Third_Party\LwIP\src\include\lwip\def.h;Middlewares\Third_Party\LwIP\src\include\lwip\dhcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\dhcp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\dns.h;Middlewares\Third_Party\LwIP\src\include\lwip\err.h;Middlewares\Third_Party\LwIP\src\include\lwip\errno.h;Middlewares\Third_Party\LwIP\src\include\lwip\etharp.h;Middlewares\Third_Party\LwIP\src\include\lwip\ethip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\icmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\icmp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\if_api.h;Middlewares\Third_Party\LwIP\src\include\lwip\igmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\inet.h;Middlewares\Third_Party\LwIP\src\include\lwip\inet_chksum.h;Middlewares\Third_Party\LwIP\src\include\lwip\init.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4_frag.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_frag.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_zone.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\mem.h;Middlewares\Third_Party\LwIP\src\include\lwip\memp.h;Middlewares\Third_Party\LwIP\src\include\lwip\mld6.h;Middlewares\Third_Party\LwIP\src\include\lwip\nd6.h;Middlewares\Third_Party\LwIP\src\include\lwip\netbuf.h;Middlewares\Third_Party\LwIP\src\include\lwip\netdb.h;Middlewares\Third_Party\LwIP\src\include\lwip\netif.h;Middlewares\Third_Party\LwIP\src\include\lwip\netifapi.h;Middlewares\Third_Party\LwIP\src\include\lwip\opt.h;Middlewares\Third_Party\LwIP\src\include\lwip\pbuf.h;Middlewares\Third_Party\LwIP\src\include\lwip\raw.h;Middlewares\Third_Party\LwIP\src\include\lwip\sio.h;Middlewares\Third_Party\LwIP\src\include\lwip\snmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\sockets.h;Middlewares\Third_Party\LwIP\src\include\lwip\stats.h;Middlewares\Third_Party\LwIP\src\include\lwip\sys.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcpbase.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcpip.h;Middlewares\Third_Party\LwIP\src\include\lwip\timeouts.h;Middlewares\Third_Party\LwIP\src\include\lwip\udp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\altcp_proxyconnect.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\altcp_tls_mbedtls_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\fs.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\httpd.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\httpd_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\http_client.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\lwiperf.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\netbiosns.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\netbiosns_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\smtp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\smtp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmpv3.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_core.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_mib2.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_scalar.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_snmpv2_framework.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_snmpv2_usm.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_table.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_threadsync.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\sntp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\sntp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\tftp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\tftp_server.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\altcp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\api_msg.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\memp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\memp_std.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\mem_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\nd6_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\raw_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\sockets_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\tcpip_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\tcp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\autoip.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dhcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dhcp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dns.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\etharp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ethernet.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\iana.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\icmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\icmp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ieee.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\igmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip4.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\mld6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\nd6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\udp.h;Middlewares\Third_Party\LwIP\src\include\netif\bridgeif.h;Middlewares\Third_Party\LwIP\src\include\netif\bridgeif_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\etharp.h;Middlewares\Third_Party\LwIP\src\include\netif\ethernet.h;Middlewares\Third_Party\LwIP\src\include\netif\ieee802154.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_ble.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_common.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\slipif.h;Middlewares\Third_Party\LwIP\src\include\netif\zepif.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\netdb.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\arpa\inet.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\net\if.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\sys\socket.h;Middlewares\Third_Party\LwIP\src\include\compat\stdc\errno.h;Middlewares\Third_Party\LwIP\system\arch\bpstruct.h;Middlewares\Third_Party\LwIP\system\arch\cc.h;Middlewares\Third_Party\LwIP\system\arch\cpu.h;Middlewares\Third_Party\LwIP\system\arch\epstruct.h;Middlewares\Third_Party\LwIP\system\arch\init.h;Middlewares\Third_Party\LwIP\system\arch\lib.h;Middlewares\Third_Party\LwIP\system\arch\perf.h;Middlewares\Third_Party\LwIP\system\arch\sys_arch.h;Middlewares\Third_Party\LwIP\src\api\api_lib.c;Middlewares\Third_Party\LwIP\src\api\api_msg.c;Middlewares\Third_Party\LwIP\src\api\err.c;Middlewares\Third_Party\LwIP\src\api\if_api.c;Middlewares\Third_Party\LwIP\src\api\netbuf.c;Middlewares\Third_Party\LwIP\src\api\netdb.c;Middlewares\Third_Party\LwIP\src\api\netifapi.c;Middlewares\Third_Party\LwIP\src\api\sockets.c;Middlewares\Third_Party\LwIP\src\api\tcpip.c;Middlewares\Third_Party\LwIP\src\core\altcp.c;Middlewares\Third_Party\LwIP\src\core\altcp_alloc.c;Middlewares\Third_Party\LwIP\src\core\altcp_tcp.c;Middlewares\Third_Party\LwIP\src\core\def.c;Middlewares\Third_Party\LwIP\src\core\dns.c;Middlewares\Third_Party\LwIP\src\core\inet_chksum.c;Middlewares\Third_Party\LwIP\src\core\init.c;Middlewares\Third_Party\LwIP\src\core\ip.c;Middlewares\Third_Party\LwIP\src\core\mem.c;Middlewares\Third_Party\LwIP\src\core\memp.c;Middlewares\Third_Party\LwIP\src\core\netif.c;Middlewares\Third_Party\LwIP\src\core\pbuf.c;Middlewares\Third_Party\LwIP\src\core\raw.c;Middlewares\Third_Party\LwIP\src\core\stats.c;Middlewares\Third_Party\LwIP\src\core\sys.c;Middlewares\Third_Party\LwIP\src\core\tcp.c;Middlewares\Third_Party\LwIP\src\core\tcp_in.c;Middlewares\Third_Party\LwIP\src\core\tcp_out.c;Middlewares\Third_Party\LwIP\src\core\timeouts.c;Middlewares\Third_Party\LwIP\src\core\udp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\autoip.c;Middlewares\Third_Party\LwIP\src\core\ipv4\dhcp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\etharp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\icmp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\igmp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\ip4.c;Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_addr.c;Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_frag.c;Middlewares\Third_Party\LwIP\src\core\ipv6\dhcp6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\ethip6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\icmp6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\inet6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\ip6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_addr.c;Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_frag.c;Middlewares\Third_Party\LwIP\src\core\ipv6\mld6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\nd6.c;Middlewares\Third_Party\LwIP\system\OS\sys_arch.c;Middlewares\Third_Party\LwIP\src\apps\mqtt\mqtt.c;Middlewares\Third_Party\LwIP\src\include\lwip\altcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\altcp_tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\altcp_tls.h;Middlewares\Third_Party\LwIP\src\include\lwip\api.h;Middlewares\Third_Party\LwIP\src\include\lwip\arch.h;Middlewares\Third_Party\LwIP\src\include\lwip\autoip.h;Middlewares\Third_Party\LwIP\src\include\lwip\debug.h;Middlewares\Third_Party\LwIP\src\include\lwip\def.h;Middlewares\Third_Party\LwIP\src\include\lwip\dhcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\dhcp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\dns.h;Middlewares\Third_Party\LwIP\src\include\lwip\err.h;Middlewares\Third_Party\LwIP\src\include\lwip\errno.h;Middlewares\Third_Party\LwIP\src\include\lwip\etharp.h;Middlewares\Third_Party\LwIP\src\include\lwip\ethip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\icmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\icmp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\if_api.h;Middlewares\Third_Party\LwIP\src\include\lwip\igmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\inet.h;Middlewares\Third_Party\LwIP\src\include\lwip\inet_chksum.h;Middlewares\Third_Party\LwIP\src\include\lwip\init.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4_frag.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_frag.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_zone.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\mem.h;Middlewares\Third_Party\LwIP\src\include\lwip\memp.h;Middlewares\Third_Party\LwIP\src\include\lwip\mld6.h;Middlewares\Third_Party\LwIP\src\include\lwip\nd6.h;Middlewares\Third_Party\LwIP\src\include\lwip\netbuf.h;Middlewares\Third_Party\LwIP\src\include\lwip\netdb.h;Middlewares\Third_Party\LwIP\src\include\lwip\netif.h;Middlewares\Third_Party\LwIP\src\include\lwip\netifapi.h;Middlewares\Third_Party\LwIP\src\include\lwip\opt.h;Middlewares\Third_Party\LwIP\src\include\lwip\pbuf.h;Middlewares\Third_Party\LwIP\src\include\lwip\raw.h;Middlewares\Third_Party\LwIP\src\include\lwip\sio.h;Middlewares\Third_Party\LwIP\src\include\lwip\snmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\sockets.h;Middlewares\Third_Party\LwIP\src\include\lwip\stats.h;Middlewares\Third_Party\LwIP\src\include\lwip\sys.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcpbase.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcpip.h;Middlewares\Third_Party\LwIP\src\include\lwip\timeouts.h;Middlewares\Third_Party\LwIP\src\include\lwip\udp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\altcp_proxyconnect.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\altcp_tls_mbedtls_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\fs.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\httpd.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\httpd_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\http_client.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\lwiperf.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\netbiosns.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\netbiosns_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\smtp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\smtp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmpv3.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_core.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_mib2.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_scalar.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_snmpv2_framework.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_snmpv2_usm.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_table.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_threadsync.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\sntp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\sntp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\tftp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\tftp_server.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\altcp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\api_msg.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\memp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\memp_std.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\mem_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\nd6_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\raw_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\sockets_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\tcpip_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\tcp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\autoip.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dhcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dhcp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dns.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\etharp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ethernet.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\iana.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\icmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\icmp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ieee.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\igmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip4.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\mld6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\nd6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\udp.h;Middlewares\Third_Party\LwIP\src\include\netif\bridgeif.h;Middlewares\Third_Party\LwIP\src\include\netif\bridgeif_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\etharp.h;Middlewares\Third_Party\LwIP\src\include\netif\ethernet.h;Middlewares\Third_Party\LwIP\src\include\netif\ieee802154.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_ble.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_common.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\slipif.h;Middlewares\Third_Party\LwIP\src\include\netif\zepif.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\netdb.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\arpa\inet.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\net\if.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\sys\socket.h;Middlewares\Third_Party\LwIP\src\include\compat\stdc\errno.h;Middlewares\Third_Party\LwIP\system\arch\bpstruct.h;Middlewares\Third_Party\LwIP\system\arch\cc.h;Middlewares\Third_Party\LwIP\system\arch\cpu.h;Middlewares\Third_Party\LwIP\system\arch\epstruct.h;Middlewares\Third_Party\LwIP\system\arch\init.h;Middlewares\Third_Party\LwIP\system\arch\lib.h;Middlewares\Third_Party\LwIP\system\arch\perf.h;Middlewares\Third_Party\LwIP\system\arch\sys_arch.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; +LibFiles=Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_eth.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_tim.h;Middlewares\Third_Party\FreeRTOS\Source\include\croutine.h;Middlewares\Third_Party\FreeRTOS\Source\include\deprecated_definitions.h;Middlewares\Third_Party\FreeRTOS\Source\include\event_groups.h;Middlewares\Third_Party\FreeRTOS\Source\include\FreeRTOS.h;Middlewares\Third_Party\FreeRTOS\Source\include\list.h;Middlewares\Third_Party\FreeRTOS\Source\include\message_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_prototypes.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_wrappers.h;Middlewares\Third_Party\FreeRTOS\Source\include\portable.h;Middlewares\Third_Party\FreeRTOS\Source\include\projdefs.h;Middlewares\Third_Party\FreeRTOS\Source\include\queue.h;Middlewares\Third_Party\FreeRTOS\Source\include\semphr.h;Middlewares\Third_Party\FreeRTOS\Source\include\stack_macros.h;Middlewares\Third_Party\FreeRTOS\Source\include\StackMacros.h;Middlewares\Third_Party\FreeRTOS\Source\include\stream_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\task.h;Middlewares\Third_Party\FreeRTOS\Source\include\timers.h;Middlewares\Third_Party\FreeRTOS\Source\include\atomic.h;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.h;Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\portmacro.h;Drivers\BSP\Components\lan8742\lan8742.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ccp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap_ms.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap-md5.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap-new.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\eap.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\eui64.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\fsm.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ipcp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ipv6cp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\lcp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\magic.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\mppe.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp_impl.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppapi.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppcrypt.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppdebug.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppoe.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppol2tp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppos.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\upap.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\vj.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ecp.h;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_eth.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c;Drivers\BSP\Components\lan8742\lan8742.c;Middlewares\Third_Party\LwIP\src\netif\ppp\auth.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ccp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\chap_ms.c;Middlewares\Third_Party\LwIP\src\netif\ppp\chap-md5.c;Middlewares\Third_Party\LwIP\src\netif\ppp\chap-new.c;Middlewares\Third_Party\LwIP\src\netif\ppp\demand.c;Middlewares\Third_Party\LwIP\src\netif\ppp\eap.c;Middlewares\Third_Party\LwIP\src\netif\ppp\eui64.c;Middlewares\Third_Party\LwIP\src\netif\ppp\fsm.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ipcp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ipv6cp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\lcp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\magic.c;Middlewares\Third_Party\LwIP\src\netif\ppp\mppe.c;Middlewares\Third_Party\LwIP\src\netif\ppp\multilink.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ppp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppapi.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppcrypt.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppoe.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppol2tp.c;Middlewares\Third_Party\LwIP\src\netif\ppp\pppos.c;Middlewares\Third_Party\LwIP\src\netif\ppp\upap.c;Middlewares\Third_Party\LwIP\src\netif\ppp\utils.c;Middlewares\Third_Party\LwIP\src\netif\ppp\vj.c;Middlewares\Third_Party\LwIP\src\netif\bridgeif.c;Middlewares\Third_Party\LwIP\src\netif\bridgeif_fdb.c;Middlewares\Third_Party\LwIP\src\netif\ethernet.c;Middlewares\Third_Party\LwIP\src\netif\lowpan6.c;Middlewares\Third_Party\LwIP\src\netif\lowpan6_ble.c;Middlewares\Third_Party\LwIP\src\netif\lowpan6_common.c;Middlewares\Third_Party\LwIP\src\netif\slipif.c;Middlewares\Third_Party\LwIP\src\netif\zepif.c;Middlewares\Third_Party\LwIP\src\netif\ppp\ecp.c;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_eth.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_tim.h;Middlewares\Third_Party\FreeRTOS\Source\include\croutine.h;Middlewares\Third_Party\FreeRTOS\Source\include\deprecated_definitions.h;Middlewares\Third_Party\FreeRTOS\Source\include\event_groups.h;Middlewares\Third_Party\FreeRTOS\Source\include\FreeRTOS.h;Middlewares\Third_Party\FreeRTOS\Source\include\list.h;Middlewares\Third_Party\FreeRTOS\Source\include\message_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_prototypes.h;Middlewares\Third_Party\FreeRTOS\Source\include\mpu_wrappers.h;Middlewares\Third_Party\FreeRTOS\Source\include\portable.h;Middlewares\Third_Party\FreeRTOS\Source\include\projdefs.h;Middlewares\Third_Party\FreeRTOS\Source\include\queue.h;Middlewares\Third_Party\FreeRTOS\Source\include\semphr.h;Middlewares\Third_Party\FreeRTOS\Source\include\stack_macros.h;Middlewares\Third_Party\FreeRTOS\Source\include\StackMacros.h;Middlewares\Third_Party\FreeRTOS\Source\include\stream_buffer.h;Middlewares\Third_Party\FreeRTOS\Source\include\task.h;Middlewares\Third_Party\FreeRTOS\Source\include\timers.h;Middlewares\Third_Party\FreeRTOS\Source\include\atomic.h;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.h;Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\portmacro.h;Drivers\BSP\Components\lan8742\lan8742.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ccp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap_ms.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap-md5.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\chap-new.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\eap.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\eui64.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\fsm.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ipcp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ipv6cp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\lcp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\magic.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\mppe.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp_impl.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ppp_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppapi.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppcrypt.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppdebug.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppoe.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppol2tp.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\pppos.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\upap.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\vj.h;Middlewares\Third_Party\LwIP\src\include\netif\ppp\ecp.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Middlewares\Third_Party\LwIP\src\include\lwip\altcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\altcp_tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\altcp_tls.h;Middlewares\Third_Party\LwIP\src\include\lwip\api.h;Middlewares\Third_Party\LwIP\src\include\lwip\arch.h;Middlewares\Third_Party\LwIP\src\include\lwip\autoip.h;Middlewares\Third_Party\LwIP\src\include\lwip\debug.h;Middlewares\Third_Party\LwIP\src\include\lwip\def.h;Middlewares\Third_Party\LwIP\src\include\lwip\dhcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\dhcp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\dns.h;Middlewares\Third_Party\LwIP\src\include\lwip\err.h;Middlewares\Third_Party\LwIP\src\include\lwip\errno.h;Middlewares\Third_Party\LwIP\src\include\lwip\etharp.h;Middlewares\Third_Party\LwIP\src\include\lwip\ethip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\icmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\icmp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\if_api.h;Middlewares\Third_Party\LwIP\src\include\lwip\igmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\inet.h;Middlewares\Third_Party\LwIP\src\include\lwip\inet_chksum.h;Middlewares\Third_Party\LwIP\src\include\lwip\init.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4_frag.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_frag.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_zone.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\mem.h;Middlewares\Third_Party\LwIP\src\include\lwip\memp.h;Middlewares\Third_Party\LwIP\src\include\lwip\mld6.h;Middlewares\Third_Party\LwIP\src\include\lwip\nd6.h;Middlewares\Third_Party\LwIP\src\include\lwip\netbuf.h;Middlewares\Third_Party\LwIP\src\include\lwip\netdb.h;Middlewares\Third_Party\LwIP\src\include\lwip\netif.h;Middlewares\Third_Party\LwIP\src\include\lwip\netifapi.h;Middlewares\Third_Party\LwIP\src\include\lwip\opt.h;Middlewares\Third_Party\LwIP\src\include\lwip\pbuf.h;Middlewares\Third_Party\LwIP\src\include\lwip\raw.h;Middlewares\Third_Party\LwIP\src\include\lwip\sio.h;Middlewares\Third_Party\LwIP\src\include\lwip\snmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\sockets.h;Middlewares\Third_Party\LwIP\src\include\lwip\stats.h;Middlewares\Third_Party\LwIP\src\include\lwip\sys.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcpbase.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcpip.h;Middlewares\Third_Party\LwIP\src\include\lwip\timeouts.h;Middlewares\Third_Party\LwIP\src\include\lwip\udp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\altcp_proxyconnect.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\altcp_tls_mbedtls_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\fs.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\httpd.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\httpd_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\http_client.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\lwiperf.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\netbiosns.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\netbiosns_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\smtp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\smtp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmpv3.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_core.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_mib2.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_scalar.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_snmpv2_framework.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_snmpv2_usm.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_table.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_threadsync.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\sntp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\sntp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\tftp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\tftp_server.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\altcp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\api_msg.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\memp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\memp_std.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\mem_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\nd6_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\raw_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\sockets_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\tcpip_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\tcp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\autoip.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dhcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dhcp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dns.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\etharp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ethernet.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\iana.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\icmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\icmp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ieee.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\igmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip4.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\mld6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\nd6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\udp.h;Middlewares\Third_Party\LwIP\src\include\netif\bridgeif.h;Middlewares\Third_Party\LwIP\src\include\netif\bridgeif_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\etharp.h;Middlewares\Third_Party\LwIP\src\include\netif\ethernet.h;Middlewares\Third_Party\LwIP\src\include\netif\ieee802154.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_ble.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_common.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\slipif.h;Middlewares\Third_Party\LwIP\src\include\netif\zepif.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\netdb.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\arpa\inet.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\net\if.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\sys\socket.h;Middlewares\Third_Party\LwIP\src\include\compat\stdc\errno.h;Middlewares\Third_Party\LwIP\system\arch\bpstruct.h;Middlewares\Third_Party\LwIP\system\arch\cc.h;Middlewares\Third_Party\LwIP\system\arch\cpu.h;Middlewares\Third_Party\LwIP\system\arch\epstruct.h;Middlewares\Third_Party\LwIP\system\arch\init.h;Middlewares\Third_Party\LwIP\system\arch\lib.h;Middlewares\Third_Party\LwIP\system\arch\perf.h;Middlewares\Third_Party\LwIP\system\arch\sys_arch.h;Middlewares\Third_Party\LwIP\src\api\api_lib.c;Middlewares\Third_Party\LwIP\src\api\api_msg.c;Middlewares\Third_Party\LwIP\src\api\err.c;Middlewares\Third_Party\LwIP\src\api\if_api.c;Middlewares\Third_Party\LwIP\src\api\netbuf.c;Middlewares\Third_Party\LwIP\src\api\netdb.c;Middlewares\Third_Party\LwIP\src\api\netifapi.c;Middlewares\Third_Party\LwIP\src\api\sockets.c;Middlewares\Third_Party\LwIP\src\api\tcpip.c;Middlewares\Third_Party\LwIP\src\core\altcp.c;Middlewares\Third_Party\LwIP\src\core\altcp_alloc.c;Middlewares\Third_Party\LwIP\src\core\altcp_tcp.c;Middlewares\Third_Party\LwIP\src\core\def.c;Middlewares\Third_Party\LwIP\src\core\dns.c;Middlewares\Third_Party\LwIP\src\core\inet_chksum.c;Middlewares\Third_Party\LwIP\src\core\init.c;Middlewares\Third_Party\LwIP\src\core\ip.c;Middlewares\Third_Party\LwIP\src\core\mem.c;Middlewares\Third_Party\LwIP\src\core\memp.c;Middlewares\Third_Party\LwIP\src\core\netif.c;Middlewares\Third_Party\LwIP\src\core\pbuf.c;Middlewares\Third_Party\LwIP\src\core\raw.c;Middlewares\Third_Party\LwIP\src\core\stats.c;Middlewares\Third_Party\LwIP\src\core\sys.c;Middlewares\Third_Party\LwIP\src\core\tcp.c;Middlewares\Third_Party\LwIP\src\core\tcp_in.c;Middlewares\Third_Party\LwIP\src\core\tcp_out.c;Middlewares\Third_Party\LwIP\src\core\timeouts.c;Middlewares\Third_Party\LwIP\src\core\udp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\autoip.c;Middlewares\Third_Party\LwIP\src\core\ipv4\dhcp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\etharp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\icmp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\igmp.c;Middlewares\Third_Party\LwIP\src\core\ipv4\ip4.c;Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_addr.c;Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_frag.c;Middlewares\Third_Party\LwIP\src\core\ipv6\dhcp6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\ethip6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\icmp6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\inet6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\ip6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_addr.c;Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_frag.c;Middlewares\Third_Party\LwIP\src\core\ipv6\mld6.c;Middlewares\Third_Party\LwIP\src\core\ipv6\nd6.c;Middlewares\Third_Party\LwIP\system\OS\sys_arch.c;Middlewares\Third_Party\LwIP\src\apps\mqtt\mqtt.c;Middlewares\Third_Party\LwIP\src\include\lwip\altcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\altcp_tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\altcp_tls.h;Middlewares\Third_Party\LwIP\src\include\lwip\api.h;Middlewares\Third_Party\LwIP\src\include\lwip\arch.h;Middlewares\Third_Party\LwIP\src\include\lwip\autoip.h;Middlewares\Third_Party\LwIP\src\include\lwip\debug.h;Middlewares\Third_Party\LwIP\src\include\lwip\def.h;Middlewares\Third_Party\LwIP\src\include\lwip\dhcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\dhcp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\dns.h;Middlewares\Third_Party\LwIP\src\include\lwip\err.h;Middlewares\Third_Party\LwIP\src\include\lwip\errno.h;Middlewares\Third_Party\LwIP\src\include\lwip\etharp.h;Middlewares\Third_Party\LwIP\src\include\lwip\ethip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\icmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\icmp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\if_api.h;Middlewares\Third_Party\LwIP\src\include\lwip\igmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\inet.h;Middlewares\Third_Party\LwIP\src\include\lwip\inet_chksum.h;Middlewares\Third_Party\LwIP\src\include\lwip\init.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip4_frag.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_frag.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip6_zone.h;Middlewares\Third_Party\LwIP\src\include\lwip\ip_addr.h;Middlewares\Third_Party\LwIP\src\include\lwip\mem.h;Middlewares\Third_Party\LwIP\src\include\lwip\memp.h;Middlewares\Third_Party\LwIP\src\include\lwip\mld6.h;Middlewares\Third_Party\LwIP\src\include\lwip\nd6.h;Middlewares\Third_Party\LwIP\src\include\lwip\netbuf.h;Middlewares\Third_Party\LwIP\src\include\lwip\netdb.h;Middlewares\Third_Party\LwIP\src\include\lwip\netif.h;Middlewares\Third_Party\LwIP\src\include\lwip\netifapi.h;Middlewares\Third_Party\LwIP\src\include\lwip\opt.h;Middlewares\Third_Party\LwIP\src\include\lwip\pbuf.h;Middlewares\Third_Party\LwIP\src\include\lwip\raw.h;Middlewares\Third_Party\LwIP\src\include\lwip\sio.h;Middlewares\Third_Party\LwIP\src\include\lwip\snmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\sockets.h;Middlewares\Third_Party\LwIP\src\include\lwip\stats.h;Middlewares\Third_Party\LwIP\src\include\lwip\sys.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcpbase.h;Middlewares\Third_Party\LwIP\src\include\lwip\tcpip.h;Middlewares\Third_Party\LwIP\src\include\lwip\timeouts.h;Middlewares\Third_Party\LwIP\src\include\lwip\udp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\altcp_proxyconnect.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\altcp_tls_mbedtls_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\fs.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\httpd.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\httpd_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\http_client.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\lwiperf.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mdns_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\mqtt_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\netbiosns.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\netbiosns_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\smtp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\smtp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmpv3.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_core.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_mib2.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_scalar.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_snmpv2_framework.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_snmpv2_usm.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_table.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\snmp_threadsync.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\sntp.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\sntp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\tftp_opts.h;Middlewares\Third_Party\LwIP\src\include\lwip\apps\tftp_server.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\altcp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\api_msg.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\memp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\memp_std.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\mem_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\nd6_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\raw_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\sockets_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\tcpip_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\priv\tcp_priv.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\autoip.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dhcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dhcp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\dns.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\etharp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ethernet.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\iana.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\icmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\icmp6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ieee.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\igmp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip4.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\ip6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\mld6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\nd6.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\tcp.h;Middlewares\Third_Party\LwIP\src\include\lwip\prot\udp.h;Middlewares\Third_Party\LwIP\src\include\netif\bridgeif.h;Middlewares\Third_Party\LwIP\src\include\netif\bridgeif_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\etharp.h;Middlewares\Third_Party\LwIP\src\include\netif\ethernet.h;Middlewares\Third_Party\LwIP\src\include\netif\ieee802154.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_ble.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_common.h;Middlewares\Third_Party\LwIP\src\include\netif\lowpan6_opts.h;Middlewares\Third_Party\LwIP\src\include\netif\slipif.h;Middlewares\Third_Party\LwIP\src\include\netif\zepif.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\netdb.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\arpa\inet.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\net\if.h;Middlewares\Third_Party\LwIP\src\include\compat\posix\sys\socket.h;Middlewares\Third_Party\LwIP\src\include\compat\stdc\errno.h;Middlewares\Third_Party\LwIP\system\arch\bpstruct.h;Middlewares\Third_Party\LwIP\system\arch\cc.h;Middlewares\Third_Party\LwIP\system\arch\cpu.h;Middlewares\Third_Party\LwIP\system\arch\epstruct.h;Middlewares\Third_Party\LwIP\system\arch\init.h;Middlewares\Third_Party\LwIP\system\arch\lib.h;Middlewares\Third_Party\LwIP\system\arch\perf.h;Middlewares\Third_Party\LwIP\system\arch\sys_arch.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; [PreviousUsedKeilFiles] -SourceFiles=..\Core\Src\main.c;..\Core\Src\gpio.c;..\Core\Src\freertos.c;..\Core\Src\dma.c;..\LWIP\App\lwip.c;..\LWIP\Target\ethernetif.c;..\Core\Src\spi.c;..\Core\Src\tim.c;..\Core\Src\usart.c;..\Core\Src\stm32f4xx_it.c;..\Core\Src\stm32f4xx_hal_msp.c;..\Core\Src\stm32f4xx_hal_timebase_tim.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_eth.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c;..\Drivers\BSP\Components\lan8742\lan8742.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\auth.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ccp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap_ms.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-md5.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-new.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\demand.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eui64.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\fsm.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipv6cp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\lcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\magic.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\mppe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\multilink.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ppp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppapi.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppcrypt.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppoe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppol2tp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppos.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\upap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\utils.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\vj.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif_fdb.c;..\Middlewares\Third_Party\LwIP\src\netif\ethernet.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_ble.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_common.c;..\Middlewares\Third_Party\LwIP\src\netif\slipif.c;..\Middlewares\Third_Party\LwIP\src\netif\zepif.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ecp.c;..\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;..\Middlewares\Third_Party\LwIP\src\api\api_lib.c;..\Middlewares\Third_Party\LwIP\src\api\api_msg.c;..\Middlewares\Third_Party\LwIP\src\api\err.c;..\Middlewares\Third_Party\LwIP\src\api\if_api.c;..\Middlewares\Third_Party\LwIP\src\api\netbuf.c;..\Middlewares\Third_Party\LwIP\src\api\netdb.c;..\Middlewares\Third_Party\LwIP\src\api\netifapi.c;..\Middlewares\Third_Party\LwIP\src\api\sockets.c;..\Middlewares\Third_Party\LwIP\src\api\tcpip.c;..\Middlewares\Third_Party\LwIP\src\core\altcp.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_alloc.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_tcp.c;..\Middlewares\Third_Party\LwIP\src\core\def.c;..\Middlewares\Third_Party\LwIP\src\core\dns.c;..\Middlewares\Third_Party\LwIP\src\core\inet_chksum.c;..\Middlewares\Third_Party\LwIP\src\core\init.c;..\Middlewares\Third_Party\LwIP\src\core\ip.c;..\Middlewares\Third_Party\LwIP\src\core\mem.c;..\Middlewares\Third_Party\LwIP\src\core\memp.c;..\Middlewares\Third_Party\LwIP\src\core\netif.c;..\Middlewares\Third_Party\LwIP\src\core\pbuf.c;..\Middlewares\Third_Party\LwIP\src\core\raw.c;..\Middlewares\Third_Party\LwIP\src\core\stats.c;..\Middlewares\Third_Party\LwIP\src\core\sys.c;..\Middlewares\Third_Party\LwIP\src\core\tcp.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_in.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_out.c;..\Middlewares\Third_Party\LwIP\src\core\timeouts.c;..\Middlewares\Third_Party\LwIP\src\core\udp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\autoip.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\dhcp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\etharp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\icmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\igmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\dhcp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ethip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\icmp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\inet6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\mld6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\nd6.c;..\Middlewares\Third_Party\LwIP\system\OS\sys_arch.c;..\Middlewares\Third_Party\LwIP\src\apps\mqtt\mqtt.c;..\Core\Src\system_stm32f4xx.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_eth.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c;..\Drivers\BSP\Components\lan8742\lan8742.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\auth.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ccp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap_ms.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-md5.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-new.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\demand.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eui64.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\fsm.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipv6cp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\lcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\magic.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\mppe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\multilink.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ppp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppapi.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppcrypt.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppoe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppol2tp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppos.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\upap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\utils.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\vj.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif_fdb.c;..\Middlewares\Third_Party\LwIP\src\netif\ethernet.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_ble.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_common.c;..\Middlewares\Third_Party\LwIP\src\netif\slipif.c;..\Middlewares\Third_Party\LwIP\src\netif\zepif.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ecp.c;..\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;..\Middlewares\Third_Party\LwIP\src\api\api_lib.c;..\Middlewares\Third_Party\LwIP\src\api\api_msg.c;..\Middlewares\Third_Party\LwIP\src\api\err.c;..\Middlewares\Third_Party\LwIP\src\api\if_api.c;..\Middlewares\Third_Party\LwIP\src\api\netbuf.c;..\Middlewares\Third_Party\LwIP\src\api\netdb.c;..\Middlewares\Third_Party\LwIP\src\api\netifapi.c;..\Middlewares\Third_Party\LwIP\src\api\sockets.c;..\Middlewares\Third_Party\LwIP\src\api\tcpip.c;..\Middlewares\Third_Party\LwIP\src\core\altcp.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_alloc.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_tcp.c;..\Middlewares\Third_Party\LwIP\src\core\def.c;..\Middlewares\Third_Party\LwIP\src\core\dns.c;..\Middlewares\Third_Party\LwIP\src\core\inet_chksum.c;..\Middlewares\Third_Party\LwIP\src\core\init.c;..\Middlewares\Third_Party\LwIP\src\core\ip.c;..\Middlewares\Third_Party\LwIP\src\core\mem.c;..\Middlewares\Third_Party\LwIP\src\core\memp.c;..\Middlewares\Third_Party\LwIP\src\core\netif.c;..\Middlewares\Third_Party\LwIP\src\core\pbuf.c;..\Middlewares\Third_Party\LwIP\src\core\raw.c;..\Middlewares\Third_Party\LwIP\src\core\stats.c;..\Middlewares\Third_Party\LwIP\src\core\sys.c;..\Middlewares\Third_Party\LwIP\src\core\tcp.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_in.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_out.c;..\Middlewares\Third_Party\LwIP\src\core\timeouts.c;..\Middlewares\Third_Party\LwIP\src\core\udp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\autoip.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\dhcp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\etharp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\icmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\igmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\dhcp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ethip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\icmp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\inet6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\mld6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\nd6.c;..\Middlewares\Third_Party\LwIP\system\OS\sys_arch.c;..\Middlewares\Third_Party\LwIP\src\apps\mqtt\mqtt.c;..\Core\Src\system_stm32f4xx.c;;;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\auth.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ccp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap_ms.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-md5.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-new.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\demand.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eui64.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\fsm.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipv6cp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\lcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\magic.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\mppe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\multilink.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ppp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppapi.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppcrypt.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppoe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppol2tp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppos.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\upap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\utils.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\vj.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif_fdb.c;..\Middlewares\Third_Party\LwIP\src\netif\ethernet.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_ble.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_common.c;..\Middlewares\Third_Party\LwIP\src\netif\slipif.c;..\Middlewares\Third_Party\LwIP\src\netif\zepif.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ecp.c;..\Middlewares\Third_Party\LwIP\src\api\api_lib.c;..\Middlewares\Third_Party\LwIP\src\api\api_msg.c;..\Middlewares\Third_Party\LwIP\src\api\err.c;..\Middlewares\Third_Party\LwIP\src\api\if_api.c;..\Middlewares\Third_Party\LwIP\src\api\netbuf.c;..\Middlewares\Third_Party\LwIP\src\api\netdb.c;..\Middlewares\Third_Party\LwIP\src\api\netifapi.c;..\Middlewares\Third_Party\LwIP\src\api\sockets.c;..\Middlewares\Third_Party\LwIP\src\api\tcpip.c;..\Middlewares\Third_Party\LwIP\src\core\altcp.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_alloc.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_tcp.c;..\Middlewares\Third_Party\LwIP\src\core\def.c;..\Middlewares\Third_Party\LwIP\src\core\dns.c;..\Middlewares\Third_Party\LwIP\src\core\inet_chksum.c;..\Middlewares\Third_Party\LwIP\src\core\init.c;..\Middlewares\Third_Party\LwIP\src\core\ip.c;..\Middlewares\Third_Party\LwIP\src\core\mem.c;..\Middlewares\Third_Party\LwIP\src\core\memp.c;..\Middlewares\Third_Party\LwIP\src\core\netif.c;..\Middlewares\Third_Party\LwIP\src\core\pbuf.c;..\Middlewares\Third_Party\LwIP\src\core\raw.c;..\Middlewares\Third_Party\LwIP\src\core\stats.c;..\Middlewares\Third_Party\LwIP\src\core\sys.c;..\Middlewares\Third_Party\LwIP\src\core\tcp.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_in.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_out.c;..\Middlewares\Third_Party\LwIP\src\core\timeouts.c;..\Middlewares\Third_Party\LwIP\src\core\udp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\autoip.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\dhcp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\etharp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\icmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\igmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\dhcp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ethip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\icmp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\inet6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\mld6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\nd6.c;..\Middlewares\Third_Party\LwIP\system\OS\sys_arch.c;..\Middlewares\Third_Party\LwIP\src\apps\mqtt\mqtt.c; +SourceFiles=..\Core\Src\main.c;..\Core\Src\gpio.c;..\Core\Src\freertos.c;..\LWIP\App\lwip.c;..\LWIP\Target\ethernetif.c;..\Core\Src\tim.c;..\Core\Src\stm32f4xx_it.c;..\Core\Src\stm32f4xx_hal_msp.c;..\Core\Src\stm32f4xx_hal_timebase_tim.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_eth.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c;..\Drivers\BSP\Components\lan8742\lan8742.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\auth.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ccp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap_ms.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-md5.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-new.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\demand.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eui64.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\fsm.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipv6cp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\lcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\magic.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\mppe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\multilink.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ppp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppapi.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppcrypt.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppoe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppol2tp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppos.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\upap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\utils.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\vj.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif_fdb.c;..\Middlewares\Third_Party\LwIP\src\netif\ethernet.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_ble.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_common.c;..\Middlewares\Third_Party\LwIP\src\netif\slipif.c;..\Middlewares\Third_Party\LwIP\src\netif\zepif.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ecp.c;..\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;..\Middlewares\Third_Party\LwIP\src\api\api_lib.c;..\Middlewares\Third_Party\LwIP\src\api\api_msg.c;..\Middlewares\Third_Party\LwIP\src\api\err.c;..\Middlewares\Third_Party\LwIP\src\api\if_api.c;..\Middlewares\Third_Party\LwIP\src\api\netbuf.c;..\Middlewares\Third_Party\LwIP\src\api\netdb.c;..\Middlewares\Third_Party\LwIP\src\api\netifapi.c;..\Middlewares\Third_Party\LwIP\src\api\sockets.c;..\Middlewares\Third_Party\LwIP\src\api\tcpip.c;..\Middlewares\Third_Party\LwIP\src\core\altcp.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_alloc.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_tcp.c;..\Middlewares\Third_Party\LwIP\src\core\def.c;..\Middlewares\Third_Party\LwIP\src\core\dns.c;..\Middlewares\Third_Party\LwIP\src\core\inet_chksum.c;..\Middlewares\Third_Party\LwIP\src\core\init.c;..\Middlewares\Third_Party\LwIP\src\core\ip.c;..\Middlewares\Third_Party\LwIP\src\core\mem.c;..\Middlewares\Third_Party\LwIP\src\core\memp.c;..\Middlewares\Third_Party\LwIP\src\core\netif.c;..\Middlewares\Third_Party\LwIP\src\core\pbuf.c;..\Middlewares\Third_Party\LwIP\src\core\raw.c;..\Middlewares\Third_Party\LwIP\src\core\stats.c;..\Middlewares\Third_Party\LwIP\src\core\sys.c;..\Middlewares\Third_Party\LwIP\src\core\tcp.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_in.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_out.c;..\Middlewares\Third_Party\LwIP\src\core\timeouts.c;..\Middlewares\Third_Party\LwIP\src\core\udp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\autoip.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\dhcp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\etharp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\icmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\igmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\dhcp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ethip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\icmp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\inet6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\mld6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\nd6.c;..\Middlewares\Third_Party\LwIP\system\OS\sys_arch.c;..\Middlewares\Third_Party\LwIP\src\apps\mqtt\mqtt.c;..\Core\Src\system_stm32f4xx.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_eth.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c;..\Drivers\BSP\Components\lan8742\lan8742.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\auth.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ccp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap_ms.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-md5.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-new.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\demand.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eui64.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\fsm.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipv6cp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\lcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\magic.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\mppe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\multilink.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ppp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppapi.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppcrypt.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppoe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppol2tp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppos.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\upap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\utils.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\vj.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif_fdb.c;..\Middlewares\Third_Party\LwIP\src\netif\ethernet.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_ble.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_common.c;..\Middlewares\Third_Party\LwIP\src\netif\slipif.c;..\Middlewares\Third_Party\LwIP\src\netif\zepif.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ecp.c;..\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;..\Middlewares\Third_Party\LwIP\src\api\api_lib.c;..\Middlewares\Third_Party\LwIP\src\api\api_msg.c;..\Middlewares\Third_Party\LwIP\src\api\err.c;..\Middlewares\Third_Party\LwIP\src\api\if_api.c;..\Middlewares\Third_Party\LwIP\src\api\netbuf.c;..\Middlewares\Third_Party\LwIP\src\api\netdb.c;..\Middlewares\Third_Party\LwIP\src\api\netifapi.c;..\Middlewares\Third_Party\LwIP\src\api\sockets.c;..\Middlewares\Third_Party\LwIP\src\api\tcpip.c;..\Middlewares\Third_Party\LwIP\src\core\altcp.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_alloc.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_tcp.c;..\Middlewares\Third_Party\LwIP\src\core\def.c;..\Middlewares\Third_Party\LwIP\src\core\dns.c;..\Middlewares\Third_Party\LwIP\src\core\inet_chksum.c;..\Middlewares\Third_Party\LwIP\src\core\init.c;..\Middlewares\Third_Party\LwIP\src\core\ip.c;..\Middlewares\Third_Party\LwIP\src\core\mem.c;..\Middlewares\Third_Party\LwIP\src\core\memp.c;..\Middlewares\Third_Party\LwIP\src\core\netif.c;..\Middlewares\Third_Party\LwIP\src\core\pbuf.c;..\Middlewares\Third_Party\LwIP\src\core\raw.c;..\Middlewares\Third_Party\LwIP\src\core\stats.c;..\Middlewares\Third_Party\LwIP\src\core\sys.c;..\Middlewares\Third_Party\LwIP\src\core\tcp.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_in.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_out.c;..\Middlewares\Third_Party\LwIP\src\core\timeouts.c;..\Middlewares\Third_Party\LwIP\src\core\udp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\autoip.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\dhcp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\etharp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\icmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\igmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\dhcp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ethip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\icmp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\inet6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\mld6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\nd6.c;..\Middlewares\Third_Party\LwIP\system\OS\sys_arch.c;..\Middlewares\Third_Party\LwIP\src\apps\mqtt\mqtt.c;..\Core\Src\system_stm32f4xx.c;;;..\Middlewares\Third_Party\FreeRTOS\Source\croutine.c;..\Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;..\Middlewares\Third_Party\FreeRTOS\Source\list.c;..\Middlewares\Third_Party\FreeRTOS\Source\queue.c;..\Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;..\Middlewares\Third_Party\FreeRTOS\Source\tasks.c;..\Middlewares\Third_Party\FreeRTOS\Source\timers.c;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F\port.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\auth.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ccp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap_ms.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-md5.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\chap-new.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\demand.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\eui64.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\fsm.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ipv6cp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\lcp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\magic.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\mppe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\multilink.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ppp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppapi.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppcrypt.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppoe.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppol2tp.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\pppos.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\upap.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\utils.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\vj.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif.c;..\Middlewares\Third_Party\LwIP\src\netif\bridgeif_fdb.c;..\Middlewares\Third_Party\LwIP\src\netif\ethernet.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_ble.c;..\Middlewares\Third_Party\LwIP\src\netif\lowpan6_common.c;..\Middlewares\Third_Party\LwIP\src\netif\slipif.c;..\Middlewares\Third_Party\LwIP\src\netif\zepif.c;..\Middlewares\Third_Party\LwIP\src\netif\ppp\ecp.c;..\Middlewares\Third_Party\LwIP\src\api\api_lib.c;..\Middlewares\Third_Party\LwIP\src\api\api_msg.c;..\Middlewares\Third_Party\LwIP\src\api\err.c;..\Middlewares\Third_Party\LwIP\src\api\if_api.c;..\Middlewares\Third_Party\LwIP\src\api\netbuf.c;..\Middlewares\Third_Party\LwIP\src\api\netdb.c;..\Middlewares\Third_Party\LwIP\src\api\netifapi.c;..\Middlewares\Third_Party\LwIP\src\api\sockets.c;..\Middlewares\Third_Party\LwIP\src\api\tcpip.c;..\Middlewares\Third_Party\LwIP\src\core\altcp.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_alloc.c;..\Middlewares\Third_Party\LwIP\src\core\altcp_tcp.c;..\Middlewares\Third_Party\LwIP\src\core\def.c;..\Middlewares\Third_Party\LwIP\src\core\dns.c;..\Middlewares\Third_Party\LwIP\src\core\inet_chksum.c;..\Middlewares\Third_Party\LwIP\src\core\init.c;..\Middlewares\Third_Party\LwIP\src\core\ip.c;..\Middlewares\Third_Party\LwIP\src\core\mem.c;..\Middlewares\Third_Party\LwIP\src\core\memp.c;..\Middlewares\Third_Party\LwIP\src\core\netif.c;..\Middlewares\Third_Party\LwIP\src\core\pbuf.c;..\Middlewares\Third_Party\LwIP\src\core\raw.c;..\Middlewares\Third_Party\LwIP\src\core\stats.c;..\Middlewares\Third_Party\LwIP\src\core\sys.c;..\Middlewares\Third_Party\LwIP\src\core\tcp.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_in.c;..\Middlewares\Third_Party\LwIP\src\core\tcp_out.c;..\Middlewares\Third_Party\LwIP\src\core\timeouts.c;..\Middlewares\Third_Party\LwIP\src\core\udp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\autoip.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\dhcp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\etharp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\icmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\igmp.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv4\ip4_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\dhcp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ethip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\icmp6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\inet6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_addr.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\ip6_frag.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\mld6.c;..\Middlewares\Third_Party\LwIP\src\core\ipv6\nd6.c;..\Middlewares\Third_Party\LwIP\system\OS\sys_arch.c;..\Middlewares\Third_Party\LwIP\src\apps\mqtt\mqtt.c; HeaderPath=..\Middlewares\Third_Party\LwIP\src\include;..\Middlewares\Third_Party\LwIP\system;..\Middlewares\Third_Party\LwIP\src\include;..\Middlewares\Third_Party\LwIP\system;..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Middlewares\Third_Party\FreeRTOS\Source\include;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM4F;..\Drivers\BSP\Components\lan8742;..\Middlewares\Third_Party\LwIP\src\include\netif\ppp;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Middlewares\Third_Party\LwIP\src\include\lwip;..\Middlewares\Third_Party\LwIP\src\include\lwip\apps;..\Middlewares\Third_Party\LwIP\src\include\lwip\priv;..\Middlewares\Third_Party\LwIP\src\include\lwip\prot;..\Middlewares\Third_Party\LwIP\src\include\netif;..\Middlewares\Third_Party\LwIP\src\include\compat\posix;..\Middlewares\Third_Party\LwIP\src\include\compat\posix\arpa;..\Middlewares\Third_Party\LwIP\src\include\compat\posix\net;..\Middlewares\Third_Party\LwIP\src\include\compat\posix\sys;..\Middlewares\Third_Party\LwIP\src\include\compat\stdc;..\Middlewares\Third_Party\LwIP\system\arch;..\Drivers\CMSIS\Include;..\Core\Inc;..\LWIP\App;..\LWIP\Target; CDefines=USE_HAL_DRIVER;STM32F407xx;USE_HAL_DRIVER;USE_HAL_DRIVER; [PreviousGenFiles] AdvancedFolderStructure=true -HeaderFileListSize=12 +HeaderFileListSize=9 HeaderFiles#0=..\Core\Inc\gpio.h HeaderFiles#1=..\Core\Inc\FreeRTOSConfig.h -HeaderFiles#2=..\Core\Inc\dma.h -HeaderFiles#3=..\LWIP\App\lwip.h -HeaderFiles#4=..\LWIP\Target\lwipopts.h -HeaderFiles#5=..\LWIP\Target\ethernetif.h -HeaderFiles#6=..\Core\Inc\spi.h -HeaderFiles#7=..\Core\Inc\tim.h -HeaderFiles#8=..\Core\Inc\usart.h -HeaderFiles#9=..\Core\Inc\stm32f4xx_it.h -HeaderFiles#10=..\Core\Inc\stm32f4xx_hal_conf.h -HeaderFiles#11=..\Core\Inc\main.h +HeaderFiles#2=..\LWIP\App\lwip.h +HeaderFiles#3=..\LWIP\Target\lwipopts.h +HeaderFiles#4=..\LWIP\Target\ethernetif.h +HeaderFiles#5=..\Core\Inc\tim.h +HeaderFiles#6=..\Core\Inc\stm32f4xx_it.h +HeaderFiles#7=..\Core\Inc\stm32f4xx_hal_conf.h +HeaderFiles#8=..\Core\Inc\main.h HeaderFolderListSize=3 HeaderPath#0=..\Core\Inc HeaderPath#1=..\LWIP\App HeaderPath#2=..\LWIP\Target HeaderFiles=; -SourceFileListSize=12 +SourceFileListSize=9 SourceFiles#0=..\Core\Src\gpio.c SourceFiles#1=..\Core\Src\freertos.c -SourceFiles#2=..\Core\Src\dma.c -SourceFiles#3=..\LWIP\App\lwip.c -SourceFiles#4=..\LWIP\Target\ethernetif.c -SourceFiles#5=..\Core\Src\spi.c -SourceFiles#6=..\Core\Src\tim.c -SourceFiles#7=..\Core\Src\usart.c -SourceFiles#8=..\Core\Src\stm32f4xx_it.c -SourceFiles#9=..\Core\Src\stm32f4xx_hal_msp.c -SourceFiles#10=..\Core\Src\stm32f4xx_hal_timebase_tim.c -SourceFiles#11=..\Core\Src\main.c +SourceFiles#2=..\LWIP\App\lwip.c +SourceFiles#3=..\LWIP\Target\ethernetif.c +SourceFiles#4=..\Core\Src\tim.c +SourceFiles#5=..\Core\Src\stm32f4xx_it.c +SourceFiles#6=..\Core\Src\stm32f4xx_hal_msp.c +SourceFiles#7=..\Core\Src\stm32f4xx_hal_timebase_tim.c +SourceFiles#8=..\Core\Src\main.c SourceFolderListSize=3 SourcePath#0=..\Core\Src SourcePath#1=..\LWIP\App diff --git a/Core/Inc/dma.h b/Core/Inc/dma.h deleted file mode 100644 index 493d98e..0000000 --- a/Core/Inc/dma.h +++ /dev/null @@ -1,52 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file dma.h - * @brief This file contains all the function prototypes for - * the dma.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __DMA_H__ -#define __DMA_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* DMA memory to memory transfer handles -------------------------------------*/ - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_DMA_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __DMA_H__ */ - diff --git a/Core/Inc/gpio.h b/Core/Inc/gpio.h index a14898c..1838108 100644 --- a/Core/Inc/gpio.h +++ b/Core/Inc/gpio.h @@ -41,6 +41,16 @@ extern "C" { DI_4, DI_5, DI_6, + DI_7, + DI_8, + DI_9, + DI_10, + DI_11, + DI_12, + DI_13, + DI_14, + DI_15, + DI_16, DI_MAX, } gpio_di_e; typedef enum @@ -49,6 +59,18 @@ extern "C" { DO_2, DO_3, DO_4, + DO_5, + DO_6, + DO_7, + DO_8, + DO_9, + DO_10, + DO_11, + DO_12, + DO_13, + DO_14, + DO_15, + DO_16, DO_EN, DO_MAX, } gpio_do_e; diff --git a/Core/Inc/main.h b/Core/Inc/main.h index b829f00..0a96e91 100644 --- a/Core/Inc/main.h +++ b/Core/Inc/main.h @@ -32,18 +32,13 @@ extern "C" { /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ #include "stdio.h" -#include "tcpclient.h" #include "tcpserverc.h" -#include "leds.h" #include /* USER CODE END Includes */ /* Exported types ------------------------------------------------------------*/ /* USER CODE BEGIN ET */ -extern uint8_t tcp_echo_flags_hart1; -extern uint8_t tcp_echo_flags_hart2; -extern uint8_t tcp_echo_flags_ble1; -extern uint8_t tcp_echo_flags_ble2; + extern uint8_t tcp_echo_flags_control; #define ARRAY_LEN(arr) (sizeof(arr)) / (sizeof(arr[0])) typedef struct @@ -54,11 +49,7 @@ typedef struct uint8_t tx_data[512]; } uart_t; -extern uart_t lcd_uart4; -extern uart_t ble2_uart3; -extern uart_t ble1_uart6; -extern uart_t hart1_uart5; -extern uart_t hart2_uart2; + #define DEST_IP_ADDR0 192 #define DEST_IP_ADDR1 168 #define DEST_IP_ADDR2 1 @@ -91,86 +82,80 @@ void Error_Handler(void); /* USER CODE END EFP */ /* Private defines -----------------------------------------------------------*/ -#define DI_CH5_Pin GPIO_PIN_2 -#define DI_CH5_GPIO_Port GPIOE -#define DI_CH6_Pin GPIO_PIN_3 -#define DI_CH6_GPIO_Port GPIOE +#define DI_CH12_Pin GPIO_PIN_2 +#define DI_CH12_GPIO_Port GPIOE +#define DI_CH13_Pin GPIO_PIN_3 +#define DI_CH13_GPIO_Port GPIOE +#define DI_CH14_Pin GPIO_PIN_4 +#define DI_CH14_GPIO_Port GPIOE +#define DI_CH15_Pin GPIO_PIN_5 +#define DI_CH15_GPIO_Port GPIOE +#define DI_CH16_Pin GPIO_PIN_6 +#define DI_CH16_GPIO_Port GPIOE #define ETH_RESET_Pin GPIO_PIN_0 #define ETH_RESET_GPIO_Port GPIOC -#define LED3_R_Pin GPIO_PIN_1 -#define LED3_R_GPIO_Port GPIOB -#define LED3_G_Pin GPIO_PIN_2 -#define LED3_G_GPIO_Port GPIOB -#define LED3_Y_Pin GPIO_PIN_7 -#define LED3_Y_GPIO_Port GPIOE -#define LED2_R_Pin GPIO_PIN_12 -#define LED2_R_GPIO_Port GPIOE -#define LED2_G_Pin GPIO_PIN_13 -#define LED2_G_GPIO_Port GPIOE -#define LED2_Y_Pin GPIO_PIN_14 -#define LED2_Y_GPIO_Port GPIOE -#define BLE2_TX_Pin GPIO_PIN_8 -#define BLE2_TX_GPIO_Port GPIOD -#define BLE2_RX_Pin GPIO_PIN_9 -#define BLE2_RX_GPIO_Port GPIOD -#define DO_CH4_Pin GPIO_PIN_11 -#define DO_CH4_GPIO_Port GPIOD +#define LED_R_Pin GPIO_PIN_1 +#define LED_R_GPIO_Port GPIOB +#define LED_G_Pin GPIO_PIN_2 +#define LED_G_GPIO_Port GPIOB +#define LED_Y_Pin GPIO_PIN_7 +#define LED_Y_GPIO_Port GPIOE +#define DO_EN_Pin GPIO_PIN_10 +#define DO_EN_GPIO_Port GPIOB +#define DO_CH1_Pin GPIO_PIN_10 +#define DO_CH1_GPIO_Port GPIOD +#define DO_CH2_Pin GPIO_PIN_11 +#define DO_CH2_GPIO_Port GPIOD #define DO_CH3_Pin GPIO_PIN_12 #define DO_CH3_GPIO_Port GPIOD -#define DO_CH1_Pin GPIO_PIN_13 -#define DO_CH1_GPIO_Port GPIOD -#define DO_CH2_Pin GPIO_PIN_14 -#define DO_CH2_GPIO_Port GPIOD -#define DO_EN_Pin GPIO_PIN_15 -#define DO_EN_GPIO_Port GPIOD -#define BLE1_TX_Pin GPIO_PIN_6 -#define BLE1_TX_GPIO_Port GPIOC -#define BLE1_RX_Pin GPIO_PIN_7 -#define BLE1_RX_GPIO_Port GPIOC -#define DI_CH1_Pin GPIO_PIN_8 -#define DI_CH1_GPIO_Port GPIOC -#define DI_CH2_Pin GPIO_PIN_9 -#define DI_CH2_GPIO_Port GPIOC -#define HART1_RST_Pin GPIO_PIN_8 -#define HART1_RST_GPIO_Port GPIOA -#define DI_CH3_Pin GPIO_PIN_11 -#define DI_CH3_GPIO_Port GPIOA -#define DI_CH4_Pin GPIO_PIN_12 -#define DI_CH4_GPIO_Port GPIOA -#define HART_CLK_Pin GPIO_PIN_15 -#define HART_CLK_GPIO_Port GPIOA -#define LCD_TX_Pin GPIO_PIN_10 -#define LCD_TX_GPIO_Port GPIOC -#define LCD_RX_Pin GPIO_PIN_11 -#define LCD_RX_GPIO_Port GPIOC -#define HART1_TX_Pin GPIO_PIN_12 -#define HART1_TX_GPIO_Port GPIOC -#define HART1_RTS_Pin GPIO_PIN_0 -#define HART1_RTS_GPIO_Port GPIOD -#define HART1_OCD_Pin GPIO_PIN_1 -#define HART1_OCD_GPIO_Port GPIOD -#define HART1_OCD_EXTI_IRQn EXTI1_IRQn -#define HART1_RX_Pin GPIO_PIN_2 -#define HART1_RX_GPIO_Port GPIOD -#define HART2_OCD_Pin GPIO_PIN_3 -#define HART2_OCD_GPIO_Port GPIOD -#define HART2_OCD_EXTI_IRQn EXTI3_IRQn -#define HART2_RTS_Pin GPIO_PIN_4 -#define HART2_RTS_GPIO_Port GPIOD -#define HART2_TX_Pin GPIO_PIN_5 -#define HART2_TX_GPIO_Port GPIOD -#define HART2_RX_Pin GPIO_PIN_6 -#define HART2_RX_GPIO_Port GPIOD -#define HART2_RST_Pin GPIO_PIN_7 -#define HART2_RST_GPIO_Port GPIOD -#define DAC1_CS_Pin GPIO_PIN_6 -#define DAC1_CS_GPIO_Port GPIOB -#define DAC2_CS_Pin GPIO_PIN_7 -#define DAC2_CS_GPIO_Port GPIOB -#define ADC_CS_Pin GPIO_PIN_0 -#define ADC_CS_GPIO_Port GPIOE -#define AD7124_SYNC_Pin GPIO_PIN_1 -#define AD7124_SYNC_GPIO_Port GPIOE +#define DO_CH4_Pin GPIO_PIN_13 +#define DO_CH4_GPIO_Port GPIOD +#define DO_CH5_Pin GPIO_PIN_14 +#define DO_CH5_GPIO_Port GPIOD +#define DO_CH6_Pin GPIO_PIN_15 +#define DO_CH6_GPIO_Port GPIOD +#define DO_CH7_Pin GPIO_PIN_9 +#define DO_CH7_GPIO_Port GPIOC +#define DO_CH8_Pin GPIO_PIN_8 +#define DO_CH8_GPIO_Port GPIOA +#define DO_CH9_Pin GPIO_PIN_11 +#define DO_CH9_GPIO_Port GPIOA +#define DO_CH10_Pin GPIO_PIN_12 +#define DO_CH10_GPIO_Port GPIOA +#define DO_CH11_Pin GPIO_PIN_15 +#define DO_CH11_GPIO_Port GPIOA +#define DO_CH12_Pin GPIO_PIN_12 +#define DO_CH12_GPIO_Port GPIOC +#define DO_CH13_Pin GPIO_PIN_0 +#define DO_CH13_GPIO_Port GPIOD +#define DO_CH14_Pin GPIO_PIN_1 +#define DO_CH14_GPIO_Port GPIOD +#define DO_CH15_Pin GPIO_PIN_2 +#define DO_CH15_GPIO_Port GPIOD +#define DO_CH16_Pin GPIO_PIN_3 +#define DO_CH16_GPIO_Port GPIOD +#define DI_CH1_Pin GPIO_PIN_4 +#define DI_CH1_GPIO_Port GPIOD +#define DI_CH2_Pin GPIO_PIN_5 +#define DI_CH2_GPIO_Port GPIOD +#define DI_CH3_Pin GPIO_PIN_6 +#define DI_CH3_GPIO_Port GPIOD +#define DI_CH4_Pin GPIO_PIN_7 +#define DI_CH4_GPIO_Port GPIOD +#define DI_CH5_Pin GPIO_PIN_3 +#define DI_CH5_GPIO_Port GPIOB +#define DI_CH6_Pin GPIO_PIN_4 +#define DI_CH6_GPIO_Port GPIOB +#define DI_CH7_Pin GPIO_PIN_5 +#define DI_CH7_GPIO_Port GPIOB +#define DI_CH8_Pin GPIO_PIN_6 +#define DI_CH8_GPIO_Port GPIOB +#define DI_CH9_Pin GPIO_PIN_7 +#define DI_CH9_GPIO_Port GPIOB +#define DI_CH10_Pin GPIO_PIN_0 +#define DI_CH10_GPIO_Port GPIOE +#define DI_CH11_Pin GPIO_PIN_1 +#define DI_CH11_GPIO_Port GPIOE /* USER CODE BEGIN Private defines */ #define TRUE 0 diff --git a/Core/Inc/spi.h b/Core/Inc/spi.h deleted file mode 100644 index 0bd89bb..0000000 --- a/Core/Inc/spi.h +++ /dev/null @@ -1,52 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file spi.h - * @brief This file contains all the function prototypes for - * the spi.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __SPI_H__ -#define __SPI_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -extern SPI_HandleTypeDef hspi1; - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_SPI1_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __SPI_H__ */ - diff --git a/Core/Inc/stm32f4xx_hal_conf.h b/Core/Inc/stm32f4xx_hal_conf.h index c48bc13..51dd0b3 100644 --- a/Core/Inc/stm32f4xx_hal_conf.h +++ b/Core/Inc/stm32f4xx_hal_conf.h @@ -62,9 +62,9 @@ /* #define HAL_SAI_MODULE_ENABLED */ /* #define HAL_SD_MODULE_ENABLED */ /* #define HAL_MMC_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED +/* #define HAL_SPI_MODULE_ENABLED */ #define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED +/* #define HAL_UART_MODULE_ENABLED */ /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ diff --git a/Core/Inc/stm32f4xx_it.h b/Core/Inc/stm32f4xx_it.h index 257123a..a078dc6 100644 --- a/Core/Inc/stm32f4xx_it.h +++ b/Core/Inc/stm32f4xx_it.h @@ -52,26 +52,9 @@ void MemManage_Handler(void); void BusFault_Handler(void); void UsageFault_Handler(void); void DebugMon_Handler(void); -void EXTI1_IRQHandler(void); -void EXTI3_IRQHandler(void); -void DMA1_Stream0_IRQHandler(void); -void DMA1_Stream1_IRQHandler(void); -void DMA1_Stream2_IRQHandler(void); -void DMA1_Stream3_IRQHandler(void); -void DMA1_Stream4_IRQHandler(void); -void DMA1_Stream5_IRQHandler(void); -void DMA1_Stream6_IRQHandler(void); void TIM1_UP_TIM10_IRQHandler(void); void TIM3_IRQHandler(void); -void USART2_IRQHandler(void); -void USART3_IRQHandler(void); -void DMA1_Stream7_IRQHandler(void); -void UART4_IRQHandler(void); -void UART5_IRQHandler(void); -void DMA2_Stream1_IRQHandler(void); void ETH_IRQHandler(void); -void DMA2_Stream6_IRQHandler(void); -void USART6_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/Core/Inc/tim.h b/Core/Inc/tim.h index a898331..6744b80 100644 --- a/Core/Inc/tim.h +++ b/Core/Inc/tim.h @@ -87,8 +87,6 @@ extern TIM_HandleTypeDef htim3; void MX_TIM2_Init(void); void MX_TIM3_Init(void); -void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); - /* USER CODE BEGIN Prototypes */ /* USER CODE END Prototypes */ diff --git a/Core/Inc/usart.h b/Core/Inc/usart.h deleted file mode 100644 index 52d82ae..0000000 --- a/Core/Inc/usart.h +++ /dev/null @@ -1,69 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file usart.h - * @brief This file contains all the function prototypes for - * the usart.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USART_H__ -#define __USART_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -extern UART_HandleTypeDef huart4; - -extern UART_HandleTypeDef huart5; - -extern UART_HandleTypeDef huart2; - -extern UART_HandleTypeDef huart3; - -extern UART_HandleTypeDef huart6; - -/* USER CODE BEGIN Private defines */ - - // #define BUFFER_SIZE 100 - // extern volatile uint8_t rx_len; // 接收?帧数据的长度 - // extern volatile uint8_t recv_end_flag; // ?帧数据接收完成标? - // extern uint8_t rx_buffer[BUFFER_SIZE]; // 接收数据缓存数组 - -/* USER CODE END Private defines */ - -void MX_UART4_Init(void); -void MX_UART5_Init(void); -void MX_USART2_UART_Init(void); -void MX_USART3_UART_Init(void); -void MX_USART6_UART_Init(void); - -/* USER CODE BEGIN Prototypes */ - void dma_usart_send(UART_HandleTypeDef *huart, uint8_t *buf, uint8_t len); // 串口发?封? -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USART_H__ */ - diff --git a/Core/Src/dma.c b/Core/Src/dma.c deleted file mode 100644 index df6eb8e..0000000 --- a/Core/Src/dma.c +++ /dev/null @@ -1,83 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file dma.c - * @brief This file provides code for the configuration - * of all the requested memory to memory DMA transfers. - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ - -/* Includes ------------------------------------------------------------------*/ -#include "dma.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/*----------------------------------------------------------------------------*/ -/* Configure DMA */ -/*----------------------------------------------------------------------------*/ - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ - -/** - * Enable DMA controller clock - */ -void MX_DMA_Init(void) -{ - - /* DMA controller clock enable */ - __HAL_RCC_DMA2_CLK_ENABLE(); - __HAL_RCC_DMA1_CLK_ENABLE(); - - /* DMA interrupt init */ - /* DMA1_Stream0_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn); - /* DMA1_Stream1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); - /* DMA1_Stream2_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn); - /* DMA1_Stream3_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); - /* DMA1_Stream4_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn); - /* DMA1_Stream5_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); - /* DMA1_Stream6_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn); - /* DMA1_Stream7_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn); - /* DMA2_Stream1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); - /* DMA2_Stream6_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); - -} - -/* USER CODE BEGIN 2 */ - -/* USER CODE END 2 */ - diff --git a/Core/Src/freertos.c b/Core/Src/freertos.c index 569c205..4ee25dc 100644 --- a/Core/Src/freertos.c +++ b/Core/Src/freertos.c @@ -25,9 +25,7 @@ /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ -#include "dac161s997.h" -#include "ad7124.h" -#include "usart.h" + #include "communication_protocol.h" /* USER CODE END Includes */ @@ -51,21 +49,17 @@ /* USER CODE END Variables */ osThreadId lwip_taskHandle; -osThreadId led_taskHandle; -osThreadId dac_taskHandle; -osThreadId adc_taskHandle; osThreadId gpio_di_do_taskHandle; +osThreadId leds_taskHandle; /* Private function prototypes -----------------------------------------------*/ /* USER CODE BEGIN FunctionPrototypes */ -extern float current_buff[2]; + /* USER CODE END FunctionPrototypes */ void start_tcp_task(void const * argument); -void start_led_toggle_task(void const * argument); -void start_dac_task(void const * argument); -void start_adc_task(void const * argument); void start_gpio_di_do_task(void const * argument); +void start_leds_task(void const * argument); extern void MX_LWIP_Init(void); void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ @@ -117,22 +111,14 @@ void MX_FREERTOS_Init(void) { osThreadDef(lwip_task, start_tcp_task, osPriorityHigh, 0, 512); lwip_taskHandle = osThreadCreate(osThread(lwip_task), NULL); - /* definition and creation of led_task */ - osThreadDef(led_task, start_led_toggle_task, osPriorityLow, 0, 128); - led_taskHandle = osThreadCreate(osThread(led_task), NULL); - - /* definition and creation of dac_task */ - osThreadDef(dac_task, start_dac_task, osPriorityNormal, 0, 512); - dac_taskHandle = osThreadCreate(osThread(dac_task), NULL); - - /* definition and creation of adc_task */ - osThreadDef(adc_task, start_adc_task, osPriorityBelowNormal, 0, 128); - adc_taskHandle = osThreadCreate(osThread(adc_task), NULL); - /* definition and creation of gpio_di_do_task */ osThreadDef(gpio_di_do_task, start_gpio_di_do_task, osPriorityNormal, 0, 128); gpio_di_do_taskHandle = osThreadCreate(osThread(gpio_di_do_task), NULL); + /* definition and creation of leds_task */ + osThreadDef(leds_task, start_leds_task, osPriorityIdle, 0, 128); + leds_taskHandle = osThreadCreate(osThread(leds_task), NULL); + /* USER CODE BEGIN RTOS_THREADS */ /* add threads, ... */ /* USER CODE END RTOS_THREADS */ @@ -156,96 +142,12 @@ void start_tcp_task(void const * argument) for (;;) { // osThreadTerminate(NULL); - // if (tcp_send_flags_hart1 == 1) - // { - // user_send_data_hart1(hart1_uart5.rx_data, hart1_uart5.rx_num); - // tcp_send_flags_hart1 = 0; - // } - // if (tcp_send_flags_hart2 == 1) - // { - // user_send_data_hart2(hart2_uart2.rx_data, hart2_uart2.rx_num); - // tcp_send_flags_hart2 = 0; - // } vTaskDelay(1); - // osDelay(1); } /* USER CODE END start_tcp_task */ } -/* USER CODE BEGIN Header_start_led_toggle_task */ -/** - * @brief Function implementing the led_task thread. - * @param argument: Not used - * @retval None - */ -/* USER CODE END Header_start_led_toggle_task */ -void start_led_toggle_task(void const * argument) -{ - /* USER CODE BEGIN start_led_toggle_task */ - /* Infinite loop */ - for (;;) - { - // HAL_GPIO_TogglePin(LED2_G_GPIO_Port, LED2_G_Pin); - vTaskDelay(500); - } - /* USER CODE END start_led_toggle_task */ -} - -/* USER CODE BEGIN Header_start_dac_task */ -/** - * @brief Function implementing the dac_task thread. - * @param argument: Not used - * @retval None - */ -/* USER CODE END Header_start_dac_task */ -void start_dac_task(void const * argument) -{ - /* USER CODE BEGIN start_dac_task */ - dac161s997_init(); - /* Infinite loop */ - for (;;) - { - dac161s997_output(DAC161S997_1, current_buff[0]); - dac161s997_output(DAC161S997_2, current_buff[1]); - - vTaskDelay(100); - } - /* USER CODE END start_dac_task */ -} - -/* USER CODE BEGIN Header_start_adc_task */ -/** - * @brief Function implementing the adc_task thread. - * @param argument: Not used - * @retval None - */ -/* USER CODE END Header_start_adc_task */ -void start_adc_task(void const * argument) -{ - /* USER CODE BEGIN start_adc_task */ - ad7124_setup(); - /* Infinite loop */ - for (;;) - { - uint8_t ch = 0; - for (ch = STOP_NC_ADC; ch < AD7124_CHANNEL_EN_MAX; ch++) - { - ad7124_get_analog(ch); - } - HAL_GPIO_TogglePin(LED2_G_GPIO_Port, LED2_G_Pin); - if (huart5.RxState == HAL_UART_STATE_READY) - { - HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp)); - } - if (huart2.RxState == HAL_UART_STATE_READY) - { - HAL_UARTEx_ReceiveToIdle_DMA(&huart2, hart2_uart2.rx_data_temp, ARRAY_LEN(hart2_uart2.rx_data_temp)); - } - } - /* USER CODE END start_adc_task */ -} - /* USER CODE BEGIN Header_start_gpio_di_do_task */ /** * @brief Function implementing the gpio_di_do_task thread. @@ -264,6 +166,25 @@ void start_gpio_di_do_task(void const * argument) /* USER CODE END start_gpio_di_do_task */ } +/* USER CODE BEGIN Header_start_leds_task */ +/** + * @brief Function implementing the leds_task thread. + * @param argument: Not used + * @retval None + */ +/* USER CODE END Header_start_leds_task */ +void start_leds_task(void const * argument) +{ + /* USER CODE BEGIN start_leds_task */ + /* Infinite loop */ + for (;;) + { + HAL_GPIO_TogglePin(LED_G_GPIO_Port, LED_G_Pin); + vTaskDelay(500); + } + /* USER CODE END start_leds_task */ +} + /* Private application code --------------------------------------------------*/ /* USER CODE BEGIN Application */ diff --git a/Core/Src/gpio.c b/Core/Src/gpio.c index 605594a..a730d72 100644 --- a/Core/Src/gpio.c +++ b/Core/Src/gpio.c @@ -53,27 +53,26 @@ void MX_GPIO_Init(void) __HAL_RCC_GPIOD_CLK_ENABLE(); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(ETH_RESET_GPIO_Port, ETH_RESET_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOC, ETH_RESET_Pin|DO_CH7_Pin|DO_CH12_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, LED3_R_Pin|LED3_G_Pin|DAC1_CS_Pin|DAC2_CS_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOB, LED_R_Pin|LED_G_Pin|DO_EN_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOE, LED3_Y_Pin|LED2_R_Pin|LED2_G_Pin|LED2_Y_Pin - |ADC_CS_Pin|AD7124_SYNC_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(LED_Y_GPIO_Port, LED_Y_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOD, DO_CH4_Pin|DO_CH3_Pin|DO_CH1_Pin|DO_CH2_Pin - |DO_EN_Pin|HART1_RTS_Pin|HART2_RTS_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOD, DO_CH1_Pin|DO_CH2_Pin|DO_CH3_Pin|DO_CH4_Pin + |DO_CH5_Pin|DO_CH6_Pin|DO_CH13_Pin|DO_CH14_Pin + |DO_CH15_Pin|DO_CH16_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(HART1_RST_GPIO_Port, HART1_RST_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOA, DO_CH8_Pin|DO_CH9_Pin|DO_CH10_Pin|DO_CH11_Pin, GPIO_PIN_SET); - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(HART2_RST_GPIO_Port, HART2_RST_Pin, GPIO_PIN_RESET); - - /*Configure GPIO pins : PEPin PEPin */ - GPIO_InitStruct.Pin = DI_CH5_Pin|DI_CH6_Pin; + /*Configure GPIO pins : PEPin PEPin PEPin PEPin + PEPin PEPin PEPin */ + GPIO_InitStruct.Pin = DI_CH12_Pin|DI_CH13_Pin|DI_CH14_Pin|DI_CH15_Pin + |DI_CH16_Pin|DI_CH10_Pin|DI_CH11_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_PULLUP; HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); @@ -85,87 +84,59 @@ void MX_GPIO_Init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; HAL_GPIO_Init(ETH_RESET_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pins : PBPin PBPin */ - GPIO_InitStruct.Pin = LED3_R_Pin|LED3_G_Pin; + /*Configure GPIO pins : PBPin PBPin PBPin */ + GPIO_InitStruct.Pin = LED_R_Pin|LED_G_Pin|DO_EN_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /*Configure GPIO pins : PEPin PEPin PEPin PEPin */ - GPIO_InitStruct.Pin = LED3_Y_Pin|LED2_R_Pin|LED2_G_Pin|LED2_Y_Pin; + /*Configure GPIO pin : PtPin */ + GPIO_InitStruct.Pin = LED_Y_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; - HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + HAL_GPIO_Init(LED_Y_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pins : PDPin PDPin PDPin PDPin */ - GPIO_InitStruct.Pin = DO_CH4_Pin|DO_CH3_Pin|DO_CH1_Pin|DO_CH2_Pin; + /*Configure GPIO pins : PDPin PDPin PDPin PDPin + PDPin PDPin PDPin PDPin + PDPin PDPin */ + GPIO_InitStruct.Pin = DO_CH1_Pin|DO_CH2_Pin|DO_CH3_Pin|DO_CH4_Pin + |DO_CH5_Pin|DO_CH6_Pin|DO_CH13_Pin|DO_CH14_Pin + |DO_CH15_Pin|DO_CH16_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - /*Configure GPIO pins : PDPin PDPin PDPin PDPin */ - GPIO_InitStruct.Pin = DO_EN_Pin|HART1_RTS_Pin|HART2_RTS_Pin|HART2_RST_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - /*Configure GPIO pins : PCPin PCPin */ - GPIO_InitStruct.Pin = DI_CH1_Pin|DI_CH2_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Pin = DO_CH7_Pin|DO_CH12_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - /*Configure GPIO pin : PtPin */ - GPIO_InitStruct.Pin = HART1_RST_Pin; + /*Configure GPIO pins : PAPin PAPin PAPin PAPin */ + GPIO_InitStruct.Pin = DO_CH8_Pin|DO_CH9_Pin|DO_CH10_Pin|DO_CH11_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(HART1_RST_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pins : PAPin PAPin */ - GPIO_InitStruct.Pin = DI_CH3_Pin|DI_CH4_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_PULLUP; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - /*Configure GPIO pins : PDPin PDPin */ - GPIO_InitStruct.Pin = HART1_OCD_Pin|HART2_OCD_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + /*Configure GPIO pins : PDPin PDPin PDPin PDPin */ + GPIO_InitStruct.Pin = DI_CH1_Pin|DI_CH2_Pin|DI_CH3_Pin|DI_CH4_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_PULLUP; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - /*Configure GPIO pins : PBPin PBPin */ - GPIO_InitStruct.Pin = DAC1_CS_Pin|DAC2_CS_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + /*Configure GPIO pins : PBPin PBPin PBPin PBPin + PBPin */ + GPIO_InitStruct.Pin = DI_CH5_Pin|DI_CH6_Pin|DI_CH7_Pin|DI_CH8_Pin + |DI_CH9_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /*Configure GPIO pin : PtPin */ - GPIO_InitStruct.Pin = ADC_CS_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(ADC_CS_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pin : PtPin */ - GPIO_InitStruct.Pin = AD7124_SYNC_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLDOWN; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(AD7124_SYNC_GPIO_Port, &GPIO_InitStruct); - - /* EXTI interrupt init*/ - HAL_NVIC_SetPriority(EXTI1_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(EXTI1_IRQn); - - HAL_NVIC_SetPriority(EXTI3_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(EXTI3_IRQn); - } /* USER CODE BEGIN 2 */ @@ -186,6 +157,42 @@ void gpio_do_test(uint8_t gpio_num, GPIO_PinState state) case DO_4: HAL_GPIO_WritePin(DO_CH4_GPIO_Port, DO_CH4_Pin, state); break; + case DO_5: + HAL_GPIO_WritePin(DO_CH5_GPIO_Port, DO_CH5_Pin, state); + break; + case DO_6: + HAL_GPIO_WritePin(DO_CH6_GPIO_Port, DO_CH6_Pin, state); + break; + case DO_7: + HAL_GPIO_WritePin(DO_CH7_GPIO_Port, DO_CH7_Pin, state); + break; + case DO_8: + HAL_GPIO_WritePin(DO_CH8_GPIO_Port, DO_CH8_Pin, state); + break; + case DO_9: + HAL_GPIO_WritePin(DO_CH9_GPIO_Port, DO_CH9_Pin, state); + break; + case DO_10: + HAL_GPIO_WritePin(DO_CH10_GPIO_Port, DO_CH10_Pin, state); + break; + case DO_11: + HAL_GPIO_WritePin(DO_CH11_GPIO_Port, DO_CH11_Pin, state); + break; + case DO_12: + HAL_GPIO_WritePin(DO_CH12_GPIO_Port, DO_CH12_Pin, state); + break; + case DO_13: + HAL_GPIO_WritePin(DO_CH13_GPIO_Port, DO_CH13_Pin, state); + break; + case DO_14: + HAL_GPIO_WritePin(DO_CH14_GPIO_Port, DO_CH14_Pin, state); + break; + case DO_15: + HAL_GPIO_WritePin(DO_CH15_GPIO_Port, DO_CH15_Pin, state); + break; + case DO_16: + HAL_GPIO_WritePin(DO_CH16_GPIO_Port, DO_CH16_Pin, state); + break; default: break; } @@ -214,6 +221,36 @@ GPIO_PinState gpio_di_test(uint8_t gpio_num) case DI_6: state = HAL_GPIO_ReadPin(DI_CH6_GPIO_Port, DI_CH6_Pin); break; + case DI_7: + state = HAL_GPIO_ReadPin(DI_CH7_GPIO_Port, DI_CH7_Pin); + break; + case DI_8: + state = HAL_GPIO_ReadPin(DI_CH8_GPIO_Port, DI_CH8_Pin); + break; + case DI_9: + state = HAL_GPIO_ReadPin(DI_CH9_GPIO_Port, DI_CH9_Pin); + break; + case DI_10: + state = HAL_GPIO_ReadPin(DI_CH10_GPIO_Port, DI_CH10_Pin); + break; + case DI_11: + state = HAL_GPIO_ReadPin(DI_CH11_GPIO_Port, DI_CH11_Pin); + break; + case DI_12: + state = HAL_GPIO_ReadPin(DI_CH12_GPIO_Port, DI_CH12_Pin); + break; + case DI_13: + state = HAL_GPIO_ReadPin(DI_CH13_GPIO_Port, DI_CH13_Pin); + break; + case DI_14: + state = HAL_GPIO_ReadPin(DI_CH14_GPIO_Port, DI_CH14_Pin); + break; + case DI_15: + state = HAL_GPIO_ReadPin(DI_CH15_GPIO_Port, DI_CH15_Pin); + break; + case DI_16: + state = HAL_GPIO_ReadPin(DI_CH16_GPIO_Port, DI_CH16_Pin); + break; default: state = GPIO_PIN_RESET; break; diff --git a/Core/Src/main.c b/Core/Src/main.c index c33f82f..a3b6da9 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -19,11 +19,8 @@ /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "cmsis_os.h" -#include "dma.h" #include "lwip.h" -#include "spi.h" #include "tim.h" -#include "usart.h" #include "gpio.h" /* Private includes ----------------------------------------------------------*/ @@ -31,8 +28,7 @@ #include "stdio.h" #include "lwip/api.h" #include "lwip/tcp.h" -#include "ad7124.h" -#include "ht1200m.h" + /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -65,17 +61,7 @@ void MX_FREERTOS_Init(void); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ -uart_t lcd_uart4 = {0}; -uart_t ble1_uart6 = {0}; -uart_t ble2_uart3 = {0}; -uart_t hart2_uart2 = {0}; -uart_t hart1_uart5 = {0}; -float current_buff[2] = {12.0f, 12.0f}; -uint8_t tcp_echo_flags_hart1 = 0; -uint8_t tcp_echo_flags_hart2 = 0; -uint8_t tcp_echo_flags_ble1 = 0; -uint8_t tcp_echo_flags_ble2 = 0; uint8_t tcp_echo_flags_control = 0; /* USER CODE END 0 */ @@ -107,25 +93,11 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); - MX_DMA_Init(); MX_TIM3_Init(); - MX_SPI1_Init(); - MX_USART6_UART_Init(); - MX_UART4_Init(); MX_TIM2_Init(); - MX_UART5_Init(); - MX_USART2_UART_Init(); - MX_USART3_UART_Init(); /* USER CODE BEGIN 2 */ // HAL_GPIO_WritePin(DO_EN_GPIO_Port, DO_EN_Pin, GPIO_PIN_SET); // DO输出使能 - HAL_UARTEx_ReceiveToIdle_DMA(&huart4, lcd_uart4.rx_data_temp, ARRAY_LEN(lcd_uart4.rx_data_temp)); - HAL_UARTEx_ReceiveToIdle_DMA(&huart6, ble1_uart6.rx_data_temp, ARRAY_LEN(ble1_uart6.rx_data_temp)); - HAL_UARTEx_ReceiveToIdle_DMA(&huart3, ble2_uart3.rx_data_temp, ARRAY_LEN(ble2_uart3.rx_data_temp)); - HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp)); - HAL_UARTEx_ReceiveToIdle_DMA(&huart2, hart2_uart2.rx_data_temp, ARRAY_LEN(hart2_uart2.rx_data_temp)); - hart_ht1200m_reset(); // 初始化HT1200M模块 - HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); // PWM输出,用于驱动HT1200M模块 /* USER CODE END 2 */ /* Call init function for freertos objects (in freertos.c) */ @@ -192,68 +164,6 @@ void SystemClock_Config(void) /* USER CODE BEGIN 4 */ -void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) -{ - if (huart == &huart6) - { - __HAL_UNLOCK(huart); - ble1_uart6.rx_num = Size; - memset(ble1_uart6.rx_data, 0, ARRAY_LEN(ble1_uart6.rx_data)); - memcpy(ble1_uart6.rx_data, ble1_uart6.rx_data_temp, Size); - if (tcp_echo_flags_ble1 == 1) - { - user_send_data_ble1(ble1_uart6.rx_data, Size); - } - HAL_UARTEx_ReceiveToIdle_DMA(&huart6, ble1_uart6.rx_data_temp, ARRAY_LEN(ble1_uart6.rx_data_temp)); - } - if (huart == &huart3) - { - __HAL_UNLOCK(huart); - ble2_uart3.rx_num = Size; - memset(ble2_uart3.rx_data, 0, ARRAY_LEN(ble2_uart3.rx_data)); - memcpy(ble2_uart3.rx_data, ble2_uart3.rx_data_temp, Size); - if (tcp_echo_flags_ble2 == 1) - { - user_send_data_ble2(ble2_uart3.rx_data, Size); - } - HAL_UARTEx_ReceiveToIdle_DMA(&huart3, ble2_uart3.rx_data_temp, ARRAY_LEN(ble2_uart3.rx_data_temp)); - } - if (huart == &huart5) - { - __HAL_UNLOCK(huart); - hart1_uart5.rx_num = Size; - memset(hart1_uart5.rx_data, 0, ARRAY_LEN(hart1_uart5.rx_data)); - memcpy(hart1_uart5.rx_data, hart1_uart5.rx_data_temp, Size); - if (tcp_echo_flags_hart1 == 1) - { - user_send_data_hart1(hart1_uart5.rx_data, Size); - } - HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp)); - } - if (huart == &huart2) - { - __HAL_UNLOCK(huart); - hart2_uart2.rx_num = Size; - memset(hart2_uart2.rx_data, 0, ARRAY_LEN(hart2_uart2.rx_data)); - memcpy(hart2_uart2.rx_data, hart2_uart2.rx_data_temp, Size); - if (tcp_echo_flags_hart2 == 1) - { - user_send_data_hart2(hart2_uart2.rx_data, Size); - } - HAL_UARTEx_ReceiveToIdle_DMA(&huart2, hart2_uart2.rx_data_temp, ARRAY_LEN(hart2_uart2.rx_data_temp)); - } -} -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) -{ - if (huart == &huart5) - { - HART1_RTS_RECEIVE; - } - if (huart == &huart2) - { - HART2_RTS_RECEIVE; - } -} /* USER CODE END 4 */ /** diff --git a/Core/Src/spi.c b/Core/Src/spi.c deleted file mode 100644 index f1fc8b4..0000000 --- a/Core/Src/spi.c +++ /dev/null @@ -1,118 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file spi.c - * @brief This file provides code for the configuration - * of the SPI instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "spi.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -SPI_HandleTypeDef hspi1; - -/* SPI1 init function */ -void MX_SPI1_Init(void) -{ - - /* USER CODE BEGIN SPI1_Init 0 */ - - /* USER CODE END SPI1_Init 0 */ - - /* USER CODE BEGIN SPI1_Init 1 */ - - /* USER CODE END SPI1_Init 1 */ - hspi1.Instance = SPI1; - hspi1.Init.Mode = SPI_MODE_MASTER; - hspi1.Init.Direction = SPI_DIRECTION_2LINES; - hspi1.Init.DataSize = SPI_DATASIZE_8BIT; - hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; - hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; - hspi1.Init.NSS = SPI_NSS_SOFT; - hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; - hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - hspi1.Init.TIMode = SPI_TIMODE_DISABLE; - hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - hspi1.Init.CRCPolynomial = 10; - if (HAL_SPI_Init(&hspi1) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN SPI1_Init 2 */ - /* USER CODE END SPI1_Init 2 */ - -} - -void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle) -{ - - GPIO_InitTypeDef GPIO_InitStruct = {0}; - if(spiHandle->Instance==SPI1) - { - /* USER CODE BEGIN SPI1_MspInit 0 */ - - /* USER CODE END SPI1_MspInit 0 */ - /* SPI1 clock enable */ - __HAL_RCC_SPI1_CLK_ENABLE(); - - __HAL_RCC_GPIOB_CLK_ENABLE(); - /**SPI1 GPIO Configuration - PB3 ------> SPI1_SCK - PB4 ------> SPI1_MISO - PB5 ------> SPI1_MOSI - */ - GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /* USER CODE BEGIN SPI1_MspInit 1 */ - - /* USER CODE END SPI1_MspInit 1 */ - } -} - -void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle) -{ - - if(spiHandle->Instance==SPI1) - { - /* USER CODE BEGIN SPI1_MspDeInit 0 */ - - /* USER CODE END SPI1_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_SPI1_CLK_DISABLE(); - - /**SPI1 GPIO Configuration - PB3 ------> SPI1_SCK - PB4 ------> SPI1_MISO - PB5 ------> SPI1_MOSI - */ - HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5); - - /* USER CODE BEGIN SPI1_MspDeInit 1 */ - - /* USER CODE END SPI1_MspDeInit 1 */ - } -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c index 4718c0d..80c3900 100644 --- a/Core/Src/stm32f4xx_it.c +++ b/Core/Src/stm32f4xx_it.c @@ -23,9 +23,7 @@ /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ #include "tim.h" -#include "usart.h" #include "tcpserverc.h" -#include "ht1200m.h" /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -34,10 +32,7 @@ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ -extern struct tcp_pcb *server_pcb_hart1; -extern struct tcp_pcb *server_pcb_hart2; -extern struct tcp_pcb *server_pcb_ble1; -extern struct tcp_pcb *server_pcb_ble2; + /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ @@ -63,21 +58,6 @@ extern struct tcp_pcb *server_pcb_ble2; /* External variables --------------------------------------------------------*/ extern ETH_HandleTypeDef heth; extern TIM_HandleTypeDef htim3; -extern DMA_HandleTypeDef hdma_uart4_rx; -extern DMA_HandleTypeDef hdma_uart4_tx; -extern DMA_HandleTypeDef hdma_uart5_tx; -extern DMA_HandleTypeDef hdma_uart5_rx; -extern DMA_HandleTypeDef hdma_usart2_rx; -extern DMA_HandleTypeDef hdma_usart2_tx; -extern DMA_HandleTypeDef hdma_usart3_rx; -extern DMA_HandleTypeDef hdma_usart3_tx; -extern DMA_HandleTypeDef hdma_usart6_rx; -extern DMA_HandleTypeDef hdma_usart6_tx; -extern UART_HandleTypeDef huart4; -extern UART_HandleTypeDef huart5; -extern UART_HandleTypeDef huart2; -extern UART_HandleTypeDef huart3; -extern UART_HandleTypeDef huart6; extern TIM_HandleTypeDef htim1; /* USER CODE BEGIN EV */ @@ -182,132 +162,6 @@ void DebugMon_Handler(void) /* please refer to the startup file (startup_stm32f4xx.s). */ /******************************************************************************/ -/** - * @brief This function handles EXTI line1 interrupt. - */ -void EXTI1_IRQHandler(void) -{ - /* USER CODE BEGIN EXTI1_IRQn 0 */ - - /* USER CODE END EXTI1_IRQn 0 */ - HAL_GPIO_EXTI_IRQHandler(HART1_OCD_Pin); - /* USER CODE BEGIN EXTI1_IRQn 1 */ - HAL_GPIO_TogglePin(LED3_G_GPIO_Port, LED3_G_Pin); - /* USER CODE END EXTI1_IRQn 1 */ -} - -/** - * @brief This function handles EXTI line3 interrupt. - */ -void EXTI3_IRQHandler(void) -{ - /* USER CODE BEGIN EXTI3_IRQn 0 */ - - /* USER CODE END EXTI3_IRQn 0 */ - HAL_GPIO_EXTI_IRQHandler(HART2_OCD_Pin); - /* USER CODE BEGIN EXTI3_IRQn 1 */ - HAL_GPIO_TogglePin(LED3_R_GPIO_Port, LED3_R_Pin); - /* USER CODE END EXTI3_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 stream0 global interrupt. - */ -void DMA1_Stream0_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Stream0_IRQn 0 */ - - /* USER CODE END DMA1_Stream0_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_uart5_rx); - /* USER CODE BEGIN DMA1_Stream0_IRQn 1 */ - - /* USER CODE END DMA1_Stream0_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 stream1 global interrupt. - */ -void DMA1_Stream1_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */ - - /* USER CODE END DMA1_Stream1_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart3_rx); - /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */ - - /* USER CODE END DMA1_Stream1_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 stream2 global interrupt. - */ -void DMA1_Stream2_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */ - - /* USER CODE END DMA1_Stream2_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_uart4_rx); - /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */ - - /* USER CODE END DMA1_Stream2_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 stream3 global interrupt. - */ -void DMA1_Stream3_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */ - - /* USER CODE END DMA1_Stream3_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart3_tx); - /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */ - - /* USER CODE END DMA1_Stream3_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 stream4 global interrupt. - */ -void DMA1_Stream4_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Stream4_IRQn 0 */ - - /* USER CODE END DMA1_Stream4_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_uart4_tx); - /* USER CODE BEGIN DMA1_Stream4_IRQn 1 */ - - /* USER CODE END DMA1_Stream4_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 stream5 global interrupt. - */ -void DMA1_Stream5_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */ - - /* USER CODE END DMA1_Stream5_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart2_rx); - /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */ - - /* USER CODE END DMA1_Stream5_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 stream6 global interrupt. - */ -void DMA1_Stream6_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Stream6_IRQn 0 */ - - /* USER CODE END DMA1_Stream6_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart2_tx); - /* USER CODE BEGIN DMA1_Stream6_IRQn 1 */ - - /* USER CODE END DMA1_Stream6_IRQn 1 */ -} - /** * @brief This function handles TIM1 update interrupt and TIM10 global interrupt. */ @@ -336,130 +190,6 @@ void TIM3_IRQHandler(void) /* USER CODE END TIM3_IRQn 1 */ } -/** - * @brief This function handles USART2 global interrupt. - */ -void USART2_IRQHandler(void) -{ - /* USER CODE BEGIN USART2_IRQn 0 */ - // uint8_t receive_data = 0; - // if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_RXNE) != RESET) - // { - // HAL_UART_Receive(&huart2, &receive_data, 1, 10); - // hart2_uart2.rx_data[hart2_uart2.rx_num] = receive_data; - // hart2_uart2.rx_num++; - // __HAL_UART_CLEAR_IDLEFLAG(&huart2); - // } - // // 空闲中断 - // if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_IDLE) != RESET) - // { - // if (tcp_echo_flags_hart2 == 1) - // { - // user_send_data_hart2(hart2_uart2.rx_data, hart2_uart2.rx_num); - // } - // hart2_uart2.rx_num = 0; - // __HAL_UART_CLEAR_IDLEFLAG(&huart2); - // } - /* USER CODE END USART2_IRQn 0 */ - HAL_UART_IRQHandler(&huart2); - /* USER CODE BEGIN USART2_IRQn 1 */ - - /* USER CODE END USART2_IRQn 1 */ -} - -/** - * @brief This function handles USART3 global interrupt. - */ -void USART3_IRQHandler(void) -{ - /* USER CODE BEGIN USART3_IRQn 0 */ - - /* USER CODE END USART3_IRQn 0 */ - HAL_UART_IRQHandler(&huart3); - /* USER CODE BEGIN USART3_IRQn 1 */ - - /* USER CODE END USART3_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 stream7 global interrupt. - */ -void DMA1_Stream7_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Stream7_IRQn 0 */ - // if (__HAL_DMA_GET_FLAG(&hdma_uart5_tx, DMA_FLAG_TCIF3_7) != RESET) - // { - // uint8_t i = 0; - // for (i = 0; i < 200; i++) - // { - // HART1_RTS_SEND; - // } - // HART1_RTS_RECEIVE; - // } - /* USER CODE END DMA1_Stream7_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_uart5_tx); - /* USER CODE BEGIN DMA1_Stream7_IRQn 1 */ - - /* USER CODE END DMA1_Stream7_IRQn 1 */ -} - -/** - * @brief This function handles UART4 global interrupt. - */ -void UART4_IRQHandler(void) -{ - /* USER CODE BEGIN UART4_IRQn 0 */ - /* USER CODE END UART4_IRQn 0 */ - HAL_UART_IRQHandler(&huart4); - /* USER CODE BEGIN UART4_IRQn 1 */ - - /* USER CODE END UART4_IRQn 1 */ -} - -/** - * @brief This function handles UART5 global interrupt. - */ -void UART5_IRQHandler(void) -{ - /* USER CODE BEGIN UART5_IRQn 0 */ - // uint8_t receive_data = 0; - // if (__HAL_UART_GET_FLAG(&huart5, UART_FLAG_RXNE) != RESET) - // { - // HAL_UART_Receive(&huart5, &receive_data, 1, 1); - // hart1_uart5.rx_data[hart1_uart5.rx_num] = receive_data; - // hart1_uart5.rx_num++; - // __HAL_UART_CLEAR_IDLEFLAG(&huart5); - // } - // // 空闲中断 - // if (__HAL_UART_GET_FLAG(&huart5, UART_FLAG_IDLE) != RESET) - // { - // if (tcp_echo_flags_hart1 == 1) - // { - // user_send_data_hart1(hart1_uart5.rx_data, hart1_uart5.rx_num); - // } - // hart1_uart5.rx_num = 0; - // __HAL_UART_CLEAR_IDLEFLAG(&huart5); - // } - /* USER CODE END UART5_IRQn 0 */ - HAL_UART_IRQHandler(&huart5); - /* USER CODE BEGIN UART5_IRQn 1 */ - /* USER CODE END UART5_IRQn 1 */ -} - -/** - * @brief This function handles DMA2 stream1 global interrupt. - */ -void DMA2_Stream1_IRQHandler(void) -{ - /* USER CODE BEGIN DMA2_Stream1_IRQn 0 */ - - /* USER CODE END DMA2_Stream1_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart6_rx); - /* USER CODE BEGIN DMA2_Stream1_IRQn 1 */ - - /* USER CODE END DMA2_Stream1_IRQn 1 */ -} - /** * @brief This function handles Ethernet global interrupt. */ @@ -474,34 +204,6 @@ void ETH_IRQHandler(void) /* USER CODE END ETH_IRQn 1 */ } -/** - * @brief This function handles DMA2 stream6 global interrupt. - */ -void DMA2_Stream6_IRQHandler(void) -{ - /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */ - - /* USER CODE END DMA2_Stream6_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_usart6_tx); - /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */ - - /* USER CODE END DMA2_Stream6_IRQn 1 */ -} - -/** - * @brief This function handles USART6 global interrupt. - */ -void USART6_IRQHandler(void) -{ - /* USER CODE BEGIN USART6_IRQn 0 */ - - /* USER CODE END USART6_IRQn 0 */ - HAL_UART_IRQHandler(&huart6); - /* USER CODE BEGIN USART6_IRQn 1 */ - - /* USER CODE END USART6_IRQn 1 */ -} - /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/Core/Src/tim.c b/Core/Src/tim.c index ae27cfe..2ebea8c 100644 --- a/Core/Src/tim.c +++ b/Core/Src/tim.c @@ -37,7 +37,6 @@ void MX_TIM2_Init(void) TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; - TIM_OC_InitTypeDef sConfigOC = {0}; /* USER CODE BEGIN TIM2_Init 1 */ @@ -57,28 +56,15 @@ void MX_TIM2_Init(void) { Error_Handler(); } - if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) - { - Error_Handler(); - } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) { Error_Handler(); } - sConfigOC.OCMode = TIM_OCMODE_PWM1; - sConfigOC.Pulse = 60; - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - { - Error_Handler(); - } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ - HAL_TIM_MspPostInit(&htim2); } /* TIM3 init function */ @@ -152,33 +138,6 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) /* USER CODE END TIM3_MspInit 1 */ } } -void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) -{ - - GPIO_InitTypeDef GPIO_InitStruct = {0}; - if(timHandle->Instance==TIM2) - { - /* USER CODE BEGIN TIM2_MspPostInit 0 */ - - /* USER CODE END TIM2_MspPostInit 0 */ - - __HAL_RCC_GPIOA_CLK_ENABLE(); - /**TIM2 GPIO Configuration - PA15 ------> TIM2_CH1 - */ - GPIO_InitStruct.Pin = HART_CLK_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; - HAL_GPIO_Init(HART_CLK_GPIO_Port, &GPIO_InitStruct); - - /* USER CODE BEGIN TIM2_MspPostInit 1 */ - - /* USER CODE END TIM2_MspPostInit 1 */ - } - -} void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle) { diff --git a/Core/Src/usart.c b/Core/Src/usart.c deleted file mode 100644 index 984d66c..0000000 --- a/Core/Src/usart.c +++ /dev/null @@ -1,672 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file usart.c - * @brief This file provides code for the configuration - * of the USART instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "usart.h" - -/* USER CODE BEGIN 0 */ -/* USER CODE END 0 */ - -UART_HandleTypeDef huart4; -UART_HandleTypeDef huart5; -UART_HandleTypeDef huart2; -UART_HandleTypeDef huart3; -UART_HandleTypeDef huart6; -DMA_HandleTypeDef hdma_uart4_rx; -DMA_HandleTypeDef hdma_uart4_tx; -DMA_HandleTypeDef hdma_uart5_tx; -DMA_HandleTypeDef hdma_uart5_rx; -DMA_HandleTypeDef hdma_usart2_rx; -DMA_HandleTypeDef hdma_usart2_tx; -DMA_HandleTypeDef hdma_usart3_rx; -DMA_HandleTypeDef hdma_usart3_tx; -DMA_HandleTypeDef hdma_usart6_rx; -DMA_HandleTypeDef hdma_usart6_tx; - -/* UART4 init function */ -void MX_UART4_Init(void) -{ - - /* USER CODE BEGIN UART4_Init 0 */ - - /* USER CODE END UART4_Init 0 */ - - /* USER CODE BEGIN UART4_Init 1 */ - - /* USER CODE END UART4_Init 1 */ - huart4.Instance = UART4; - huart4.Init.BaudRate = 115200; - huart4.Init.WordLength = UART_WORDLENGTH_8B; - huart4.Init.StopBits = UART_STOPBITS_1; - huart4.Init.Parity = UART_PARITY_NONE; - huart4.Init.Mode = UART_MODE_TX_RX; - huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart4.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart4) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN UART4_Init 2 */ - //__HAL_UART_ENABLE_IT(&huart4, UART_IT_IDLE); // 使能IDLE中断 - /* USER CODE END UART4_Init 2 */ - -} -/* UART5 init function */ -void MX_UART5_Init(void) -{ - - /* USER CODE BEGIN UART5_Init 0 */ - - /* USER CODE END UART5_Init 0 */ - - /* USER CODE BEGIN UART5_Init 1 */ - - /* USER CODE END UART5_Init 1 */ - huart5.Instance = UART5; - huart5.Init.BaudRate = 1200; - huart5.Init.WordLength = UART_WORDLENGTH_9B; - huart5.Init.StopBits = UART_STOPBITS_1; - huart5.Init.Parity = UART_PARITY_ODD; - huart5.Init.Mode = UART_MODE_TX_RX; - huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart5.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart5) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN UART5_Init 2 */ - // __HAL_UART_ENABLE_IT(&huart5, UART_IT_RXNE); // 接收中断 - // __HAL_UART_ENABLE_IT(&huart5, UART_IT_IDLE); // 空闲中断 - /* USER CODE END UART5_Init 2 */ - -} -/* USART2 init function */ - -void MX_USART2_UART_Init(void) -{ - - /* USER CODE BEGIN USART2_Init 0 */ - - /* USER CODE END USART2_Init 0 */ - - /* USER CODE BEGIN USART2_Init 1 */ - - /* USER CODE END USART2_Init 1 */ - huart2.Instance = USART2; - huart2.Init.BaudRate = 1200; - huart2.Init.WordLength = UART_WORDLENGTH_9B; - huart2.Init.StopBits = UART_STOPBITS_1; - huart2.Init.Parity = UART_PARITY_ODD; - huart2.Init.Mode = UART_MODE_TX_RX; - huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart2.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart2) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USART2_Init 2 */ - // __HAL_UART_ENABLE_IT(&huart2, UART_IT_RXNE); // 接收中断 - // __HAL_UART_ENABLE_IT(&huart2, UART_IT_IDLE); // 使能IDLE中断 - /* USER CODE END USART2_Init 2 */ - -} -/* USART3 init function */ - -void MX_USART3_UART_Init(void) -{ - - /* USER CODE BEGIN USART3_Init 0 */ - - /* USER CODE END USART3_Init 0 */ - - /* USER CODE BEGIN USART3_Init 1 */ - - /* USER CODE END USART3_Init 1 */ - huart3.Instance = USART3; - huart3.Init.BaudRate = 115200; - huart3.Init.WordLength = UART_WORDLENGTH_8B; - huart3.Init.StopBits = UART_STOPBITS_1; - huart3.Init.Parity = UART_PARITY_NONE; - huart3.Init.Mode = UART_MODE_TX_RX; - huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart3.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart3) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USART3_Init 2 */ - - /* USER CODE END USART3_Init 2 */ - -} -/* USART6 init function */ - -void MX_USART6_UART_Init(void) -{ - - /* USER CODE BEGIN USART6_Init 0 */ - - /* USER CODE END USART6_Init 0 */ - - /* USER CODE BEGIN USART6_Init 1 */ - - /* USER CODE END USART6_Init 1 */ - huart6.Instance = USART6; - huart6.Init.BaudRate = 115200; - huart6.Init.WordLength = UART_WORDLENGTH_8B; - huart6.Init.StopBits = UART_STOPBITS_1; - huart6.Init.Parity = UART_PARITY_NONE; - huart6.Init.Mode = UART_MODE_TX_RX; - huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart6.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart6) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USART6_Init 2 */ - - /* USER CODE END USART6_Init 2 */ - -} - -void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) -{ - - GPIO_InitTypeDef GPIO_InitStruct = {0}; - if(uartHandle->Instance==UART4) - { - /* USER CODE BEGIN UART4_MspInit 0 */ - - /* USER CODE END UART4_MspInit 0 */ - /* UART4 clock enable */ - __HAL_RCC_UART4_CLK_ENABLE(); - - __HAL_RCC_GPIOC_CLK_ENABLE(); - /**UART4 GPIO Configuration - PC10 ------> UART4_TX - PC11 ------> UART4_RX - */ - GPIO_InitStruct.Pin = LCD_TX_Pin|LCD_RX_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF8_UART4; - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /* UART4 DMA Init */ - /* UART4_RX Init */ - hdma_uart4_rx.Instance = DMA1_Stream2; - hdma_uart4_rx.Init.Channel = DMA_CHANNEL_4; - hdma_uart4_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_uart4_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_uart4_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_uart4_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_uart4_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_uart4_rx.Init.Mode = DMA_NORMAL; - hdma_uart4_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH; - hdma_uart4_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_uart4_rx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmarx,hdma_uart4_rx); - - /* UART4_TX Init */ - hdma_uart4_tx.Instance = DMA1_Stream4; - hdma_uart4_tx.Init.Channel = DMA_CHANNEL_4; - hdma_uart4_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - hdma_uart4_tx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_uart4_tx.Init.MemInc = DMA_MINC_ENABLE; - hdma_uart4_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_uart4_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_uart4_tx.Init.Mode = DMA_NORMAL; - hdma_uart4_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH; - hdma_uart4_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_uart4_tx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart4_tx); - - /* UART4 interrupt Init */ - HAL_NVIC_SetPriority(UART4_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(UART4_IRQn); - /* USER CODE BEGIN UART4_MspInit 1 */ - - /* USER CODE END UART4_MspInit 1 */ - } - else if(uartHandle->Instance==UART5) - { - /* USER CODE BEGIN UART5_MspInit 0 */ - - /* USER CODE END UART5_MspInit 0 */ - /* UART5 clock enable */ - __HAL_RCC_UART5_CLK_ENABLE(); - - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - /**UART5 GPIO Configuration - PC12 ------> UART5_TX - PD2 ------> UART5_RX - */ - GPIO_InitStruct.Pin = HART1_TX_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF8_UART5; - HAL_GPIO_Init(HART1_TX_GPIO_Port, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = HART1_RX_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF8_UART5; - HAL_GPIO_Init(HART1_RX_GPIO_Port, &GPIO_InitStruct); - - /* UART5 DMA Init */ - /* UART5_TX Init */ - hdma_uart5_tx.Instance = DMA1_Stream7; - hdma_uart5_tx.Init.Channel = DMA_CHANNEL_4; - hdma_uart5_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - hdma_uart5_tx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_uart5_tx.Init.MemInc = DMA_MINC_ENABLE; - hdma_uart5_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_uart5_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_uart5_tx.Init.Mode = DMA_NORMAL; - hdma_uart5_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH; - hdma_uart5_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_uart5_tx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart5_tx); - - /* UART5_RX Init */ - hdma_uart5_rx.Instance = DMA1_Stream0; - hdma_uart5_rx.Init.Channel = DMA_CHANNEL_4; - hdma_uart5_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_uart5_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_uart5_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_uart5_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_uart5_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_uart5_rx.Init.Mode = DMA_NORMAL; - hdma_uart5_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH; - hdma_uart5_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_uart5_rx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmarx,hdma_uart5_rx); - - /* UART5 interrupt Init */ - HAL_NVIC_SetPriority(UART5_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(UART5_IRQn); - /* USER CODE BEGIN UART5_MspInit 1 */ - - /* USER CODE END UART5_MspInit 1 */ - } - else if(uartHandle->Instance==USART2) - { - /* USER CODE BEGIN USART2_MspInit 0 */ - - /* USER CODE END USART2_MspInit 0 */ - /* USART2 clock enable */ - __HAL_RCC_USART2_CLK_ENABLE(); - - __HAL_RCC_GPIOD_CLK_ENABLE(); - /**USART2 GPIO Configuration - PD5 ------> USART2_TX - PD6 ------> USART2_RX - */ - GPIO_InitStruct.Pin = HART2_TX_Pin|HART2_RX_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF7_USART2; - HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - - /* USART2 DMA Init */ - /* USART2_RX Init */ - hdma_usart2_rx.Instance = DMA1_Stream5; - hdma_usart2_rx.Init.Channel = DMA_CHANNEL_4; - hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart2_rx.Init.Mode = DMA_NORMAL; - hdma_usart2_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH; - hdma_usart2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx); - - /* USART2_TX Init */ - hdma_usart2_tx.Instance = DMA1_Stream6; - hdma_usart2_tx.Init.Channel = DMA_CHANNEL_4; - hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart2_tx.Init.Mode = DMA_NORMAL; - hdma_usart2_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH; - hdma_usart2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx); - - /* USART2 interrupt Init */ - HAL_NVIC_SetPriority(USART2_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(USART2_IRQn); - /* USER CODE BEGIN USART2_MspInit 1 */ - - /* USER CODE END USART2_MspInit 1 */ - } - else if(uartHandle->Instance==USART3) - { - /* USER CODE BEGIN USART3_MspInit 0 */ - - /* USER CODE END USART3_MspInit 0 */ - /* USART3 clock enable */ - __HAL_RCC_USART3_CLK_ENABLE(); - - __HAL_RCC_GPIOD_CLK_ENABLE(); - /**USART3 GPIO Configuration - PD8 ------> USART3_TX - PD9 ------> USART3_RX - */ - GPIO_InitStruct.Pin = BLE2_TX_Pin|BLE2_RX_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - - /* USART3 DMA Init */ - /* USART3_RX Init */ - hdma_usart3_rx.Instance = DMA1_Stream1; - hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4; - hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart3_rx.Init.Mode = DMA_NORMAL; - hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW; - hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart3_rx); - - /* USART3_TX Init */ - hdma_usart3_tx.Instance = DMA1_Stream3; - hdma_usart3_tx.Init.Channel = DMA_CHANNEL_4; - hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart3_tx.Init.Mode = DMA_NORMAL; - hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW; - hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx); - - /* USART3 interrupt Init */ - HAL_NVIC_SetPriority(USART3_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(USART3_IRQn); - /* USER CODE BEGIN USART3_MspInit 1 */ - - /* USER CODE END USART3_MspInit 1 */ - } - else if(uartHandle->Instance==USART6) - { - /* USER CODE BEGIN USART6_MspInit 0 */ - - /* USER CODE END USART6_MspInit 0 */ - /* USART6 clock enable */ - __HAL_RCC_USART6_CLK_ENABLE(); - - __HAL_RCC_GPIOC_CLK_ENABLE(); - /**USART6 GPIO Configuration - PC6 ------> USART6_TX - PC7 ------> USART6_RX - */ - GPIO_InitStruct.Pin = BLE1_TX_Pin|BLE1_RX_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF8_USART6; - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /* USART6 DMA Init */ - /* USART6_RX Init */ - hdma_usart6_rx.Instance = DMA2_Stream1; - hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5; - hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart6_rx.Init.Mode = DMA_NORMAL; - hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW; - hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart6_rx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart6_rx); - - /* USART6_TX Init */ - hdma_usart6_tx.Instance = DMA2_Stream6; - hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5; - hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart6_tx.Init.Mode = DMA_NORMAL; - hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; - hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart6_tx); - - /* USART6 interrupt Init */ - HAL_NVIC_SetPriority(USART6_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(USART6_IRQn); - /* USER CODE BEGIN USART6_MspInit 1 */ - - /* USER CODE END USART6_MspInit 1 */ - } -} - -void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) -{ - - if(uartHandle->Instance==UART4) - { - /* USER CODE BEGIN UART4_MspDeInit 0 */ - - /* USER CODE END UART4_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_UART4_CLK_DISABLE(); - - /**UART4 GPIO Configuration - PC10 ------> UART4_TX - PC11 ------> UART4_RX - */ - HAL_GPIO_DeInit(GPIOC, LCD_TX_Pin|LCD_RX_Pin); - - /* UART4 DMA DeInit */ - HAL_DMA_DeInit(uartHandle->hdmarx); - HAL_DMA_DeInit(uartHandle->hdmatx); - - /* UART4 interrupt Deinit */ - HAL_NVIC_DisableIRQ(UART4_IRQn); - /* USER CODE BEGIN UART4_MspDeInit 1 */ - - /* USER CODE END UART4_MspDeInit 1 */ - } - else if(uartHandle->Instance==UART5) - { - /* USER CODE BEGIN UART5_MspDeInit 0 */ - - /* USER CODE END UART5_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_UART5_CLK_DISABLE(); - - /**UART5 GPIO Configuration - PC12 ------> UART5_TX - PD2 ------> UART5_RX - */ - HAL_GPIO_DeInit(HART1_TX_GPIO_Port, HART1_TX_Pin); - - HAL_GPIO_DeInit(HART1_RX_GPIO_Port, HART1_RX_Pin); - - /* UART5 DMA DeInit */ - HAL_DMA_DeInit(uartHandle->hdmatx); - HAL_DMA_DeInit(uartHandle->hdmarx); - - /* UART5 interrupt Deinit */ - HAL_NVIC_DisableIRQ(UART5_IRQn); - /* USER CODE BEGIN UART5_MspDeInit 1 */ - - /* USER CODE END UART5_MspDeInit 1 */ - } - else if(uartHandle->Instance==USART2) - { - /* USER CODE BEGIN USART2_MspDeInit 0 */ - - /* USER CODE END USART2_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART2_CLK_DISABLE(); - - /**USART2 GPIO Configuration - PD5 ------> USART2_TX - PD6 ------> USART2_RX - */ - HAL_GPIO_DeInit(GPIOD, HART2_TX_Pin|HART2_RX_Pin); - - /* USART2 DMA DeInit */ - HAL_DMA_DeInit(uartHandle->hdmarx); - HAL_DMA_DeInit(uartHandle->hdmatx); - - /* USART2 interrupt Deinit */ - HAL_NVIC_DisableIRQ(USART2_IRQn); - /* USER CODE BEGIN USART2_MspDeInit 1 */ - - /* USER CODE END USART2_MspDeInit 1 */ - } - else if(uartHandle->Instance==USART3) - { - /* USER CODE BEGIN USART3_MspDeInit 0 */ - - /* USER CODE END USART3_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART3_CLK_DISABLE(); - - /**USART3 GPIO Configuration - PD8 ------> USART3_TX - PD9 ------> USART3_RX - */ - HAL_GPIO_DeInit(GPIOD, BLE2_TX_Pin|BLE2_RX_Pin); - - /* USART3 DMA DeInit */ - HAL_DMA_DeInit(uartHandle->hdmarx); - HAL_DMA_DeInit(uartHandle->hdmatx); - - /* USART3 interrupt Deinit */ - HAL_NVIC_DisableIRQ(USART3_IRQn); - /* USER CODE BEGIN USART3_MspDeInit 1 */ - - /* USER CODE END USART3_MspDeInit 1 */ - } - else if(uartHandle->Instance==USART6) - { - /* USER CODE BEGIN USART6_MspDeInit 0 */ - - /* USER CODE END USART6_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART6_CLK_DISABLE(); - - /**USART6 GPIO Configuration - PC6 ------> USART6_TX - PC7 ------> USART6_RX - */ - HAL_GPIO_DeInit(GPIOC, BLE1_TX_Pin|BLE1_RX_Pin); - - /* USART6 DMA DeInit */ - HAL_DMA_DeInit(uartHandle->hdmarx); - HAL_DMA_DeInit(uartHandle->hdmatx); - - /* USART6 interrupt Deinit */ - HAL_NVIC_DisableIRQ(USART6_IRQn); - /* USER CODE BEGIN USART6_MspDeInit 1 */ - - /* USER CODE END USART6_MspDeInit 1 */ - } -} - -/* USER CODE BEGIN 1 */ - -/** - * @brief 使用DMA方式通过串口发?数? - * - * 该函数使用DMA方式通过指定的串口发送指定长度的数据? - * - * @param huart UART_HandleTypeDef结构体指针,指向?要使用的串口句柄 - * @param buf 指向?要发送的数据缓冲区的指针 - * @param len ?要发送的数据长度 - * - * @return 无返回?? - * - * @note 如果发?过程中出现错误,会调用Error_Handler函数处理错误 - */ -void dma_usart_send(UART_HandleTypeDef *huart, uint8_t *buf, uint8_t len) -{ - if (HAL_UART_Transmit_DMA(huart, buf, len) != HAL_OK) // 判断是否发?正常,如果出现异常则进入异常中断函? - { - Error_Handler(); - } -} - -/* USER CODE END 1 */ diff --git a/Documents/schematic diagram/Multi-channelDigitalInOut-V1.0-20250103.pdf b/Documents/schematic diagram/Multi-channelDigitalInOut-V1.0-20250103.pdf new file mode 100644 index 0000000..60e8f4d Binary files /dev/null and b/Documents/schematic diagram/Multi-channelDigitalInOut-V1.0-20250103.pdf differ diff --git a/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h b/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h deleted file mode 100644 index d7997a3..0000000 --- a/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h +++ /dev/null @@ -1,729 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_spi.h - * @author MCD Application Team - * @brief Header file of SPI HAL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32F4xx_HAL_SPI_H -#define STM32F4xx_HAL_SPI_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f4xx_hal_def.h" - -/** @addtogroup STM32F4xx_HAL_Driver - * @{ - */ - -/** @addtogroup SPI - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup SPI_Exported_Types SPI Exported Types - * @{ - */ - -/** - * @brief SPI Configuration Structure definition - */ -typedef struct -{ - uint32_t Mode; /*!< Specifies the SPI operating mode. - This parameter can be a value of @ref SPI_Mode */ - - uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. - This parameter can be a value of @ref SPI_Direction */ - - uint32_t DataSize; /*!< Specifies the SPI data size. - This parameter can be a value of @ref SPI_Data_Size */ - - uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. - This parameter can be a value of @ref SPI_Clock_Polarity */ - - uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. - This parameter can be a value of @ref SPI_Clock_Phase */ - - uint32_t NSS; /*!< Specifies whether the NSS signal is managed by - hardware (NSS pin) or by software using the SSI bit. - This parameter can be a value of @ref SPI_Slave_Select_management */ - - uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be - used to configure the transmit and receive SCK clock. - This parameter can be a value of @ref SPI_BaudRate_Prescaler - @note The communication clock is derived from the master - clock. The slave clock does not need to be set. */ - - uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. - This parameter can be a value of @ref SPI_MSB_LSB_transmission */ - - uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. - This parameter can be a value of @ref SPI_TI_mode */ - - uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. - This parameter can be a value of @ref SPI_CRC_Calculation */ - - uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. - This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ -} SPI_InitTypeDef; - -/** - * @brief HAL SPI State structure definition - */ -typedef enum -{ - HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ - HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ - HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ - HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ - HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ - HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ - HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ - HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ -} HAL_SPI_StateTypeDef; - -/** - * @brief SPI handle Structure definition - */ -typedef struct __SPI_HandleTypeDef -{ - SPI_TypeDef *Instance; /*!< SPI registers base address */ - - SPI_InitTypeDef Init; /*!< SPI communication parameters */ - - uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ - - uint16_t TxXferSize; /*!< SPI Tx Transfer size */ - - __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ - - uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ - - uint16_t RxXferSize; /*!< SPI Rx Transfer size */ - - __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ - - void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ - - void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ - - DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ - - HAL_LockTypeDef Lock; /*!< Locking object */ - - __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ - - __IO uint32_t ErrorCode; /*!< SPI Error code */ - -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ - void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ - void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ - void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ - void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ - void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ - void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ - void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ - void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ - void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ - -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} SPI_HandleTypeDef; - -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -/** - * @brief HAL SPI Callback ID enumeration definition - */ -typedef enum -{ - HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ - HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ - HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ - HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ - HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ - HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ - HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ - HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ - HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ - HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ - -} HAL_SPI_CallbackIDTypeDef; - -/** - * @brief HAL SPI Callback pointer definition - */ -typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ - -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup SPI_Exported_Constants SPI Exported Constants - * @{ - */ - -/** @defgroup SPI_Error_Code SPI Error Code - * @{ - */ -#define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ -#define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ -#define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ -#define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ -#define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */ -#define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ -#define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ -#define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -#define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -/** - * @} - */ - -/** @defgroup SPI_Mode SPI Mode - * @{ - */ -#define SPI_MODE_SLAVE (0x00000000U) -#define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) -/** - * @} - */ - -/** @defgroup SPI_Direction SPI Direction Mode - * @{ - */ -#define SPI_DIRECTION_2LINES (0x00000000U) -#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY -#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE -/** - * @} - */ - -/** @defgroup SPI_Data_Size SPI Data Size - * @{ - */ -#define SPI_DATASIZE_8BIT (0x00000000U) -#define SPI_DATASIZE_16BIT SPI_CR1_DFF -/** - * @} - */ - -/** @defgroup SPI_Clock_Polarity SPI Clock Polarity - * @{ - */ -#define SPI_POLARITY_LOW (0x00000000U) -#define SPI_POLARITY_HIGH SPI_CR1_CPOL -/** - * @} - */ - -/** @defgroup SPI_Clock_Phase SPI Clock Phase - * @{ - */ -#define SPI_PHASE_1EDGE (0x00000000U) -#define SPI_PHASE_2EDGE SPI_CR1_CPHA -/** - * @} - */ - -/** @defgroup SPI_Slave_Select_management SPI Slave Select Management - * @{ - */ -#define SPI_NSS_SOFT SPI_CR1_SSM -#define SPI_NSS_HARD_INPUT (0x00000000U) -#define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) -/** - * @} - */ - -/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler - * @{ - */ -#define SPI_BAUDRATEPRESCALER_2 (0x00000000U) -#define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) -#define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) -#define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) -#define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) -#define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) -#define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) -#define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) -/** - * @} - */ - -/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission - * @{ - */ -#define SPI_FIRSTBIT_MSB (0x00000000U) -#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST -/** - * @} - */ - -/** @defgroup SPI_TI_mode SPI TI Mode - * @{ - */ -#define SPI_TIMODE_DISABLE (0x00000000U) -#define SPI_TIMODE_ENABLE SPI_CR2_FRF -/** - * @} - */ - -/** @defgroup SPI_CRC_Calculation SPI CRC Calculation - * @{ - */ -#define SPI_CRCCALCULATION_DISABLE (0x00000000U) -#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN -/** - * @} - */ - -/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition - * @{ - */ -#define SPI_IT_TXE SPI_CR2_TXEIE -#define SPI_IT_RXNE SPI_CR2_RXNEIE -#define SPI_IT_ERR SPI_CR2_ERRIE -/** - * @} - */ - -/** @defgroup SPI_Flags_definition SPI Flags Definition - * @{ - */ -#define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ -#define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ -#define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ -#define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ -#define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ -#define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ -#define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ -#define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\ - | SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup SPI_Exported_Macros SPI Exported Macros - * @{ - */ - -/** @brief Reset SPI handle state. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ - (__HANDLE__)->MspInitCallback = NULL; \ - (__HANDLE__)->MspDeInitCallback = NULL; \ - } while(0) -#else -#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - -/** @brief Enable the specified SPI interrupts. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @param __INTERRUPT__ specifies the interrupt source to enable. - * This parameter can be one of the following values: - * @arg SPI_IT_TXE: Tx buffer empty interrupt enable - * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable - * @arg SPI_IT_ERR: Error interrupt enable - * @retval None - */ -#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) - -/** @brief Disable the specified SPI interrupts. - * @param __HANDLE__ specifies the SPI handle. - * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. - * @param __INTERRUPT__ specifies the interrupt source to disable. - * This parameter can be one of the following values: - * @arg SPI_IT_TXE: Tx buffer empty interrupt enable - * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable - * @arg SPI_IT_ERR: Error interrupt enable - * @retval None - */ -#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) - -/** @brief Check whether the specified SPI interrupt source is enabled or not. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @param __INTERRUPT__ specifies the SPI interrupt source to check. - * This parameter can be one of the following values: - * @arg SPI_IT_TXE: Tx buffer empty interrupt enable - * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable - * @arg SPI_IT_ERR: Error interrupt enable - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ - & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** @brief Check whether the specified SPI flag is set or not. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg SPI_FLAG_RXNE: Receive buffer not empty flag - * @arg SPI_FLAG_TXE: Transmit buffer empty flag - * @arg SPI_FLAG_CRCERR: CRC error flag - * @arg SPI_FLAG_MODF: Mode fault flag - * @arg SPI_FLAG_OVR: Overrun flag - * @arg SPI_FLAG_BSY: Busy flag - * @arg SPI_FLAG_FRE: Frame format error flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) - -/** @brief Clear the SPI CRCERR pending flag. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) - -/** @brief Clear the SPI MODF pending flag. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ - do{ \ - __IO uint32_t tmpreg_modf = 0x00U; \ - tmpreg_modf = (__HANDLE__)->Instance->SR; \ - CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ - UNUSED(tmpreg_modf); \ - } while(0U) - -/** @brief Clear the SPI OVR pending flag. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ - do{ \ - __IO uint32_t tmpreg_ovr = 0x00U; \ - tmpreg_ovr = (__HANDLE__)->Instance->DR; \ - tmpreg_ovr = (__HANDLE__)->Instance->SR; \ - UNUSED(tmpreg_ovr); \ - } while(0U) - -/** @brief Clear the SPI FRE pending flag. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ - do{ \ - __IO uint32_t tmpreg_fre = 0x00U; \ - tmpreg_fre = (__HANDLE__)->Instance->SR; \ - UNUSED(tmpreg_fre); \ - }while(0U) - -/** @brief Enable the SPI peripheral. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) - -/** @brief Disable the SPI peripheral. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup SPI_Private_Macros SPI Private Macros - * @{ - */ - -/** @brief Set the SPI transmit-only mode. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) - -/** @brief Set the SPI receive-only mode. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) - -/** @brief Reset the CRC calculation of the SPI. - * @param __HANDLE__ specifies the SPI Handle. - * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @retval None - */ -#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ - SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) - -/** @brief Check whether the specified SPI flag is set or not. - * @param __SR__ copy of SPI SR register. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg SPI_FLAG_RXNE: Receive buffer not empty flag - * @arg SPI_FLAG_TXE: Transmit buffer empty flag - * @arg SPI_FLAG_CRCERR: CRC error flag - * @arg SPI_FLAG_MODF: Mode fault flag - * @arg SPI_FLAG_OVR: Overrun flag - * @arg SPI_FLAG_BSY: Busy flag - * @arg SPI_FLAG_FRE: Frame format error flag - * @retval SET or RESET. - */ -#define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ - ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) - -/** @brief Check whether the specified SPI Interrupt is set or not. - * @param __CR2__ copy of SPI CR2 register. - * @param __INTERRUPT__ specifies the SPI interrupt source to check. - * This parameter can be one of the following values: - * @arg SPI_IT_TXE: Tx buffer empty interrupt enable - * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable - * @arg SPI_IT_ERR: Error interrupt enable - * @retval SET or RESET. - */ -#define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ - (__INTERRUPT__)) ? SET : RESET) - -/** @brief Checks if SPI Mode parameter is in allowed range. - * @param __MODE__ specifies the SPI Mode. - * This parameter can be a value of @ref SPI_Mode - * @retval None - */ -#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ - ((__MODE__) == SPI_MODE_MASTER)) - -/** @brief Checks if SPI Direction Mode parameter is in allowed range. - * @param __MODE__ specifies the SPI Direction Mode. - * This parameter can be a value of @ref SPI_Direction - * @retval None - */ -#define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ - ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ - ((__MODE__) == SPI_DIRECTION_1LINE)) - -/** @brief Checks if SPI Direction Mode parameter is 2 lines. - * @param __MODE__ specifies the SPI Direction Mode. - * @retval None - */ -#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) - -/** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. - * @param __MODE__ specifies the SPI Direction Mode. - * @retval None - */ -#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ - ((__MODE__) == SPI_DIRECTION_1LINE)) - -/** @brief Checks if SPI Data Size parameter is in allowed range. - * @param __DATASIZE__ specifies the SPI Data Size. - * This parameter can be a value of @ref SPI_Data_Size - * @retval None - */ -#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ - ((__DATASIZE__) == SPI_DATASIZE_8BIT)) - -/** @brief Checks if SPI Serial clock steady state parameter is in allowed range. - * @param __CPOL__ specifies the SPI serial clock steady state. - * This parameter can be a value of @ref SPI_Clock_Polarity - * @retval None - */ -#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ - ((__CPOL__) == SPI_POLARITY_HIGH)) - -/** @brief Checks if SPI Clock Phase parameter is in allowed range. - * @param __CPHA__ specifies the SPI Clock Phase. - * This parameter can be a value of @ref SPI_Clock_Phase - * @retval None - */ -#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ - ((__CPHA__) == SPI_PHASE_2EDGE)) - -/** @brief Checks if SPI Slave Select parameter is in allowed range. - * @param __NSS__ specifies the SPI Slave Select management parameter. - * This parameter can be a value of @ref SPI_Slave_Select_management - * @retval None - */ -#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ - ((__NSS__) == SPI_NSS_HARD_INPUT) || \ - ((__NSS__) == SPI_NSS_HARD_OUTPUT)) - -/** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. - * @param __PRESCALER__ specifies the SPI Baudrate prescaler. - * This parameter can be a value of @ref SPI_BaudRate_Prescaler - * @retval None - */ -#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ - ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ - ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ - ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ - ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ - ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ - ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ - ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) - -/** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. - * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). - * This parameter can be a value of @ref SPI_MSB_LSB_transmission - * @retval None - */ -#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ - ((__BIT__) == SPI_FIRSTBIT_LSB)) - -/** @brief Checks if SPI TI mode parameter is in allowed range. - * @param __MODE__ specifies the SPI TI mode. - * This parameter can be a value of @ref SPI_TI_mode - * @retval None - */ -#define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \ - ((__MODE__) == SPI_TIMODE_ENABLE)) - -/** @brief Checks if SPI CRC calculation enabled state is in allowed range. - * @param __CALCULATION__ specifies the SPI CRC calculation enable state. - * This parameter can be a value of @ref SPI_CRC_Calculation - * @retval None - */ -#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ - ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) - -/** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. - * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. - * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 - * @retval None - */ -#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ - ((__POLYNOMIAL__) <= 0xFFFFU) && \ - (((__POLYNOMIAL__)&0x1U) != 0U)) - -/** @brief Checks if DMA handle is valid. - * @param __HANDLE__ specifies a DMA Handle. - * @retval None - */ -#define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SPI_Exported_Functions - * @{ - */ - -/** @addtogroup SPI_Exported_Functions_Group1 - * @{ - */ -/* Initialization/de-initialization functions ********************************/ -HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); -HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); -void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); -void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); - -/* Callbacks Register/UnRegister functions ***********************************/ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, - pSPI_CallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -/** - * @} - */ - -/** @addtogroup SPI_Exported_Functions_Group2 - * @{ - */ -/* I/O operation functions ***************************************************/ -HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, - uint32_t Timeout); -HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, - uint16_t Size); -HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, - uint16_t Size); -HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); -HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); -HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); -/* Transfer Abort functions */ -HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); -HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); - -void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); -void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); -void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); -void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); -void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); -void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); -void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); -void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); -void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); -/** - * @} - */ - -/** @addtogroup SPI_Exported_Functions_Group3 - * @{ - */ -/* Peripheral State and Error functions ***************************************/ -HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); -uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* STM32F4xx_HAL_SPI_H */ - diff --git a/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h b/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h deleted file mode 100644 index c5f5d3e..0000000 --- a/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h +++ /dev/null @@ -1,884 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_uart.h - * @author MCD Application Team - * @brief Header file of UART HAL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_UART_H -#define __STM32F4xx_HAL_UART_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f4xx_hal_def.h" - -/** @addtogroup STM32F4xx_HAL_Driver - * @{ - */ - -/** @addtogroup UART - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup UART_Exported_Types UART Exported Types - * @{ - */ - -/** - * @brief UART Init Structure definition - */ -typedef struct -{ - uint32_t BaudRate; /*!< This member configures the UART communication baud rate. - The baud rate is computed using the following formula: - - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) - - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 - Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ - - uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter can be a value of @ref UART_Word_Length */ - - uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. - This parameter can be a value of @ref UART_Stop_Bits */ - - uint32_t Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref UART_Parity - @note When parity is enabled, the computed parity is inserted - at the MSB position of the transmitted data (9th bit when - the word length is set to 9 data bits; 8th bit when the - word length is set to 8 data bits). */ - - uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. - This parameter can be a value of @ref UART_Mode */ - - uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. - This parameter can be a value of @ref UART_Hardware_Flow_Control */ - - uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). - This parameter can be a value of @ref UART_Over_Sampling */ -} UART_InitTypeDef; - -/** - * @brief HAL UART State structures definition - * @note HAL UART State value is a combination of 2 different substates: gState and RxState. - * - gState contains UART state information related to global Handle management - * and also information related to Tx operations. - * gState value coding follow below described bitmap : - * b7-b6 Error information - * 00 : No Error - * 01 : (Not Used) - * 10 : Timeout - * 11 : Error - * b5 Peripheral initialization status - * 0 : Reset (Peripheral not initialized) - * 1 : Init done (Peripheral initialized. HAL UART Init function already called) - * b4-b3 (not used) - * xx : Should be set to 00 - * b2 Intrinsic process state - * 0 : Ready - * 1 : Busy (Peripheral busy with some configuration or internal operations) - * b1 (not used) - * x : Should be set to 0 - * b0 Tx state - * 0 : Ready (no Tx operation ongoing) - * 1 : Busy (Tx operation ongoing) - * - RxState contains information related to Rx operations. - * RxState value coding follow below described bitmap : - * b7-b6 (not used) - * xx : Should be set to 00 - * b5 Peripheral initialization status - * 0 : Reset (Peripheral not initialized) - * 1 : Init done (Peripheral initialized) - * b4-b2 (not used) - * xxx : Should be set to 000 - * b1 Rx state - * 0 : Ready (no Rx operation ongoing) - * 1 : Busy (Rx operation ongoing) - * b0 (not used) - * x : Should be set to 0. - */ -typedef enum -{ - HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized - Value is allowed for gState and RxState */ - HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use - Value is allowed for gState and RxState */ - HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing - Value is allowed for gState only */ - HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing - Value is allowed for gState only */ - HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing - Value is allowed for RxState only */ - HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing - Not to be used for neither gState nor RxState. - Value is result of combination (Or) between gState and RxState values */ - HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state - Value is allowed for gState only */ - HAL_UART_STATE_ERROR = 0xE0U /*!< Error - Value is allowed for gState only */ -} HAL_UART_StateTypeDef; - -/** - * @brief HAL UART Reception type definition - * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. - * It is expected to admit following values : - * HAL_UART_RECEPTION_STANDARD = 0x00U, - * HAL_UART_RECEPTION_TOIDLE = 0x01U, - */ -typedef uint32_t HAL_UART_RxTypeTypeDef; - -/** - * @brief UART handle Structure definition - */ -typedef struct __UART_HandleTypeDef -{ - USART_TypeDef *Instance; /*!< UART registers base address */ - - UART_InitTypeDef Init; /*!< UART communication parameters */ - - const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ - - uint16_t TxXferSize; /*!< UART Tx Transfer size */ - - __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ - - uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ - - uint16_t RxXferSize; /*!< UART Rx Transfer size */ - - __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ - - __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ - - DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ - - HAL_LockTypeDef Lock; /*!< Locking object */ - - __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management - and also related to Tx operations. - This parameter can be a value of @ref HAL_UART_StateTypeDef */ - - __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. - This parameter can be a value of @ref HAL_UART_StateTypeDef */ - - __IO uint32_t ErrorCode; /*!< UART Error code */ - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ - void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ - void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ - void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ - void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ - void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ - void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ - void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ - void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ - void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ - - void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ - void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - -} UART_HandleTypeDef; - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) -/** - * @brief HAL UART Callback ID enumeration definition - */ -typedef enum -{ - HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ - HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ - HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ - HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ - HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ - HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ - HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ - HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ - HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ - - HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ - HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ - -} HAL_UART_CallbackIDTypeDef; - -/** - * @brief HAL UART Callback pointer definition - */ -typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ -typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ - -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup UART_Exported_Constants UART Exported Constants - * @{ - */ - -/** @defgroup UART_Error_Code UART Error Code - * @{ - */ -#define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ -#define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ -#define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ -#define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ -#define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ -#define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) -#define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -/** - * @} - */ - -/** @defgroup UART_Word_Length UART Word Length - * @{ - */ -#define UART_WORDLENGTH_8B 0x00000000U -#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) -/** - * @} - */ - -/** @defgroup UART_Stop_Bits UART Number of Stop Bits - * @{ - */ -#define UART_STOPBITS_1 0x00000000U -#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) -/** - * @} - */ - -/** @defgroup UART_Parity UART Parity - * @{ - */ -#define UART_PARITY_NONE 0x00000000U -#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) -#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) -/** - * @} - */ - -/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control - * @{ - */ -#define UART_HWCONTROL_NONE 0x00000000U -#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) -#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) -#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) -/** - * @} - */ - -/** @defgroup UART_Mode UART Transfer Mode - * @{ - */ -#define UART_MODE_RX ((uint32_t)USART_CR1_RE) -#define UART_MODE_TX ((uint32_t)USART_CR1_TE) -#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) -/** - * @} - */ - -/** @defgroup UART_State UART State - * @{ - */ -#define UART_STATE_DISABLE 0x00000000U -#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) -/** - * @} - */ - -/** @defgroup UART_Over_Sampling UART Over Sampling - * @{ - */ -#define UART_OVERSAMPLING_16 0x00000000U -#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) -/** - * @} - */ - -/** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length - * @{ - */ -#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U -#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) -/** - * @} - */ - -/** @defgroup UART_WakeUp_functions UART Wakeup Functions - * @{ - */ -#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U -#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) -/** - * @} - */ - -/** @defgroup UART_Flags UART FLags - * Elements values convention: 0xXXXX - * - 0xXXXX : Flag mask in the SR register - * @{ - */ -#define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) -#define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) -#define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) -#define UART_FLAG_TC ((uint32_t)USART_SR_TC) -#define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) -#define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) -#define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) -#define UART_FLAG_NE ((uint32_t)USART_SR_NE) -#define UART_FLAG_FE ((uint32_t)USART_SR_FE) -#define UART_FLAG_PE ((uint32_t)USART_SR_PE) -/** - * @} - */ - -/** @defgroup UART_Interrupt_definition UART Interrupt Definitions - * Elements values convention: 0xY000XXXX - * - XXXX : Interrupt mask (16 bits) in the Y register - * - Y : Interrupt source register (2bits) - * - 0001: CR1 register - * - 0010: CR2 register - * - 0011: CR3 register - * @{ - */ - -#define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) -#define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) -#define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) -#define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) -#define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) - -#define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) - -#define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) -#define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) -/** - * @} - */ - -/** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values - * @{ - */ -#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ -#define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup UART_Exported_Macros UART Exported Macros - * @{ - */ - -/** @brief Reset UART handle gstate & RxState - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @retval None - */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) -#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ - (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ - (__HANDLE__)->MspInitCallback = NULL; \ - (__HANDLE__)->MspDeInitCallback = NULL; \ - } while(0U) -#else -#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ - (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ - } while(0U) -#endif /*USE_HAL_UART_REGISTER_CALLBACKS */ - -/** @brief Flushes the UART DR register - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - */ -#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) - -/** @brief Checks whether the specified UART flag is set or not. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) - * @arg UART_FLAG_LBD: LIN Break detection flag - * @arg UART_FLAG_TXE: Transmit data register empty flag - * @arg UART_FLAG_TC: Transmission Complete flag - * @arg UART_FLAG_RXNE: Receive data register not empty flag - * @arg UART_FLAG_IDLE: Idle Line detection flag - * @arg UART_FLAG_ORE: Overrun Error flag - * @arg UART_FLAG_NE: Noise Error flag - * @arg UART_FLAG_FE: Framing Error flag - * @arg UART_FLAG_PE: Parity Error flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) - -/** @brief Clears the specified UART pending flag. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @param __FLAG__ specifies the flag to check. - * This parameter can be any combination of the following values: - * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). - * @arg UART_FLAG_LBD: LIN Break detection flag. - * @arg UART_FLAG_TC: Transmission Complete flag. - * @arg UART_FLAG_RXNE: Receive data register not empty flag. - * - * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun - * error) and IDLE (Idle line detected) flags are cleared by software - * sequence: a read operation to USART_SR register followed by a read - * operation to USART_DR register. - * @note RXNE flag can be also cleared by a read to the USART_DR register. - * @note TC flag can be also cleared by software sequence: a read operation to - * USART_SR register followed by a write operation to USART_DR register. - * @note TXE flag is cleared only by a write to the USART_DR register. - * - * @retval None - */ -#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) - -/** @brief Clears the UART PE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @retval None - */ -#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ - do{ \ - __IO uint32_t tmpreg = 0x00U; \ - tmpreg = (__HANDLE__)->Instance->SR; \ - tmpreg = (__HANDLE__)->Instance->DR; \ - UNUSED(tmpreg); \ - } while(0U) - -/** @brief Clears the UART FE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @retval None - */ -#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) - -/** @brief Clears the UART NE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @retval None - */ -#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) - -/** @brief Clears the UART ORE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @retval None - */ -#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) - -/** @brief Clears the UART IDLE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @retval None - */ -#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) - -/** @brief Enable the specified UART interrupt. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @param __INTERRUPT__ specifies the UART interrupt source to enable. - * This parameter can be one of the following values: - * @arg UART_IT_CTS: CTS change interrupt - * @arg UART_IT_LBD: LIN Break detection interrupt - * @arg UART_IT_TXE: Transmit Data Register empty interrupt - * @arg UART_IT_TC: Transmission complete interrupt - * @arg UART_IT_RXNE: Receive Data register not empty interrupt - * @arg UART_IT_IDLE: Idle line detection interrupt - * @arg UART_IT_PE: Parity Error interrupt - * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ - (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ - ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) - -/** @brief Disable the specified UART interrupt. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @param __INTERRUPT__ specifies the UART interrupt source to disable. - * This parameter can be one of the following values: - * @arg UART_IT_CTS: CTS change interrupt - * @arg UART_IT_LBD: LIN Break detection interrupt - * @arg UART_IT_TXE: Transmit Data Register empty interrupt - * @arg UART_IT_TC: Transmission complete interrupt - * @arg UART_IT_RXNE: Receive Data register not empty interrupt - * @arg UART_IT_IDLE: Idle line detection interrupt - * @arg UART_IT_PE: Parity Error interrupt - * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ - (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ - ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) - -/** @brief Checks whether the specified UART interrupt source is enabled or not. - * @param __HANDLE__ specifies the UART Handle. - * UART Handle selects the USARTx or UARTy peripheral - * (USART,UART availability and x,y values depending on device). - * @param __IT__ specifies the UART interrupt source to check. - * This parameter can be one of the following values: - * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) - * @arg UART_IT_LBD: LIN Break detection interrupt - * @arg UART_IT_TXE: Transmit Data Register empty interrupt - * @arg UART_IT_TC: Transmission complete interrupt - * @arg UART_IT_RXNE: Receive Data register not empty interrupt - * @arg UART_IT_IDLE: Idle line detection interrupt - * @arg UART_IT_ERR: Error interrupt - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ - (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) - -/** @brief Enable CTS flow control - * @note This macro allows to enable CTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * The Handle Instance can be any USARTx (supporting the HW Flow control feature). - * It is used to select the USART peripheral (USART availability and x value depending on device). - * @retval None - */ -#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ - do{ \ - ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ - (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ - } while(0U) - -/** @brief Disable CTS flow control - * @note This macro allows to disable CTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * The Handle Instance can be any USARTx (supporting the HW Flow control feature). - * It is used to select the USART peripheral (USART availability and x value depending on device). - * @retval None - */ -#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ - do{ \ - ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ - (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ - } while(0U) - -/** @brief Enable RTS flow control - * This macro allows to enable RTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * The Handle Instance can be any USARTx (supporting the HW Flow control feature). - * It is used to select the USART peripheral (USART availability and x value depending on device). - * @retval None - */ -#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ - do{ \ - ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ - (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ - } while(0U) - -/** @brief Disable RTS flow control - * This macro allows to disable RTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * The Handle Instance can be any USARTx (supporting the HW Flow control feature). - * It is used to select the USART peripheral (USART availability and x value depending on device). - * @retval None - */ -#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ - do{ \ - ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ - (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ - } while(0U) - -/** @brief Macro to enable the UART's one bit sample method - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) - -/** @brief Macro to disable the UART's one bit sample method - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\ - &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) - -/** @brief Enable UART - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) - -/** @brief Disable UART - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup UART_Exported_Functions - * @{ - */ - -/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization/de-initialization functions **********************************/ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); -HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); -HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); -void HAL_UART_MspInit(UART_HandleTypeDef *huart); -void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); - -/* Callbacks Register/UnRegister functions ***********************************/ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) -HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, - pUART_CallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); - -HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group2 IO operation functions - * @{ - */ - -/* IO operation functions *******************************************************/ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); - -HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, - uint32_t Timeout); -HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); - -/* Transfer Abort functions */ -HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); - -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); -void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); - -void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); - -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group3 - * @{ - */ -/* Peripheral Control functions ************************************************/ -HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group4 - * @{ - */ -/* Peripheral State functions **************************************************/ -HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); -uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); -/** - * @} - */ - -/** - * @} - */ -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @defgroup UART_Private_Constants UART Private Constants - * @{ - */ -/** @brief UART interruptions flag mask - * - */ -#define UART_IT_MASK 0x0000FFFFU - -#define UART_CR1_REG_INDEX 1U -#define UART_CR2_REG_INDEX 2U -#define UART_CR3_REG_INDEX 3U -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup UART_Private_Macros UART Private Macros - * @{ - */ -#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ - ((LENGTH) == UART_WORDLENGTH_9B)) -#define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) -#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ - ((STOPBITS) == UART_STOPBITS_2)) -#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ - ((PARITY) == UART_PARITY_EVEN) || \ - ((PARITY) == UART_PARITY_ODD)) -#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ - (((CONTROL) == UART_HWCONTROL_NONE) || \ - ((CONTROL) == UART_HWCONTROL_RTS) || \ - ((CONTROL) == UART_HWCONTROL_CTS) || \ - ((CONTROL) == UART_HWCONTROL_RTS_CTS)) -#define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) -#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ - ((STATE) == UART_STATE_ENABLE)) -#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ - ((SAMPLING) == UART_OVERSAMPLING_8)) -#define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) -#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ - ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) -#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ - ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) -#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 10500000U) -#define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) - -#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(4U*((uint64_t)(_BAUD_))))) -#define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) -#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\ - + 50U) / 100U) -/* UART BRR = mantissa + overflow + fraction - = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ -#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ - (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U) + \ - (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) - -#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(2U*((uint64_t)(_BAUD_))))) -#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) -#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\ - + 50U) / 100U) -/* UART BRR = mantissa + overflow + fraction - = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ -#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ - ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U) + \ - (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @defgroup UART_Private_Functions UART Private Functions - * @{ - */ - -HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_UART_H */ - diff --git a/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h b/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h deleted file mode 100644 index e07c232..0000000 --- a/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h +++ /dev/null @@ -1,2521 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_ll_usart.h - * @author MCD Application Team - * @brief Header file of USART LL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_LL_USART_H -#define __STM32F4xx_LL_USART_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f4xx.h" - -/** @addtogroup STM32F4xx_LL_Driver - * @{ - */ - -#if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (UART10) - -/** @defgroup USART_LL USART - * @{ - */ - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup USART_LL_Private_Constants USART Private Constants - * @{ - */ - -/* Defines used for the bit position in the register and perform offsets*/ -#define USART_POSITION_GTPR_GT USART_GTPR_GT_Pos -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -#if defined(USE_FULL_LL_DRIVER) -/** @defgroup USART_LL_Private_Macros USART Private Macros - * @{ - */ -/** - * @} - */ -#endif /*USE_FULL_LL_DRIVER*/ - -/* Exported types ------------------------------------------------------------*/ -#if defined(USE_FULL_LL_DRIVER) -/** @defgroup USART_LL_ES_INIT USART Exported Init structures - * @{ - */ - -/** - * @brief LL USART Init Structure definition - */ -typedef struct -{ - uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate. - - This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/ - - uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter can be a value of @ref USART_LL_EC_DATAWIDTH. - - This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/ - - uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. - This parameter can be a value of @ref USART_LL_EC_STOPBITS. - - This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/ - - uint32_t Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref USART_LL_EC_PARITY. - - This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/ - - uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled. - This parameter can be a value of @ref USART_LL_EC_DIRECTION. - - This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/ - - uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. - This parameter can be a value of @ref USART_LL_EC_HWCONTROL. - - This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/ - - uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8. - This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING. - - This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/ - -} LL_USART_InitTypeDef; - -/** - * @brief LL USART Clock Init Structure definition - */ -typedef struct -{ - uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled. - This parameter can be a value of @ref USART_LL_EC_CLOCK. - - USART HW configuration can be modified afterwards using unitary functions - @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput(). - For more details, refer to description of this function. */ - - uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. - This parameter can be a value of @ref USART_LL_EC_POLARITY. - - USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity(). - For more details, refer to description of this function. */ - - uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made. - This parameter can be a value of @ref USART_LL_EC_PHASE. - - USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase(). - For more details, refer to description of this function. */ - - uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted - data bit (MSB) has to be output on the SCLK pin in synchronous mode. - This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE. - - USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput(). - For more details, refer to description of this function. */ - -} LL_USART_ClockInitTypeDef; - -/** - * @} - */ -#endif /* USE_FULL_LL_DRIVER */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup USART_LL_Exported_Constants USART Exported Constants - * @{ - */ - -/** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines - * @brief Flags defines which can be used with LL_USART_ReadReg function - * @{ - */ -#define LL_USART_SR_PE USART_SR_PE /*!< Parity error flag */ -#define LL_USART_SR_FE USART_SR_FE /*!< Framing error flag */ -#define LL_USART_SR_NE USART_SR_NE /*!< Noise detected flag */ -#define LL_USART_SR_ORE USART_SR_ORE /*!< Overrun error flag */ -#define LL_USART_SR_IDLE USART_SR_IDLE /*!< Idle line detected flag */ -#define LL_USART_SR_RXNE USART_SR_RXNE /*!< Read data register not empty flag */ -#define LL_USART_SR_TC USART_SR_TC /*!< Transmission complete flag */ -#define LL_USART_SR_TXE USART_SR_TXE /*!< Transmit data register empty flag */ -#define LL_USART_SR_LBD USART_SR_LBD /*!< LIN break detection flag */ -#define LL_USART_SR_CTS USART_SR_CTS /*!< CTS flag */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_IT IT Defines - * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions - * @{ - */ -#define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */ -#define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */ -#define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */ -#define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */ -#define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */ -#define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */ -#define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */ -#define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_DIRECTION Communication Direction - * @{ - */ -#define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */ -#define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */ -#define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */ -#define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_PARITY Parity Control - * @{ - */ -#define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */ -#define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */ -#define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_WAKEUP Wakeup - * @{ - */ -#define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */ -#define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_DATAWIDTH Datawidth - * @{ - */ -#define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */ -#define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling - * @{ - */ -#define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ -#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ -/** - * @} - */ - -#if defined(USE_FULL_LL_DRIVER) -/** @defgroup USART_LL_EC_CLOCK Clock Signal - * @{ - */ - -#define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */ -#define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */ -/** - * @} - */ -#endif /*USE_FULL_LL_DRIVER*/ - -/** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse - * @{ - */ -#define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */ -#define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_PHASE Clock Phase - * @{ - */ -#define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */ -#define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_POLARITY Clock Polarity - * @{ - */ -#define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/ -#define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_STOPBITS Stop Bits - * @{ - */ -#define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */ -#define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */ -#define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */ -#define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_HWCONTROL Hardware Control - * @{ - */ -#define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */ -#define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */ -#define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */ -#define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_IRDA_POWER IrDA Power - * @{ - */ -#define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */ -#define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */ -/** - * @} - */ - -/** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length - * @{ - */ -#define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */ -#define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup USART_LL_Exported_Macros USART Exported Macros - * @{ - */ - -/** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros - * @{ - */ - -/** - * @brief Write a value in USART register - * @param __INSTANCE__ USART Instance - * @param __REG__ Register to be written - * @param __VALUE__ Value to be written in the register - * @retval None - */ -#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) - -/** - * @brief Read a value in USART register - * @param __INSTANCE__ USART Instance - * @param __REG__ Register to be read - * @retval Register value - */ -#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) -/** - * @} - */ - -/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper - * @{ - */ - -/** - * @brief Compute USARTDIV value according to Peripheral Clock and - * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned) - * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance - * @param __BAUDRATE__ Baud rate value to achieve - * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case - */ -#define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) ((uint32_t)((((uint64_t)(__PERIPHCLK__))*25)/(2*((uint64_t)(__BAUDRATE__))))) -#define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100) -#define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8)\ - + 50) / 100) -/* UART BRR = mantissa + overflow + fraction - = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */ -#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \ - ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \ - (__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07)) - -/** - * @brief Compute USARTDIV value according to Peripheral Clock and - * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned) - * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance - * @param __BAUDRATE__ Baud rate value to achieve - * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case - */ -#define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) ((uint32_t)((((uint64_t)(__PERIPHCLK__))*25)/(4*((uint64_t)(__BAUDRATE__))))) -#define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100) -#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16)\ - + 50) / 100) -/* USART BRR = mantissa + overflow + fraction - = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */ -#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \ - (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \ - (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F)) - -/** - * @} - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup USART_LL_Exported_Functions USART Exported Functions - * @{ - */ - -/** @defgroup USART_LL_EF_Configuration Configuration functions - * @{ - */ - -/** - * @brief USART Enable - * @rmtoll CR1 UE LL_USART_Enable - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR1, USART_CR1_UE); -} - -/** - * @brief USART Disable (all USART prescalers and outputs are disabled) - * @note When USART is disabled, USART prescalers and outputs are stopped immediately, - * and current operations are discarded. The configuration of the USART is kept, but all the status - * flags, in the USARTx_SR are set to their default values. - * @rmtoll CR1 UE LL_USART_Disable - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR1, USART_CR1_UE); -} - -/** - * @brief Indicate if USART is enabled - * @rmtoll CR1 UE LL_USART_IsEnabled - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)); -} - -/** - * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit) - * @rmtoll CR1 RE LL_USART_EnableDirectionRx - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE); -} - -/** - * @brief Receiver Disable - * @rmtoll CR1 RE LL_USART_DisableDirectionRx - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE); -} - -/** - * @brief Transmitter Enable - * @rmtoll CR1 TE LL_USART_EnableDirectionTx - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE); -} - -/** - * @brief Transmitter Disable - * @rmtoll CR1 TE LL_USART_DisableDirectionTx - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE); -} - -/** - * @brief Configure simultaneously enabled/disabled states - * of Transmitter and Receiver - * @rmtoll CR1 RE LL_USART_SetTransferDirection\n - * CR1 TE LL_USART_SetTransferDirection - * @param USARTx USART Instance - * @param TransferDirection This parameter can be one of the following values: - * @arg @ref LL_USART_DIRECTION_NONE - * @arg @ref LL_USART_DIRECTION_RX - * @arg @ref LL_USART_DIRECTION_TX - * @arg @ref LL_USART_DIRECTION_TX_RX - * @retval None - */ -__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection) -{ - ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); -} - -/** - * @brief Return enabled/disabled states of Transmitter and Receiver - * @rmtoll CR1 RE LL_USART_GetTransferDirection\n - * CR1 TE LL_USART_GetTransferDirection - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_DIRECTION_NONE - * @arg @ref LL_USART_DIRECTION_RX - * @arg @ref LL_USART_DIRECTION_TX - * @arg @ref LL_USART_DIRECTION_TX_RX - */ -__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE)); -} - -/** - * @brief Configure Parity (enabled/disabled and parity mode if enabled). - * @note This function selects if hardware parity control (generation and detection) is enabled or disabled. - * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position - * (9th or 8th bit depending on data width) and parity is checked on the received data. - * @rmtoll CR1 PS LL_USART_SetParity\n - * CR1 PCE LL_USART_SetParity - * @param USARTx USART Instance - * @param Parity This parameter can be one of the following values: - * @arg @ref LL_USART_PARITY_NONE - * @arg @ref LL_USART_PARITY_EVEN - * @arg @ref LL_USART_PARITY_ODD - * @retval None - */ -__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity) -{ - MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity); -} - -/** - * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) - * @rmtoll CR1 PS LL_USART_GetParity\n - * CR1 PCE LL_USART_GetParity - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_PARITY_NONE - * @arg @ref LL_USART_PARITY_EVEN - * @arg @ref LL_USART_PARITY_ODD - */ -__STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE)); -} - -/** - * @brief Set Receiver Wake Up method from Mute mode. - * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod - * @param USARTx USART Instance - * @param Method This parameter can be one of the following values: - * @arg @ref LL_USART_WAKEUP_IDLELINE - * @arg @ref LL_USART_WAKEUP_ADDRESSMARK - * @retval None - */ -__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method) -{ - MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method); -} - -/** - * @brief Return Receiver Wake Up method from Mute mode - * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_WAKEUP_IDLELINE - * @arg @ref LL_USART_WAKEUP_ADDRESSMARK - */ -__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE)); -} - -/** - * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits) - * @rmtoll CR1 M LL_USART_SetDataWidth - * @param USARTx USART Instance - * @param DataWidth This parameter can be one of the following values: - * @arg @ref LL_USART_DATAWIDTH_8B - * @arg @ref LL_USART_DATAWIDTH_9B - * @retval None - */ -__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth) -{ - MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth); -} - -/** - * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) - * @rmtoll CR1 M LL_USART_GetDataWidth - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_DATAWIDTH_8B - * @arg @ref LL_USART_DATAWIDTH_9B - */ -__STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M)); -} - -/** - * @brief Set Oversampling to 8-bit or 16-bit mode - * @rmtoll CR1 OVER8 LL_USART_SetOverSampling - * @param USARTx USART Instance - * @param OverSampling This parameter can be one of the following values: - * @arg @ref LL_USART_OVERSAMPLING_16 - * @arg @ref LL_USART_OVERSAMPLING_8 - * @retval None - */ -__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling) -{ - MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling); -} - -/** - * @brief Return Oversampling mode - * @rmtoll CR1 OVER8 LL_USART_GetOverSampling - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_OVERSAMPLING_16 - * @arg @ref LL_USART_OVERSAMPLING_8 - */ -__STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8)); -} - -/** - * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput - * @param USARTx USART Instance - * @param LastBitClockPulse This parameter can be one of the following values: - * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT - * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT - * @retval None - */ -__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse) -{ - MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse); -} - -/** - * @brief Retrieve Clock pulse of the last data bit output configuration - * (Last bit Clock pulse output to the SCLK pin or not) - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT - * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT - */ -__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); -} - -/** - * @brief Select the phase of the clock output on the SCLK pin in synchronous mode - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 CPHA LL_USART_SetClockPhase - * @param USARTx USART Instance - * @param ClockPhase This parameter can be one of the following values: - * @arg @ref LL_USART_PHASE_1EDGE - * @arg @ref LL_USART_PHASE_2EDGE - * @retval None - */ -__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase) -{ - MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase); -} - -/** - * @brief Return phase of the clock output on the SCLK pin in synchronous mode - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 CPHA LL_USART_GetClockPhase - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_PHASE_1EDGE - * @arg @ref LL_USART_PHASE_2EDGE - */ -__STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA)); -} - -/** - * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 CPOL LL_USART_SetClockPolarity - * @param USARTx USART Instance - * @param ClockPolarity This parameter can be one of the following values: - * @arg @ref LL_USART_POLARITY_LOW - * @arg @ref LL_USART_POLARITY_HIGH - * @retval None - */ -__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) -{ - MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); -} - -/** - * @brief Return polarity of the clock output on the SCLK pin in synchronous mode - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 CPOL LL_USART_GetClockPolarity - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_POLARITY_LOW - * @arg @ref LL_USART_POLARITY_HIGH - */ -__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL)); -} - -/** - * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse) - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @note Call of this function is equivalent to following function call sequence : - * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function - * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function - * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function - * @rmtoll CR2 CPHA LL_USART_ConfigClock\n - * CR2 CPOL LL_USART_ConfigClock\n - * CR2 LBCL LL_USART_ConfigClock - * @param USARTx USART Instance - * @param Phase This parameter can be one of the following values: - * @arg @ref LL_USART_PHASE_1EDGE - * @arg @ref LL_USART_PHASE_2EDGE - * @param Polarity This parameter can be one of the following values: - * @arg @ref LL_USART_POLARITY_LOW - * @arg @ref LL_USART_POLARITY_HIGH - * @param LBCPOutput This parameter can be one of the following values: - * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT - * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput) -{ - MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput); -} - -/** - * @brief Enable Clock output on SCLK pin - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR2, USART_CR2_CLKEN); -} - -/** - * @brief Disable Clock output on SCLK pin - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN); -} - -/** - * @brief Indicate if Clock output on SCLK pin is enabled - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)); -} - -/** - * @brief Set the length of the stop bits - * @rmtoll CR2 STOP LL_USART_SetStopBitsLength - * @param USARTx USART Instance - * @param StopBits This parameter can be one of the following values: - * @arg @ref LL_USART_STOPBITS_0_5 - * @arg @ref LL_USART_STOPBITS_1 - * @arg @ref LL_USART_STOPBITS_1_5 - * @arg @ref LL_USART_STOPBITS_2 - * @retval None - */ -__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits) -{ - MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); -} - -/** - * @brief Retrieve the length of the stop bits - * @rmtoll CR2 STOP LL_USART_GetStopBitsLength - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_STOPBITS_0_5 - * @arg @ref LL_USART_STOPBITS_1 - * @arg @ref LL_USART_STOPBITS_1_5 - * @arg @ref LL_USART_STOPBITS_2 - */ -__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP)); -} - -/** - * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits) - * @note Call of this function is equivalent to following function call sequence : - * - Data Width configuration using @ref LL_USART_SetDataWidth() function - * - Parity Control and mode configuration using @ref LL_USART_SetParity() function - * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function - * @rmtoll CR1 PS LL_USART_ConfigCharacter\n - * CR1 PCE LL_USART_ConfigCharacter\n - * CR1 M LL_USART_ConfigCharacter\n - * CR2 STOP LL_USART_ConfigCharacter - * @param USARTx USART Instance - * @param DataWidth This parameter can be one of the following values: - * @arg @ref LL_USART_DATAWIDTH_8B - * @arg @ref LL_USART_DATAWIDTH_9B - * @param Parity This parameter can be one of the following values: - * @arg @ref LL_USART_PARITY_NONE - * @arg @ref LL_USART_PARITY_EVEN - * @arg @ref LL_USART_PARITY_ODD - * @param StopBits This parameter can be one of the following values: - * @arg @ref LL_USART_STOPBITS_0_5 - * @arg @ref LL_USART_STOPBITS_1 - * @arg @ref LL_USART_STOPBITS_1_5 - * @arg @ref LL_USART_STOPBITS_2 - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity, - uint32_t StopBits) -{ - MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth); - MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); -} - -/** - * @brief Set Address of the USART node. - * @note This is used in multiprocessor communication during Mute mode or Stop mode, - * for wake up with address mark detection. - * @rmtoll CR2 ADD LL_USART_SetNodeAddress - * @param USARTx USART Instance - * @param NodeAddress 4 bit Address of the USART node. - * @retval None - */ -__STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress) -{ - MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD)); -} - -/** - * @brief Return 4 bit Address of the USART node as set in ADD field of CR2. - * @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant) - * @rmtoll CR2 ADD LL_USART_GetNodeAddress - * @param USARTx USART Instance - * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255) - */ -__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD)); -} - -/** - * @brief Enable RTS HW Flow Control - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR3, USART_CR3_RTSE); -} - -/** - * @brief Disable RTS HW Flow Control - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); -} - -/** - * @brief Enable CTS HW Flow Control - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR3, USART_CR3_CTSE); -} - -/** - * @brief Disable CTS HW Flow Control - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); -} - -/** - * @brief Configure HW Flow Control mode (both CTS and RTS) - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n - * CR3 CTSE LL_USART_SetHWFlowCtrl - * @param USARTx USART Instance - * @param HardwareFlowControl This parameter can be one of the following values: - * @arg @ref LL_USART_HWCONTROL_NONE - * @arg @ref LL_USART_HWCONTROL_RTS - * @arg @ref LL_USART_HWCONTROL_CTS - * @arg @ref LL_USART_HWCONTROL_RTS_CTS - * @retval None - */ -__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl) -{ - MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); -} - -/** - * @brief Return HW Flow Control configuration (both CTS and RTS) - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n - * CR3 CTSE LL_USART_GetHWFlowCtrl - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_HWCONTROL_NONE - * @arg @ref LL_USART_HWCONTROL_RTS - * @arg @ref LL_USART_HWCONTROL_CTS - * @arg @ref LL_USART_HWCONTROL_RTS_CTS - */ -__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); -} - -/** - * @brief Enable One bit sampling method - * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); -} - -/** - * @brief Disable One bit sampling method - * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); -} - -/** - * @brief Indicate if One bit sampling method is enabled - * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)); -} - -/** - * @brief Configure USART BRR register for achieving expected Baud Rate value. - * @note Compute and set USARTDIV value in BRR Register (full BRR content) - * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values - * @note Peripheral clock and Baud rate values provided as function parameters should be valid - * (Baud rate value != 0) - * @rmtoll BRR BRR LL_USART_SetBaudRate - * @param USARTx USART Instance - * @param PeriphClk Peripheral Clock - * @param OverSampling This parameter can be one of the following values: - * @arg @ref LL_USART_OVERSAMPLING_16 - * @arg @ref LL_USART_OVERSAMPLING_8 - * @param BaudRate Baud Rate - * @retval None - */ -__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling, - uint32_t BaudRate) -{ - if (OverSampling == LL_USART_OVERSAMPLING_8) - { - USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate)); - } - else - { - USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate)); - } -} - -/** - * @brief Return current Baud Rate value, according to USARTDIV present in BRR register - * (full BRR content), and to used Peripheral Clock and Oversampling mode values - * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned. - * @rmtoll BRR BRR LL_USART_GetBaudRate - * @param USARTx USART Instance - * @param PeriphClk Peripheral Clock - * @param OverSampling This parameter can be one of the following values: - * @arg @ref LL_USART_OVERSAMPLING_16 - * @arg @ref LL_USART_OVERSAMPLING_8 - * @retval Baud Rate - */ -__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling) -{ - uint32_t usartdiv = 0x0U; - uint32_t brrresult = 0x0U; - - usartdiv = USARTx->BRR; - - if (OverSampling == LL_USART_OVERSAMPLING_8) - { - if ((usartdiv & 0xFFF7U) != 0U) - { - usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ; - brrresult = (PeriphClk * 2U) / usartdiv; - } - } - else - { - if ((usartdiv & 0xFFFFU) != 0U) - { - brrresult = PeriphClk / usartdiv; - } - } - return (brrresult); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature - * @{ - */ - -/** - * @brief Enable IrDA mode - * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - * IrDA feature is supported by the USARTx instance. - * @rmtoll CR3 IREN LL_USART_EnableIrda - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR3, USART_CR3_IREN); -} - -/** - * @brief Disable IrDA mode - * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - * IrDA feature is supported by the USARTx instance. - * @rmtoll CR3 IREN LL_USART_DisableIrda - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); -} - -/** - * @brief Indicate if IrDA mode is enabled - * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - * IrDA feature is supported by the USARTx instance. - * @rmtoll CR3 IREN LL_USART_IsEnabledIrda - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)); -} - -/** - * @brief Configure IrDA Power Mode (Normal or Low Power) - * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - * IrDA feature is supported by the USARTx instance. - * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode - * @param USARTx USART Instance - * @param PowerMode This parameter can be one of the following values: - * @arg @ref LL_USART_IRDA_POWER_NORMAL - * @arg @ref LL_USART_IRDA_POWER_LOW - * @retval None - */ -__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode) -{ - MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); -} - -/** - * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power) - * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - * IrDA feature is supported by the USARTx instance. - * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_IRDA_POWER_NORMAL - * @arg @ref LL_USART_PHASE_2EDGE - */ -__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP)); -} - -/** - * @brief Set Irda prescaler value, used for dividing the USART clock source - * to achieve the Irda Low Power frequency (8 bits value) - * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - * IrDA feature is supported by the USARTx instance. - * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler - * @param USARTx USART Instance - * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF - * @retval None - */ -__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) -{ - MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue); -} - -/** - * @brief Return Irda prescaler value, used for dividing the USART clock source - * to achieve the Irda Low Power frequency (8 bits value) - * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - * IrDA feature is supported by the USARTx instance. - * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler - * @param USARTx USART Instance - * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF) - */ -__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC)); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature - * @{ - */ - -/** - * @brief Enable Smartcard NACK transmission - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR3, USART_CR3_NACK); -} - -/** - * @brief Disable Smartcard NACK transmission - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR3, USART_CR3_NACK); -} - -/** - * @brief Indicate if Smartcard NACK transmission is enabled - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)); -} - -/** - * @brief Enable Smartcard mode - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll CR3 SCEN LL_USART_EnableSmartcard - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR3, USART_CR3_SCEN); -} - -/** - * @brief Disable Smartcard mode - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll CR3 SCEN LL_USART_DisableSmartcard - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN); -} - -/** - * @brief Indicate if Smartcard mode is enabled - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)); -} - -/** - * @brief Set Smartcard prescaler value, used for dividing the USART clock - * source to provide the SMARTCARD Clock (5 bits value) - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler - * @param USARTx USART Instance - * @param PrescalerValue Value between Min_Data=0 and Max_Data=31 - * @retval None - */ -__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) -{ - MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue); -} - -/** - * @brief Return Smartcard prescaler value, used for dividing the USART clock - * source to provide the SMARTCARD Clock (5 bits value) - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler - * @param USARTx USART Instance - * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31) - */ -__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC)); -} - -/** - * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods - * (GT[7:0] bits : Guard time value) - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime - * @param USARTx USART Instance - * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF - * @retval None - */ -__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime) -{ - MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_POSITION_GTPR_GT); -} - -/** - * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods - * (GT[7:0] bits : Guard time value) - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime - * @param USARTx USART Instance - * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF) - */ -__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_POSITION_GTPR_GT); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature - * @{ - */ - -/** - * @brief Enable Single Wire Half-Duplex mode - * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not - * Half-Duplex mode is supported by the USARTx instance. - * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR3, USART_CR3_HDSEL); -} - -/** - * @brief Disable Single Wire Half-Duplex mode - * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not - * Half-Duplex mode is supported by the USARTx instance. - * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL); -} - -/** - * @brief Indicate if Single Wire Half-Duplex mode is enabled - * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not - * Half-Duplex mode is supported by the USARTx instance. - * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature - * @{ - */ - -/** - * @brief Set LIN Break Detection Length - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen - * @param USARTx USART Instance - * @param LINBDLength This parameter can be one of the following values: - * @arg @ref LL_USART_LINBREAK_DETECT_10B - * @arg @ref LL_USART_LINBREAK_DETECT_11B - * @retval None - */ -__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength) -{ - MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength); -} - -/** - * @brief Return LIN Break Detection Length - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen - * @param USARTx USART Instance - * @retval Returned value can be one of the following values: - * @arg @ref LL_USART_LINBREAK_DETECT_10B - * @arg @ref LL_USART_LINBREAK_DETECT_11B - */ -__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx) -{ - return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL)); -} - -/** - * @brief Enable LIN mode - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll CR2 LINEN LL_USART_EnableLIN - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR2, USART_CR2_LINEN); -} - -/** - * @brief Disable LIN mode - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll CR2 LINEN LL_USART_DisableLIN - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN); -} - -/** - * @brief Indicate if LIN mode is enabled - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services - * @{ - */ - -/** - * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART) - * @note In UART mode, the following bits must be kept cleared: - * - LINEN bit in the USART_CR2 register, - * - CLKEN bit in the USART_CR2 register, - * - SCEN bit in the USART_CR3 register, - * - IREN bit in the USART_CR3 register, - * - HDSEL bit in the USART_CR3 register. - * @note Call of this function is equivalent to following function call sequence : - * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function - * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function - * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function - * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function - * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function - * @note Other remaining configurations items related to Asynchronous Mode - * (as Baud Rate, Word length, Parity, ...) should be set using - * dedicated functions - * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n - * CR2 CLKEN LL_USART_ConfigAsyncMode\n - * CR3 SCEN LL_USART_ConfigAsyncMode\n - * CR3 IREN LL_USART_ConfigAsyncMode\n - * CR3 HDSEL LL_USART_ConfigAsyncMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx) -{ - /* In Asynchronous mode, the following bits must be kept cleared: - - LINEN, CLKEN bits in the USART_CR2 register, - - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/ - CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); -} - -/** - * @brief Perform basic configuration of USART for enabling use in Synchronous Mode - * @note In Synchronous mode, the following bits must be kept cleared: - * - LINEN bit in the USART_CR2 register, - * - SCEN bit in the USART_CR3 register, - * - IREN bit in the USART_CR3 register, - * - HDSEL bit in the USART_CR3 register. - * This function also sets the USART in Synchronous mode. - * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not - * Synchronous mode is supported by the USARTx instance. - * @note Call of this function is equivalent to following function call sequence : - * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function - * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function - * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function - * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function - * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function - * @note Other remaining configurations items related to Synchronous Mode - * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using - * dedicated functions - * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n - * CR2 CLKEN LL_USART_ConfigSyncMode\n - * CR3 SCEN LL_USART_ConfigSyncMode\n - * CR3 IREN LL_USART_ConfigSyncMode\n - * CR3 HDSEL LL_USART_ConfigSyncMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx) -{ - /* In Synchronous mode, the following bits must be kept cleared: - - LINEN bit in the USART_CR2 register, - - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/ - CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN)); - CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); - /* set the UART/USART in Synchronous mode */ - SET_BIT(USARTx->CR2, USART_CR2_CLKEN); -} - -/** - * @brief Perform basic configuration of USART for enabling use in LIN Mode - * @note In LIN mode, the following bits must be kept cleared: - * - STOP and CLKEN bits in the USART_CR2 register, - * - SCEN bit in the USART_CR3 register, - * - IREN bit in the USART_CR3 register, - * - HDSEL bit in the USART_CR3 register. - * This function also set the UART/USART in LIN mode. - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @note Call of this function is equivalent to following function call sequence : - * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function - * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function - * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function - * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function - * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function - * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function - * @note Other remaining configurations items related to LIN Mode - * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using - * dedicated functions - * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n - * CR2 STOP LL_USART_ConfigLINMode\n - * CR2 LINEN LL_USART_ConfigLINMode\n - * CR3 IREN LL_USART_ConfigLINMode\n - * CR3 SCEN LL_USART_ConfigLINMode\n - * CR3 HDSEL LL_USART_ConfigLINMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx) -{ - /* In LIN mode, the following bits must be kept cleared: - - STOP and CLKEN bits in the USART_CR2 register, - - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/ - CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP)); - CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); - /* Set the UART/USART in LIN mode */ - SET_BIT(USARTx->CR2, USART_CR2_LINEN); -} - -/** - * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode - * @note In Half Duplex mode, the following bits must be kept cleared: - * - LINEN bit in the USART_CR2 register, - * - CLKEN bit in the USART_CR2 register, - * - SCEN bit in the USART_CR3 register, - * - IREN bit in the USART_CR3 register, - * This function also sets the UART/USART in Half Duplex mode. - * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not - * Half-Duplex mode is supported by the USARTx instance. - * @note Call of this function is equivalent to following function call sequence : - * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function - * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function - * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function - * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function - * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function - * @note Other remaining configurations items related to Half Duplex Mode - * (as Baud Rate, Word length, Parity, ...) should be set using - * dedicated functions - * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n - * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n - * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n - * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n - * CR3 IREN LL_USART_ConfigHalfDuplexMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx) -{ - /* In Half Duplex mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); - /* set the UART/USART in Half Duplex mode */ - SET_BIT(USARTx->CR3, USART_CR3_HDSEL); -} - -/** - * @brief Perform basic configuration of USART for enabling use in Smartcard Mode - * @note In Smartcard mode, the following bits must be kept cleared: - * - LINEN bit in the USART_CR2 register, - * - IREN bit in the USART_CR3 register, - * - HDSEL bit in the USART_CR3 register. - * This function also configures Stop bits to 1.5 bits and - * sets the USART in Smartcard mode (SCEN bit). - * Clock Output is also enabled (CLKEN). - * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - * Smartcard feature is supported by the USARTx instance. - * @note Call of this function is equivalent to following function call sequence : - * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function - * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function - * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function - * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function - * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function - * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function - * @note Other remaining configurations items related to Smartcard Mode - * (as Baud Rate, Word length, Parity, ...) should be set using - * dedicated functions - * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n - * CR2 STOP LL_USART_ConfigSmartcardMode\n - * CR2 CLKEN LL_USART_ConfigSmartcardMode\n - * CR3 HDSEL LL_USART_ConfigSmartcardMode\n - * CR3 SCEN LL_USART_ConfigSmartcardMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx) -{ - /* In Smartcard mode, the following bits must be kept cleared: - - LINEN bit in the USART_CR2 register, - - IREN and HDSEL bits in the USART_CR3 register.*/ - CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN)); - CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); - /* Configure Stop bits to 1.5 bits */ - /* Synchronous mode is activated by default */ - SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN)); - /* set the UART/USART in Smartcard mode */ - SET_BIT(USARTx->CR3, USART_CR3_SCEN); -} - -/** - * @brief Perform basic configuration of USART for enabling use in Irda Mode - * @note In IRDA mode, the following bits must be kept cleared: - * - LINEN bit in the USART_CR2 register, - * - STOP and CLKEN bits in the USART_CR2 register, - * - SCEN bit in the USART_CR3 register, - * - HDSEL bit in the USART_CR3 register. - * This function also sets the UART/USART in IRDA mode (IREN bit). - * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - * IrDA feature is supported by the USARTx instance. - * @note Call of this function is equivalent to following function call sequence : - * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function - * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function - * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function - * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function - * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function - * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function - * @note Other remaining configurations items related to Irda Mode - * (as Baud Rate, Word length, Power mode, ...) should be set using - * dedicated functions - * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n - * CR2 CLKEN LL_USART_ConfigIrdaMode\n - * CR2 STOP LL_USART_ConfigIrdaMode\n - * CR3 SCEN LL_USART_ConfigIrdaMode\n - * CR3 HDSEL LL_USART_ConfigIrdaMode\n - * CR3 IREN LL_USART_ConfigIrdaMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx) -{ - /* In IRDA mode, the following bits must be kept cleared: - - LINEN, STOP and CLKEN bits in the USART_CR2 register, - - SCEN and HDSEL bits in the USART_CR3 register.*/ - CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP)); - CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); - /* set the UART/USART in IRDA mode */ - SET_BIT(USARTx->CR3, USART_CR3_IREN); -} - -/** - * @brief Perform basic configuration of USART for enabling use in Multi processor Mode - * (several USARTs connected in a network, one of the USARTs can be the master, - * its TX output connected to the RX inputs of the other slaves USARTs). - * @note In MultiProcessor mode, the following bits must be kept cleared: - * - LINEN bit in the USART_CR2 register, - * - CLKEN bit in the USART_CR2 register, - * - SCEN bit in the USART_CR3 register, - * - IREN bit in the USART_CR3 register, - * - HDSEL bit in the USART_CR3 register. - * @note Call of this function is equivalent to following function call sequence : - * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function - * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function - * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function - * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function - * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function - * @note Other remaining configurations items related to Multi processor Mode - * (as Baud Rate, Wake Up Method, Node address, ...) should be set using - * dedicated functions - * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n - * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n - * CR3 SCEN LL_USART_ConfigMultiProcessMode\n - * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n - * CR3 IREN LL_USART_ConfigMultiProcessMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx) -{ - /* In Multi Processor mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/ - CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_FLAG_Management FLAG_Management - * @{ - */ - -/** - * @brief Check if the USART Parity Error Flag is set or not - * @rmtoll SR PE LL_USART_IsActiveFlag_PE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE)); -} - -/** - * @brief Check if the USART Framing Error Flag is set or not - * @rmtoll SR FE LL_USART_IsActiveFlag_FE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE)); -} - -/** - * @brief Check if the USART Noise error detected Flag is set or not - * @rmtoll SR NF LL_USART_IsActiveFlag_NE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE)); -} - -/** - * @brief Check if the USART OverRun Error Flag is set or not - * @rmtoll SR ORE LL_USART_IsActiveFlag_ORE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE)); -} - -/** - * @brief Check if the USART IDLE line detected Flag is set or not - * @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE)); -} - -/** - * @brief Check if the USART Read Data Register Not Empty Flag is set or not - * @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE)); -} - -/** - * @brief Check if the USART Transmission Complete Flag is set or not - * @rmtoll SR TC LL_USART_IsActiveFlag_TC - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC)); -} - -/** - * @brief Check if the USART Transmit Data Register Empty Flag is set or not - * @rmtoll SR TXE LL_USART_IsActiveFlag_TXE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE)); -} - -/** - * @brief Check if the USART LIN Break Detection Flag is set or not - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll SR LBD LL_USART_IsActiveFlag_LBD - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD)); -} - -/** - * @brief Check if the USART CTS Flag is set or not - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS)); -} - -/** - * @brief Check if the USART Send Break Flag is set or not - * @rmtoll CR1 SBK LL_USART_IsActiveFlag_SBK - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK)); -} - -/** - * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not - * @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU)); -} - -/** - * @brief Clear Parity Error Flag - * @note Clearing this flag is done by a read access to the USARTx_SR - * register followed by a read access to the USARTx_DR register. - * @note Please also consider that when clearing this flag, other flags as - * NE, FE, ORE, IDLE would also be cleared. - * @rmtoll SR PE LL_USART_ClearFlag_PE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx) -{ - __IO uint32_t tmpreg; - tmpreg = USARTx->SR; - (void) tmpreg; - tmpreg = USARTx->DR; - (void) tmpreg; -} - -/** - * @brief Clear Framing Error Flag - * @note Clearing this flag is done by a read access to the USARTx_SR - * register followed by a read access to the USARTx_DR register. - * @note Please also consider that when clearing this flag, other flags as - * PE, NE, ORE, IDLE would also be cleared. - * @rmtoll SR FE LL_USART_ClearFlag_FE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx) -{ - __IO uint32_t tmpreg; - tmpreg = USARTx->SR; - (void) tmpreg; - tmpreg = USARTx->DR; - (void) tmpreg; -} - -/** - * @brief Clear Noise detected Flag - * @note Clearing this flag is done by a read access to the USARTx_SR - * register followed by a read access to the USARTx_DR register. - * @note Please also consider that when clearing this flag, other flags as - * PE, FE, ORE, IDLE would also be cleared. - * @rmtoll SR NF LL_USART_ClearFlag_NE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx) -{ - __IO uint32_t tmpreg; - tmpreg = USARTx->SR; - (void) tmpreg; - tmpreg = USARTx->DR; - (void) tmpreg; -} - -/** - * @brief Clear OverRun Error Flag - * @note Clearing this flag is done by a read access to the USARTx_SR - * register followed by a read access to the USARTx_DR register. - * @note Please also consider that when clearing this flag, other flags as - * PE, NE, FE, IDLE would also be cleared. - * @rmtoll SR ORE LL_USART_ClearFlag_ORE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx) -{ - __IO uint32_t tmpreg; - tmpreg = USARTx->SR; - (void) tmpreg; - tmpreg = USARTx->DR; - (void) tmpreg; -} - -/** - * @brief Clear IDLE line detected Flag - * @note Clearing this flag is done by a read access to the USARTx_SR - * register followed by a read access to the USARTx_DR register. - * @note Please also consider that when clearing this flag, other flags as - * PE, NE, FE, ORE would also be cleared. - * @rmtoll SR IDLE LL_USART_ClearFlag_IDLE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx) -{ - __IO uint32_t tmpreg; - tmpreg = USARTx->SR; - (void) tmpreg; - tmpreg = USARTx->DR; - (void) tmpreg; -} - -/** - * @brief Clear Transmission Complete Flag - * @rmtoll SR TC LL_USART_ClearFlag_TC - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx) -{ - WRITE_REG(USARTx->SR, ~(USART_SR_TC)); -} - -/** - * @brief Clear RX Not Empty Flag - * @rmtoll SR RXNE LL_USART_ClearFlag_RXNE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx) -{ - WRITE_REG(USARTx->SR, ~(USART_SR_RXNE)); -} - -/** - * @brief Clear LIN Break Detection Flag - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll SR LBD LL_USART_ClearFlag_LBD - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx) -{ - WRITE_REG(USARTx->SR, ~(USART_SR_LBD)); -} - -/** - * @brief Clear CTS Interrupt Flag - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll SR CTS LL_USART_ClearFlag_nCTS - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx) -{ - WRITE_REG(USARTx->SR, ~(USART_SR_CTS)); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_IT_Management IT_Management - * @{ - */ - -/** - * @brief Enable IDLE Interrupt - * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE); -} - -/** - * @brief Enable RX Not Empty Interrupt - * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE); -} - -/** - * @brief Enable Transmission Complete Interrupt - * @rmtoll CR1 TCIE LL_USART_EnableIT_TC - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE); -} - -/** - * @brief Enable TX Empty Interrupt - * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE); -} - -/** - * @brief Enable Parity Error Interrupt - * @rmtoll CR1 PEIE LL_USART_EnableIT_PE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE); -} - -/** - * @brief Enable LIN Break Detection Interrupt - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR2, USART_CR2_LBDIE); -} - -/** - * @brief Enable Error Interrupt - * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing - * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register). - * 0: Interrupt is inhibited - * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register. - * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE); -} - -/** - * @brief Enable CTS Interrupt - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); -} - -/** - * @brief Disable IDLE Interrupt - * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE); -} - -/** - * @brief Disable RX Not Empty Interrupt - * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE); -} - -/** - * @brief Disable Transmission Complete Interrupt - * @rmtoll CR1 TCIE LL_USART_DisableIT_TC - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE); -} - -/** - * @brief Disable TX Empty Interrupt - * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE); -} - -/** - * @brief Disable Parity Error Interrupt - * @rmtoll CR1 PEIE LL_USART_DisableIT_PE - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE); -} - -/** - * @brief Disable LIN Break Detection Interrupt - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE); -} - -/** - * @brief Disable Error Interrupt - * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing - * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register). - * 0: Interrupt is inhibited - * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register. - * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); -} - -/** - * @brief Disable CTS Interrupt - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); -} - -/** - * @brief Check if the USART IDLE Interrupt source is enabled or disabled. - * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)); -} - -/** - * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled. - * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)); -} - -/** - * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled. - * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)); -} - -/** - * @brief Check if the USART TX Empty Interrupt is enabled or disabled. - * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)); -} - -/** - * @brief Check if the USART Parity Error Interrupt is enabled or disabled. - * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)); -} - -/** - * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled. - * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not - * LIN feature is supported by the USARTx instance. - * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)); -} - -/** - * @brief Check if the USART Error Interrupt is enabled or disabled. - * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)); -} - -/** - * @brief Check if the USART CTS Interrupt is enabled or disabled. - * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - * Hardware Flow control feature is supported by the USARTx instance. - * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_DMA_Management DMA_Management - * @{ - */ - -/** - * @brief Enable DMA Mode for reception - * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR); -} - -/** - * @brief Disable DMA Mode for reception - * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR); -} - -/** - * @brief Check if DMA Mode is enabled for reception - * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)); -} - -/** - * @brief Enable DMA Mode for transmission - * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) -{ - ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); -} - -/** - * @brief Disable DMA Mode for transmission - * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx) -{ - ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT); -} - -/** - * @brief Check if DMA Mode is enabled for transmission - * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX - * @param USARTx USART Instance - * @retval State of bit (1 or 0). - */ -__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx) -{ - return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)); -} - -/** - * @brief Get the data register address used for DMA transfer - * @rmtoll DR DR LL_USART_DMA_GetRegAddr - * @note Address of Data Register is valid for both Transmit and Receive transfers. - * @param USARTx USART Instance - * @retval Address of data register - */ -__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx) -{ - /* return address of DR register */ - return ((uint32_t) &(USARTx->DR)); -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_Data_Management Data_Management - * @{ - */ - -/** - * @brief Read Receiver Data register (Receive Data value, 8 bits) - * @rmtoll DR DR LL_USART_ReceiveData8 - * @param USARTx USART Instance - * @retval Value between Min_Data=0x00 and Max_Data=0xFF - */ -__STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx) -{ - return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR)); -} - -/** - * @brief Read Receiver Data register (Receive Data value, 9 bits) - * @rmtoll DR DR LL_USART_ReceiveData9 - * @param USARTx USART Instance - * @retval Value between Min_Data=0x00 and Max_Data=0x1FF - */ -__STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx) -{ - return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR)); -} - -/** - * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) - * @rmtoll DR DR LL_USART_TransmitData8 - * @param USARTx USART Instance - * @param Value between Min_Data=0x00 and Max_Data=0xFF - * @retval None - */ -__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value) -{ - USARTx->DR = Value; -} - -/** - * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits) - * @rmtoll DR DR LL_USART_TransmitData9 - * @param USARTx USART Instance - * @param Value between Min_Data=0x00 and Max_Data=0x1FF - * @retval None - */ -__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value) -{ - USARTx->DR = Value & 0x1FFU; -} - -/** - * @} - */ - -/** @defgroup USART_LL_EF_Execution Execution - * @{ - */ - -/** - * @brief Request Break sending - * @rmtoll CR1 SBK LL_USART_RequestBreakSending - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR1, USART_CR1_SBK); -} - -/** - * @brief Put USART in Mute mode - * @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx) -{ - SET_BIT(USARTx->CR1, USART_CR1_RWU); -} - -/** - * @brief Put USART in Active mode - * @rmtoll CR1 RWU LL_USART_RequestExitMuteMode - * @param USARTx USART Instance - * @retval None - */ -__STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx) -{ - CLEAR_BIT(USARTx->CR1, USART_CR1_RWU); -} - -/** - * @} - */ - -#if defined(USE_FULL_LL_DRIVER) -/** @defgroup USART_LL_EF_Init Initialization and de-initialization functions - * @{ - */ -ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx); -ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct); -void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct); -ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct); -void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct); -/** - * @} - */ -#endif /* USE_FULL_LL_DRIVER */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || UART10 */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_LL_USART_H */ - diff --git a/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c b/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c deleted file mode 100644 index 62d5d65..0000000 --- a/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c +++ /dev/null @@ -1,3915 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_spi.c - * @author MCD Application Team - * @brief SPI HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Serial Peripheral Interface (SPI) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The SPI HAL driver can be used as follows: - - (#) Declare a SPI_HandleTypeDef handle structure, for example: - SPI_HandleTypeDef hspi; - - (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API: - (##) Enable the SPIx interface clock - (##) SPI pins configuration - (+++) Enable the clock for the SPI GPIOs - (+++) Configure these SPI pins as alternate function push-pull - (##) NVIC configuration if you need to use interrupt process - (+++) Configure the SPIx interrupt priority - (+++) Enable the NVIC SPI IRQ handle - (##) DMA Configuration if you need to use DMA process - (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Stream/Channel - (+++) Enable the DMAx clock - (+++) Configure the DMA handle parameters - (+++) Configure the DMA Tx or Rx Stream/Channel - (+++) Associate the initialized hdma_tx(or _rx) handle to the hspi DMA Tx or Rx handle - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel - - (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS - management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure. - - (#) Initialize the SPI registers by calling the HAL_SPI_Init() API: - (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) - by calling the customized HAL_SPI_MspInit() API. - [..] - Circular mode restriction: - (#) The DMA circular mode cannot be used when the SPI is configured in these modes: - (##) Master 2Lines RxOnly - (##) Master 1Line Rx - (#) The CRC feature is not managed when the DMA circular mode is enabled - (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs - the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks - [..] - Master Receive mode restriction: - (#) In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=1) or - bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI - does not initiate a new transfer the following procedure has to be respected: - (##) HAL_SPI_DeInit() - (##) HAL_SPI_Init() - [..] - Callback registration: - - (#) The compilation flag USE_HAL_SPI_REGISTER_CALLBACKS when set to 1U - allows the user to configure dynamically the driver callbacks. - Use Functions HAL_SPI_RegisterCallback() to register an interrupt callback. - - Function HAL_SPI_RegisterCallback() allows to register following callbacks: - (++) TxCpltCallback : SPI Tx Completed callback - (++) RxCpltCallback : SPI Rx Completed callback - (++) TxRxCpltCallback : SPI TxRx Completed callback - (++) TxHalfCpltCallback : SPI Tx Half Completed callback - (++) RxHalfCpltCallback : SPI Rx Half Completed callback - (++) TxRxHalfCpltCallback : SPI TxRx Half Completed callback - (++) ErrorCallback : SPI Error callback - (++) AbortCpltCallback : SPI Abort callback - (++) MspInitCallback : SPI Msp Init callback - (++) MspDeInitCallback : SPI Msp DeInit callback - This function takes as parameters the HAL peripheral handle, the Callback ID - and a pointer to the user callback function. - - - (#) Use function HAL_SPI_UnRegisterCallback to reset a callback to the default - weak function. - HAL_SPI_UnRegisterCallback takes as parameters the HAL peripheral handle, - and the Callback ID. - This function allows to reset following callbacks: - (++) TxCpltCallback : SPI Tx Completed callback - (++) RxCpltCallback : SPI Rx Completed callback - (++) TxRxCpltCallback : SPI TxRx Completed callback - (++) TxHalfCpltCallback : SPI Tx Half Completed callback - (++) RxHalfCpltCallback : SPI Rx Half Completed callback - (++) TxRxHalfCpltCallback : SPI TxRx Half Completed callback - (++) ErrorCallback : SPI Error callback - (++) AbortCpltCallback : SPI Abort callback - (++) MspInitCallback : SPI Msp Init callback - (++) MspDeInitCallback : SPI Msp DeInit callback - - [..] - By default, after the HAL_SPI_Init() and when the state is HAL_SPI_STATE_RESET - all callbacks are set to the corresponding weak functions: - examples HAL_SPI_MasterTxCpltCallback(), HAL_SPI_MasterRxCpltCallback(). - Exception done for MspInit and MspDeInit functions that are - reset to the legacy weak functions in the HAL_SPI_Init()/ HAL_SPI_DeInit() only when - these callbacks are null (not registered beforehand). - If MspInit or MspDeInit are not null, the HAL_SPI_Init()/ HAL_SPI_DeInit() - keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. - - [..] - Callbacks can be registered/unregistered in HAL_SPI_STATE_READY state only. - Exception done MspInit/MspDeInit functions that can be registered/unregistered - in HAL_SPI_STATE_READY or HAL_SPI_STATE_RESET state, - thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. - Then, the user first registers the MspInit/MspDeInit user callbacks - using HAL_SPI_RegisterCallback() before calling HAL_SPI_DeInit() - or HAL_SPI_Init() function. - - [..] - When the compilation define USE_HAL_PPP_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registering feature is not available - and weak (surcharged) callbacks are used. - - [..] - Using the HAL it is not possible to reach all supported SPI frequency with the different SPI Modes, - the following table resume the max SPI frequency reached with data size 8bits/16bits, - according to frequency of the APBx Peripheral Clock (fPCLK) used by the SPI instance. - - @endverbatim - - Additional table : - - DataSize = SPI_DATASIZE_8BIT: - +----------------------------------------------------------------------------------------------+ - | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line | - | Process | Transfer mode |---------------------|----------------------|----------------------| - | | | Master | Slave | Master | Slave | Master | Slave | - |==============================================================================================| - | T | Polling | Fpclk/2 | Fpclk/2 | NA | NA | NA | NA | - | X |----------------|----------|----------|-----------|----------|-----------|----------| - | / | Interrupt | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA | - | R |----------------|----------|----------|-----------|----------|-----------|----------| - | X | DMA | Fpclk/2 | Fpclk/2 | NA | NA | NA | NA | - |=========|================|==========|==========|===========|==========|===========|==========| - | | Polling | Fpclk/2 | Fpclk/2 | Fpclk/64 | Fpclk/2 | Fpclk/64 | Fpclk/2 | - | |----------------|----------|----------|-----------|----------|-----------|----------| - | R | Interrupt | Fpclk/8 | Fpclk/8 | Fpclk/64 | Fpclk/2 | Fpclk/64 | Fpclk/2 | - | X |----------------|----------|----------|-----------|----------|-----------|----------| - | | DMA | Fpclk/2 | Fpclk/2 | Fpclk/64 | Fpclk/2 | Fpclk/128 | Fpclk/2 | - |=========|================|==========|==========|===========|==========|===========|==========| - | | Polling | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/2 | Fpclk/64 | - | |----------------|----------|----------|-----------|----------|-----------|----------| - | T | Interrupt | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/2 | Fpclk/64 | - | X |----------------|----------|----------|-----------|----------|-----------|----------| - | | DMA | Fpclk/2 | Fpclk/2 | NA | NA | Fpclk/2 | Fpclk/128| - +----------------------------------------------------------------------------------------------+ - - DataSize = SPI_DATASIZE_16BIT: - +----------------------------------------------------------------------------------------------+ - | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line | - | Process | Transfer mode |---------------------|----------------------|----------------------| - | | | Master | Slave | Master | Slave | Master | Slave | - |==============================================================================================| - | T | Polling | Fpclk/2 | Fpclk/2 | NA | NA | NA | NA | - | X |----------------|----------|----------|-----------|----------|-----------|----------| - | / | Interrupt | Fpclk/4 | Fpclk/4 | NA | NA | NA | NA | - | R |----------------|----------|----------|-----------|----------|-----------|----------| - | X | DMA | Fpclk/2 | Fpclk/2 | NA | NA | NA | NA | - |=========|================|==========|==========|===========|==========|===========|==========| - | | Polling | Fpclk/2 | Fpclk/2 | Fpclk/64 | Fpclk/2 | Fpclk/32 | Fpclk/2 | - | |----------------|----------|----------|-----------|----------|-----------|----------| - | R | Interrupt | Fpclk/4 | Fpclk/4 | Fpclk/64 | Fpclk/2 | Fpclk/64 | Fpclk/2 | - | X |----------------|----------|----------|-----------|----------|-----------|----------| - | | DMA | Fpclk/2 | Fpclk/2 | Fpclk/64 | Fpclk/2 | Fpclk/128 | Fpclk/2 | - |=========|================|==========|==========|===========|==========|===========|==========| - | | Polling | Fpclk/2 | Fpclk/2 | NA | NA | Fpclk/2 | Fpclk/32 | - | |----------------|----------|----------|-----------|----------|-----------|----------| - | T | Interrupt | Fpclk/2 | Fpclk/2 | NA | NA | Fpclk/2 | Fpclk/64 | - | X |----------------|----------|----------|-----------|----------|-----------|----------| - | | DMA | Fpclk/2 | Fpclk/2 | NA | NA | Fpclk/2 | Fpclk/128| - +----------------------------------------------------------------------------------------------+ - @note The max SPI frequency depend on SPI data size (8bits, 16bits), - SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA). - @note - (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA() - (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA() - (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA() - - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f4xx_hal.h" - -/** @addtogroup STM32F4xx_HAL_Driver - * @{ - */ - -/** @defgroup SPI SPI - * @brief SPI HAL module driver - * @{ - */ -#ifdef HAL_SPI_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/** @defgroup SPI_Private_Constants SPI Private Constants - * @{ - */ -#define SPI_DEFAULT_TIMEOUT 100U -#define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 µs */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup SPI_Private_Functions SPI Private Functions - * @{ - */ -static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma); -static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma); -static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma); -static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma); -static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma); -static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma); -static void SPI_DMAError(DMA_HandleTypeDef *hdma); -static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma); -static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma); -static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma); -static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, - uint32_t Timeout, uint32_t Tickstart); -static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi); -static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi); -static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi); -static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi); -static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi); -static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi); -static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi); -static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi); -#if (USE_SPI_CRC != 0U) -static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi); -static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi); -static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi); -static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi); -#endif /* USE_SPI_CRC */ -static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi); -static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi); -static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi); -static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi); -static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi); -static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup SPI_Exported_Functions SPI Exported Functions - * @{ - */ - -/** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This subsection provides a set of functions allowing to initialize and - de-initialize the SPIx peripheral: - - (+) User must implement HAL_SPI_MspInit() function in which he configures - all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). - - (+) Call the function HAL_SPI_Init() to configure the selected device with - the selected configuration: - (++) Mode - (++) Direction - (++) Data Size - (++) Clock Polarity and Phase - (++) NSS Management - (++) BaudRate Prescaler - (++) FirstBit - (++) TIMode - (++) CRC Calculation - (++) CRC Polynomial if CRC enabled - - (+) Call the function HAL_SPI_DeInit() to restore the default configuration - of the selected SPIx peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the SPI according to the specified parameters - * in the SPI_InitTypeDef and initialize the associated handle. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) -{ - /* Check the SPI handle allocation */ - if (hspi == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance)); - assert_param(IS_SPI_MODE(hspi->Init.Mode)); - assert_param(IS_SPI_DIRECTION(hspi->Init.Direction)); - assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); - assert_param(IS_SPI_NSS(hspi->Init.NSS)); - assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); - assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); - assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); - if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) - { - assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); - assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); - - if (hspi->Init.Mode == SPI_MODE_MASTER) - { - assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); - } - else - { - /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ - hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - } - } - else - { - assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); - - /* Force polarity and phase to TI protocaol requirements */ - hspi->Init.CLKPolarity = SPI_POLARITY_LOW; - hspi->Init.CLKPhase = SPI_PHASE_1EDGE; - } -#if (USE_SPI_CRC != 0U) - assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation)); - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); - } -#else - hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; -#endif /* USE_SPI_CRC */ - - if (hspi->State == HAL_SPI_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hspi->Lock = HAL_UNLOCKED; - -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - /* Init the SPI Callback settings */ - hspi->TxCpltCallback = HAL_SPI_TxCpltCallback; /* Legacy weak TxCpltCallback */ - hspi->RxCpltCallback = HAL_SPI_RxCpltCallback; /* Legacy weak RxCpltCallback */ - hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback */ - hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ - hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ - hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback */ - hspi->ErrorCallback = HAL_SPI_ErrorCallback; /* Legacy weak ErrorCallback */ - hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ - - if (hspi->MspInitCallback == NULL) - { - hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit */ - } - - /* Init the low level hardware : GPIO, CLOCK, NVIC... */ - hspi->MspInitCallback(hspi); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC... */ - HAL_SPI_MspInit(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - - hspi->State = HAL_SPI_STATE_BUSY; - - /* Disable the selected SPI peripheral */ - __HAL_SPI_DISABLE(hspi); - - /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ - /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, - Communication speed, First bit and CRC calculation state */ - WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | - (hspi->Init.Direction & (SPI_CR1_RXONLY | SPI_CR1_BIDIMODE)) | - (hspi->Init.DataSize & SPI_CR1_DFF) | - (hspi->Init.CLKPolarity & SPI_CR1_CPOL) | - (hspi->Init.CLKPhase & SPI_CR1_CPHA) | - (hspi->Init.NSS & SPI_CR1_SSM) | - (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | - (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | - (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); - - /* Configure : NSS management, TI Mode */ - WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF))); - -#if (USE_SPI_CRC != 0U) - /*---------------------------- SPIx CRCPOLY Configuration ------------------*/ - /* Configure : CRC Polynomial */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - WRITE_REG(hspi->Instance->CRCPR, (hspi->Init.CRCPolynomial & SPI_CRCPR_CRCPOLY_Msk)); - } -#endif /* USE_SPI_CRC */ - -#if defined(SPI_I2SCFGR_I2SMOD) - /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ - CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); -#endif /* SPI_I2SCFGR_I2SMOD */ - - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->State = HAL_SPI_STATE_READY; - - return HAL_OK; -} - -/** - * @brief De-Initialize the SPI peripheral. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi) -{ - /* Check the SPI handle allocation */ - if (hspi == NULL) - { - return HAL_ERROR; - } - - /* Check SPI Instance parameter */ - assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance)); - - hspi->State = HAL_SPI_STATE_BUSY; - - /* Disable the SPI Peripheral Clock */ - __HAL_SPI_DISABLE(hspi); - -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - if (hspi->MspDeInitCallback == NULL) - { - hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit */ - } - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ - hspi->MspDeInitCallback(hspi); -#else - /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ - HAL_SPI_MspDeInit(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->State = HAL_SPI_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hspi); - - return HAL_OK; -} - -/** - * @brief Initialize the SPI MSP. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_MspInit should be implemented in the user file - */ -} - -/** - * @brief De-Initialize the SPI MSP. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_MspDeInit should be implemented in the user file - */ -} - -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -/** - * @brief Register a User SPI Callback - * To be used instead of the weak predefined callback - * @param hspi Pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for the specified SPI. - * @param CallbackID ID of the callback to be registered - * @param pCallback pointer to the Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, - pSPI_CallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hspi->ErrorCode |= HAL_SPI_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - /* Process locked */ - __HAL_LOCK(hspi); - - if (HAL_SPI_STATE_READY == hspi->State) - { - switch (CallbackID) - { - case HAL_SPI_TX_COMPLETE_CB_ID : - hspi->TxCpltCallback = pCallback; - break; - - case HAL_SPI_RX_COMPLETE_CB_ID : - hspi->RxCpltCallback = pCallback; - break; - - case HAL_SPI_TX_RX_COMPLETE_CB_ID : - hspi->TxRxCpltCallback = pCallback; - break; - - case HAL_SPI_TX_HALF_COMPLETE_CB_ID : - hspi->TxHalfCpltCallback = pCallback; - break; - - case HAL_SPI_RX_HALF_COMPLETE_CB_ID : - hspi->RxHalfCpltCallback = pCallback; - break; - - case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID : - hspi->TxRxHalfCpltCallback = pCallback; - break; - - case HAL_SPI_ERROR_CB_ID : - hspi->ErrorCallback = pCallback; - break; - - case HAL_SPI_ABORT_CB_ID : - hspi->AbortCpltCallback = pCallback; - break; - - case HAL_SPI_MSPINIT_CB_ID : - hspi->MspInitCallback = pCallback; - break; - - case HAL_SPI_MSPDEINIT_CB_ID : - hspi->MspDeInitCallback = pCallback; - break; - - default : - /* Update the error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else if (HAL_SPI_STATE_RESET == hspi->State) - { - switch (CallbackID) - { - case HAL_SPI_MSPINIT_CB_ID : - hspi->MspInitCallback = pCallback; - break; - - case HAL_SPI_MSPDEINIT_CB_ID : - hspi->MspDeInitCallback = pCallback; - break; - - default : - /* Update the error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hspi); - return status; -} - -/** - * @brief Unregister an SPI Callback - * SPI callback is redirected to the weak predefined callback - * @param hspi Pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for the specified SPI. - * @param CallbackID ID of the callback to be unregistered - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hspi); - - if (HAL_SPI_STATE_READY == hspi->State) - { - switch (CallbackID) - { - case HAL_SPI_TX_COMPLETE_CB_ID : - hspi->TxCpltCallback = HAL_SPI_TxCpltCallback; /* Legacy weak TxCpltCallback */ - break; - - case HAL_SPI_RX_COMPLETE_CB_ID : - hspi->RxCpltCallback = HAL_SPI_RxCpltCallback; /* Legacy weak RxCpltCallback */ - break; - - case HAL_SPI_TX_RX_COMPLETE_CB_ID : - hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback */ - break; - - case HAL_SPI_TX_HALF_COMPLETE_CB_ID : - hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ - break; - - case HAL_SPI_RX_HALF_COMPLETE_CB_ID : - hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ - break; - - case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID : - hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback */ - break; - - case HAL_SPI_ERROR_CB_ID : - hspi->ErrorCallback = HAL_SPI_ErrorCallback; /* Legacy weak ErrorCallback */ - break; - - case HAL_SPI_ABORT_CB_ID : - hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ - break; - - case HAL_SPI_MSPINIT_CB_ID : - hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit */ - break; - - case HAL_SPI_MSPDEINIT_CB_ID : - hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit */ - break; - - default : - /* Update the error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else if (HAL_SPI_STATE_RESET == hspi->State) - { - switch (CallbackID) - { - case HAL_SPI_MSPINIT_CB_ID : - hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit */ - break; - - case HAL_SPI_MSPDEINIT_CB_ID : - hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit */ - break; - - default : - /* Update the error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hspi); - return status; -} -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -/** - * @} - */ - -/** @defgroup SPI_Exported_Functions_Group2 IO operation functions - * @brief Data transfers functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the SPI - data transfers. - - [..] The SPI supports master and slave mode : - - (#) There are two modes of transfer: - (++) Blocking mode: The communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (++) No-Blocking mode: The communication is performed using Interrupts - or DMA, These APIs return the HAL status. - The end of the data processing will be indicated through the - dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks - will be executed respectively at the end of the transmit or Receive process - The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected - - (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA) - exist for 1Line (simplex) and 2Lines (full duplex) modes. - -@endverbatim - * @{ - */ - -/** - * @brief Transmit an amount of data in blocking mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart; - HAL_StatusTypeDef errorcode = HAL_OK; - uint16_t initial_TxXferCount; - - /* Check Direction parameter */ - assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - - /* Process Locked */ - __HAL_LOCK(hspi); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - initial_TxXferCount = Size; - - if (hspi->State != HAL_SPI_STATE_READY) - { - errorcode = HAL_BUSY; - goto error; - } - - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - /* Set the transaction information */ - hspi->State = HAL_SPI_STATE_BUSY_TX; - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; - hspi->TxXferSize = Size; - hspi->TxXferCount = Size; - - /*Init field not used in handle to zero */ - hspi->pRxBuffPtr = (uint8_t *)NULL; - hspi->RxXferSize = 0U; - hspi->RxXferCount = 0U; - hspi->TxISR = NULL; - hspi->RxISR = NULL; - - /* Configure communication direction : 1Line */ - if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - { - /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ - __HAL_SPI_DISABLE(hspi); - SPI_1LINE_TX(hspi); - } - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } -#endif /* USE_SPI_CRC */ - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - - /* Transmit data in 16 Bit mode */ - if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) - { - if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint16_t); - hspi->TxXferCount--; - } - /* Transmit data in 16 Bit mode */ - while (hspi->TxXferCount > 0U) - { - /* Wait until TXE flag is set to send data */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) - { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint16_t); - hspi->TxXferCount--; - } - else - { - /* Timeout management */ - if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - { - errorcode = HAL_TIMEOUT; - goto error; - } - } - } - } - /* Transmit data in 8 Bit mode */ - else - { - if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - { - *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint8_t); - hspi->TxXferCount--; - } - while (hspi->TxXferCount > 0U) - { - /* Wait until TXE flag is set to send data */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) - { - *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint8_t); - hspi->TxXferCount--; - } - else - { - /* Timeout management */ - if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - { - errorcode = HAL_TIMEOUT; - goto error; - } - } - } - } -#if (USE_SPI_CRC != 0U) - /* Enable CRC Transmission */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - } -#endif /* USE_SPI_CRC */ - - /* Check the end of the transaction */ - if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) - { - hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - } - - /* Clear overrun flag in 2 Lines communication mode because received is not read */ - if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - { - __HAL_SPI_CLEAR_OVRFLAG(hspi); - } - - if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - { - errorcode = HAL_ERROR; - } - -error: - hspi->State = HAL_SPI_STATE_READY; - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Receive an amount of data in blocking mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be received - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ -#if (USE_SPI_CRC != 0U) - __IO uint32_t tmpreg = 0U; -#endif /* USE_SPI_CRC */ - uint32_t tickstart; - HAL_StatusTypeDef errorcode = HAL_OK; - - if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) - { - hspi->State = HAL_SPI_STATE_BUSY_RX; - /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ - return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); - } - - /* Process Locked */ - __HAL_LOCK(hspi); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (hspi->State != HAL_SPI_STATE_READY) - { - errorcode = HAL_BUSY; - goto error; - } - - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - /* Set the transaction information */ - hspi->State = HAL_SPI_STATE_BUSY_RX; - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pRxBuffPtr = (uint8_t *)pData; - hspi->RxXferSize = Size; - hspi->RxXferCount = Size; - - /*Init field not used in handle to zero */ - hspi->pTxBuffPtr = (uint8_t *)NULL; - hspi->TxXferSize = 0U; - hspi->TxXferCount = 0U; - hspi->RxISR = NULL; - hspi->TxISR = NULL; - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - /* this is done to handle the CRCNEXT before the latest data */ - hspi->RxXferCount--; - } -#endif /* USE_SPI_CRC */ - - /* Configure communication direction: 1Line */ - if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - { - /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ - __HAL_SPI_DISABLE(hspi); - SPI_1LINE_RX(hspi); - } - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - - /* Receive data in 8 Bit mode */ - if (hspi->Init.DataSize == SPI_DATASIZE_8BIT) - { - /* Transfer loop */ - while (hspi->RxXferCount > 0U) - { - /* Check the RXNE flag */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) - { - /* read the received data */ - (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; - hspi->pRxBuffPtr += sizeof(uint8_t); - hspi->RxXferCount--; - } - else - { - /* Timeout management */ - if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - { - errorcode = HAL_TIMEOUT; - goto error; - } - } - } - } - else - { - /* Transfer loop */ - while (hspi->RxXferCount > 0U) - { - /* Check the RXNE flag */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) - { - *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; - hspi->pRxBuffPtr += sizeof(uint16_t); - hspi->RxXferCount--; - } - else - { - /* Timeout management */ - if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - { - errorcode = HAL_TIMEOUT; - goto error; - } - } - } - } - -#if (USE_SPI_CRC != 0U) - /* Handle the CRC Transmission */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - /* freeze the CRC before the latest data */ - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - - /* Read the latest data */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) - { - /* the latest data has not been received */ - errorcode = HAL_TIMEOUT; - goto error; - } - - /* Receive last data in 16 Bit mode */ - if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) - { - *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; - } - /* Receive last data in 8 Bit mode */ - else - { - (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; - } - - /* Wait the CRC data */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - errorcode = HAL_TIMEOUT; - goto error; - } - - /* Read CRC to Flush DR and RXNE flag */ - tmpreg = READ_REG(hspi->Instance->DR); - /* To avoid GCC warning */ - UNUSED(tmpreg); - } -#endif /* USE_SPI_CRC */ - - /* Check the end of the transaction */ - if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) - { - hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - } - -#if (USE_SPI_CRC != 0U) - /* Check if CRC error occurred */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - __HAL_SPI_CLEAR_CRCERRFLAG(hspi); - } -#endif /* USE_SPI_CRC */ - - if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - { - errorcode = HAL_ERROR; - } - -error : - hspi->State = HAL_SPI_STATE_READY; - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Transmit and Receive an amount of data in blocking mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, - uint32_t Timeout) -{ - uint16_t initial_TxXferCount; - uint32_t tmp_mode; - HAL_SPI_StateTypeDef tmp_state; - uint32_t tickstart; -#if (USE_SPI_CRC != 0U) - __IO uint32_t tmpreg = 0U; -#endif /* USE_SPI_CRC */ - - /* Variable used to alternate Rx and Tx during transfer */ - uint32_t txallowed = 1U; - HAL_StatusTypeDef errorcode = HAL_OK; - - /* Check Direction parameter */ - assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - - /* Process Locked */ - __HAL_LOCK(hspi); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - /* Init temporary variables */ - tmp_state = hspi->State; - tmp_mode = hspi->Init.Mode; - initial_TxXferCount = Size; - - if (!((tmp_state == HAL_SPI_STATE_READY) || \ - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) - { - errorcode = HAL_BUSY; - goto error; - } - - if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ - if (hspi->State != HAL_SPI_STATE_BUSY_RX) - { - hspi->State = HAL_SPI_STATE_BUSY_TX_RX; - } - - /* Set the transaction information */ - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pRxBuffPtr = (uint8_t *)pRxData; - hspi->RxXferCount = Size; - hspi->RxXferSize = Size; - hspi->pTxBuffPtr = (uint8_t *)pTxData; - hspi->TxXferCount = Size; - hspi->TxXferSize = Size; - - /*Init field not used in handle to zero */ - hspi->RxISR = NULL; - hspi->TxISR = NULL; - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } -#endif /* USE_SPI_CRC */ - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - - /* Transmit and Receive data in 16 Bit mode */ - if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) - { - if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint16_t); - hspi->TxXferCount--; - } - while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - { - /* Check TXE flag */ - if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) - { - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint16_t); - hspi->TxXferCount--; - /* Next Data is a reception (Rx). Tx not allowed */ - txallowed = 0U; - -#if (USE_SPI_CRC != 0U) - /* Enable CRC Transmission */ - if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) - { - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - } -#endif /* USE_SPI_CRC */ - } - - /* Check RXNE flag */ - if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) - { - *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; - hspi->pRxBuffPtr += sizeof(uint16_t); - hspi->RxXferCount--; - /* Next Data is a Transmission (Tx). Tx is allowed */ - txallowed = 1U; - } - if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) - { - errorcode = HAL_TIMEOUT; - goto error; - } - } - } - /* Transmit and Receive data in 8 Bit mode */ - else - { - if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - { - *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint8_t); - hspi->TxXferCount--; - } - while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - { - /* Check TXE flag */ - if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) - { - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); - hspi->pTxBuffPtr++; - hspi->TxXferCount--; - /* Next Data is a reception (Rx). Tx not allowed */ - txallowed = 0U; - -#if (USE_SPI_CRC != 0U) - /* Enable CRC Transmission */ - if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) - { - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - } -#endif /* USE_SPI_CRC */ - } - - /* Wait until RXNE flag is reset */ - if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) - { - (*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR; - hspi->pRxBuffPtr++; - hspi->RxXferCount--; - /* Next Data is a Transmission (Tx). Tx is allowed */ - txallowed = 1U; - } - if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) - { - errorcode = HAL_TIMEOUT; - goto error; - } - } - } - -#if (USE_SPI_CRC != 0U) - /* Read CRC from DR to close CRC calculation process */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - /* Wait until TXE flag */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) - { - /* Error on the CRC reception */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - errorcode = HAL_TIMEOUT; - goto error; - } - /* Read CRC */ - tmpreg = READ_REG(hspi->Instance->DR); - /* To avoid GCC warning */ - UNUSED(tmpreg); - } - - /* Check if CRC error occurred */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - /* Clear CRC Flag */ - __HAL_SPI_CLEAR_CRCERRFLAG(hspi); - - errorcode = HAL_ERROR; - } -#endif /* USE_SPI_CRC */ - - /* Check the end of the transaction */ - if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) - { - errorcode = HAL_ERROR; - hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - goto error; - } - - /* Clear overrun flag in 2 Lines communication mode because received is not read */ - if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - { - __HAL_SPI_CLEAR_OVRFLAG(hspi); - } - -error : - hspi->State = HAL_SPI_STATE_READY; - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Transmit an amount of data in non-blocking mode with Interrupt. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) -{ - HAL_StatusTypeDef errorcode = HAL_OK; - - /* Check Direction parameter */ - assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - - /* Process Locked */ - __HAL_LOCK(hspi); - - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - if (hspi->State != HAL_SPI_STATE_READY) - { - errorcode = HAL_BUSY; - goto error; - } - - /* Set the transaction information */ - hspi->State = HAL_SPI_STATE_BUSY_TX; - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; - hspi->TxXferSize = Size; - hspi->TxXferCount = Size; - - /* Init field not used in handle to zero */ - hspi->pRxBuffPtr = (uint8_t *)NULL; - hspi->RxXferSize = 0U; - hspi->RxXferCount = 0U; - hspi->RxISR = NULL; - - /* Set the function for IT treatment */ - if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) - { - hspi->TxISR = SPI_TxISR_16BIT; - } - else - { - hspi->TxISR = SPI_TxISR_8BIT; - } - - /* Configure communication direction : 1Line */ - if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - { - /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ - __HAL_SPI_DISABLE(hspi); - SPI_1LINE_TX(hspi); - } - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } -#endif /* USE_SPI_CRC */ - - /* Enable TXE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); - - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - -error : - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Receive an amount of data in non-blocking mode with Interrupt. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) -{ - HAL_StatusTypeDef errorcode = HAL_OK; - - if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) - { - hspi->State = HAL_SPI_STATE_BUSY_RX; - /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ - return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size); - } - - /* Process Locked */ - __HAL_LOCK(hspi); - - if (hspi->State != HAL_SPI_STATE_READY) - { - errorcode = HAL_BUSY; - goto error; - } - - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - /* Set the transaction information */ - hspi->State = HAL_SPI_STATE_BUSY_RX; - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pRxBuffPtr = (uint8_t *)pData; - hspi->RxXferSize = Size; - hspi->RxXferCount = Size; - - /* Init field not used in handle to zero */ - hspi->pTxBuffPtr = (uint8_t *)NULL; - hspi->TxXferSize = 0U; - hspi->TxXferCount = 0U; - hspi->TxISR = NULL; - - /* Set the function for IT treatment */ - if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) - { - hspi->RxISR = SPI_RxISR_16BIT; - } - else - { - hspi->RxISR = SPI_RxISR_8BIT; - } - - /* Configure communication direction : 1Line */ - if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - { - /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ - __HAL_SPI_DISABLE(hspi); - SPI_1LINE_RX(hspi); - } - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } -#endif /* USE_SPI_CRC */ - - /* Enable TXE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); - - /* Note : The SPI must be enabled after unlocking current process - to avoid the risk of SPI interrupt handle execution before current - process unlock */ - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - -error : - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) -{ - uint32_t tmp_mode; - HAL_SPI_StateTypeDef tmp_state; - HAL_StatusTypeDef errorcode = HAL_OK; - - /* Check Direction parameter */ - assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - - /* Process locked */ - __HAL_LOCK(hspi); - - /* Init temporary variables */ - tmp_state = hspi->State; - tmp_mode = hspi->Init.Mode; - - if (!((tmp_state == HAL_SPI_STATE_READY) || \ - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) - { - errorcode = HAL_BUSY; - goto error; - } - - if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ - if (hspi->State != HAL_SPI_STATE_BUSY_RX) - { - hspi->State = HAL_SPI_STATE_BUSY_TX_RX; - } - - /* Set the transaction information */ - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pTxData; - hspi->TxXferSize = Size; - hspi->TxXferCount = Size; - hspi->pRxBuffPtr = (uint8_t *)pRxData; - hspi->RxXferSize = Size; - hspi->RxXferCount = Size; - - /* Set the function for IT treatment */ - if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) - { - hspi->RxISR = SPI_2linesRxISR_16BIT; - hspi->TxISR = SPI_2linesTxISR_16BIT; - } - else - { - hspi->RxISR = SPI_2linesRxISR_8BIT; - hspi->TxISR = SPI_2linesTxISR_8BIT; - } - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } -#endif /* USE_SPI_CRC */ - - /* Enable TXE, RXNE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - -error : - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Transmit an amount of data in non-blocking mode with DMA. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) -{ - HAL_StatusTypeDef errorcode = HAL_OK; - - /* Check tx dma handle */ - assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); - - /* Check Direction parameter */ - assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - - /* Process Locked */ - __HAL_LOCK(hspi); - - if (hspi->State != HAL_SPI_STATE_READY) - { - errorcode = HAL_BUSY; - goto error; - } - - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - /* Set the transaction information */ - hspi->State = HAL_SPI_STATE_BUSY_TX; - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pData; - hspi->TxXferSize = Size; - hspi->TxXferCount = Size; - - /* Init field not used in handle to zero */ - hspi->pRxBuffPtr = (uint8_t *)NULL; - hspi->TxISR = NULL; - hspi->RxISR = NULL; - hspi->RxXferSize = 0U; - hspi->RxXferCount = 0U; - - /* Configure communication direction : 1Line */ - if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - { - /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ - __HAL_SPI_DISABLE(hspi); - SPI_1LINE_TX(hspi); - } - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } -#endif /* USE_SPI_CRC */ - - /* Set the SPI TxDMA Half transfer complete callback */ - hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt; - - /* Set the SPI TxDMA transfer complete callback */ - hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt; - - /* Set the DMA error callback */ - hspi->hdmatx->XferErrorCallback = SPI_DMAError; - - /* Set the DMA AbortCpltCallback */ - hspi->hdmatx->XferAbortCallback = NULL; - - /* Enable the Tx DMA Stream/Channel */ - if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, - hspi->TxXferCount)) - { - /* Update SPI error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - hspi->State = HAL_SPI_STATE_READY; - goto error; - } - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - - /* Enable the SPI Error Interrupt Bit */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); - - /* Enable Tx DMA Request */ - SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); - -error : - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Receive an amount of data in non-blocking mode with DMA. - * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pData pointer to data buffer - * @note When the CRC feature is enabled the pData Length must be Size + 1. - * @param Size amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) -{ - HAL_StatusTypeDef errorcode = HAL_OK; - - /* Check rx dma handle */ - assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); - - if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) - { - hspi->State = HAL_SPI_STATE_BUSY_RX; - - /* Check tx dma handle */ - assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); - - /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ - return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size); - } - - /* Process Locked */ - __HAL_LOCK(hspi); - - if (hspi->State != HAL_SPI_STATE_READY) - { - errorcode = HAL_BUSY; - goto error; - } - - if ((pData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - /* Set the transaction information */ - hspi->State = HAL_SPI_STATE_BUSY_RX; - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pRxBuffPtr = (uint8_t *)pData; - hspi->RxXferSize = Size; - hspi->RxXferCount = Size; - - /*Init field not used in handle to zero */ - hspi->RxISR = NULL; - hspi->TxISR = NULL; - hspi->TxXferSize = 0U; - hspi->TxXferCount = 0U; - - /* Configure communication direction : 1Line */ - if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - { - /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ - __HAL_SPI_DISABLE(hspi); - SPI_1LINE_RX(hspi); - } - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } -#endif /* USE_SPI_CRC */ - - /* Set the SPI RxDMA Half transfer complete callback */ - hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt; - - /* Set the SPI Rx DMA transfer complete callback */ - hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; - - /* Set the DMA error callback */ - hspi->hdmarx->XferErrorCallback = SPI_DMAError; - - /* Set the DMA AbortCpltCallback */ - hspi->hdmarx->XferAbortCallback = NULL; - - /* Enable the Rx DMA Stream/Channel */ - if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, - hspi->RxXferCount)) - { - /* Update SPI error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - hspi->State = HAL_SPI_STATE_READY; - goto error; - } - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - - /* Enable the SPI Error Interrupt Bit */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); - - /* Enable Rx DMA Request */ - SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); - -error: - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Transmit and Receive an amount of data in non-blocking mode with DMA. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @note When the CRC feature is enabled the pRxData Length must be Size + 1 - * @param Size amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, - uint16_t Size) -{ - uint32_t tmp_mode; - HAL_SPI_StateTypeDef tmp_state; - HAL_StatusTypeDef errorcode = HAL_OK; - - /* Check rx & tx dma handles */ - assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); - assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); - - /* Check Direction parameter */ - assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - - /* Process locked */ - __HAL_LOCK(hspi); - - /* Init temporary variables */ - tmp_state = hspi->State; - tmp_mode = hspi->Init.Mode; - - if (!((tmp_state == HAL_SPI_STATE_READY) || - ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) - { - errorcode = HAL_BUSY; - goto error; - } - - if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) - { - errorcode = HAL_ERROR; - goto error; - } - - /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ - if (hspi->State != HAL_SPI_STATE_BUSY_RX) - { - hspi->State = HAL_SPI_STATE_BUSY_TX_RX; - } - - /* Set the transaction information */ - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - hspi->pTxBuffPtr = (uint8_t *)pTxData; - hspi->TxXferSize = Size; - hspi->TxXferCount = Size; - hspi->pRxBuffPtr = (uint8_t *)pRxData; - hspi->RxXferSize = Size; - hspi->RxXferCount = Size; - - /* Init field not used in handle to zero */ - hspi->RxISR = NULL; - hspi->TxISR = NULL; - -#if (USE_SPI_CRC != 0U) - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } -#endif /* USE_SPI_CRC */ - - /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */ - if (hspi->State == HAL_SPI_STATE_BUSY_RX) - { - /* Set the SPI Rx DMA Half transfer complete callback */ - hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt; - hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; - } - else - { - /* Set the SPI Tx/Rx DMA Half transfer complete callback */ - hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt; - hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; - } - - /* Set the DMA error callback */ - hspi->hdmarx->XferErrorCallback = SPI_DMAError; - - /* Set the DMA AbortCpltCallback */ - hspi->hdmarx->XferAbortCallback = NULL; - - /* Enable the Rx DMA Stream/Channel */ - if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, - hspi->RxXferCount)) - { - /* Update SPI error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - hspi->State = HAL_SPI_STATE_READY; - goto error; - } - - /* Enable Rx DMA Request */ - SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); - - /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing - is performed in DMA reception complete callback */ - hspi->hdmatx->XferHalfCpltCallback = NULL; - hspi->hdmatx->XferCpltCallback = NULL; - hspi->hdmatx->XferErrorCallback = NULL; - hspi->hdmatx->XferAbortCallback = NULL; - - /* Enable the Tx DMA Stream/Channel */ - if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, - hspi->TxXferCount)) - { - /* Update SPI error code */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - - hspi->State = HAL_SPI_STATE_READY; - goto error; - } - - /* Check if the SPI is already enabled */ - if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - { - /* Enable SPI peripheral */ - __HAL_SPI_ENABLE(hspi); - } - /* Enable the SPI Error Interrupt Bit */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); - - /* Enable Tx DMA Request */ - SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); - -error : - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - return errorcode; -} - -/** - * @brief Abort ongoing transfer (blocking mode). - * @param hspi SPI handle. - * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx), - * started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable SPI Interrupts (depending of transfer direction) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi) -{ - HAL_StatusTypeDef errorcode; - __IO uint32_t count; - __IO uint32_t resetcount; - - /* Initialized local variable */ - errorcode = HAL_OK; - resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); - count = resetcount; - - /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE); - - /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */ - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE)) - { - hspi->TxISR = SPI_AbortTx_ISR; - /* Wait HAL_SPI_STATE_ABORT state */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - break; - } - count--; - } while (hspi->State != HAL_SPI_STATE_ABORT); - /* Reset Timeout Counter */ - count = resetcount; - } - - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)) - { - hspi->RxISR = SPI_AbortRx_ISR; - /* Wait HAL_SPI_STATE_ABORT state */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - break; - } - count--; - } while (hspi->State != HAL_SPI_STATE_ABORT); - /* Reset Timeout Counter */ - count = resetcount; - } - - /* Disable the SPI DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) - { - /* Abort the SPI DMA Tx Stream/Channel : use blocking DMA Abort API (no callback) */ - if (hspi->hdmatx != NULL) - { - /* Set the SPI DMA Abort callback : - will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */ - hspi->hdmatx->XferAbortCallback = NULL; - - /* Abort DMA Tx Handle linked to SPI Peripheral */ - if (HAL_DMA_Abort(hspi->hdmatx) != HAL_OK) - { - hspi->ErrorCode = HAL_SPI_ERROR_ABORT; - } - - /* Disable Tx DMA Request */ - CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN)); - - /* Wait until TXE flag is set */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - break; - } - count--; - } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET); - } - } - - /* Disable the SPI DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) - { - /* Abort the SPI DMA Rx Stream/Channel : use blocking DMA Abort API (no callback) */ - if (hspi->hdmarx != NULL) - { - /* Set the SPI DMA Abort callback : - will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */ - hspi->hdmarx->XferAbortCallback = NULL; - - /* Abort DMA Rx Handle linked to SPI Peripheral */ - if (HAL_DMA_Abort(hspi->hdmarx) != HAL_OK) - { - hspi->ErrorCode = HAL_SPI_ERROR_ABORT; - } - - /* Disable peripheral */ - __HAL_SPI_DISABLE(hspi); - - /* Disable Rx DMA Request */ - CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN)); - } - } - /* Reset Tx and Rx transfer counters */ - hspi->RxXferCount = 0U; - hspi->TxXferCount = 0U; - - /* Check error during Abort procedure */ - if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT) - { - /* return HAL_Error in case of error during Abort procedure */ - errorcode = HAL_ERROR; - } - else - { - /* Reset errorCode */ - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - } - - /* Clear the Error flags in the SR register */ - __HAL_SPI_CLEAR_OVRFLAG(hspi); - __HAL_SPI_CLEAR_FREFLAG(hspi); - - /* Restore hspi->state to ready */ - hspi->State = HAL_SPI_STATE_READY; - - return errorcode; -} - -/** - * @brief Abort ongoing transfer (Interrupt mode). - * @param hspi SPI handle. - * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx), - * started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable SPI Interrupts (depending of transfer direction) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi) -{ - HAL_StatusTypeDef errorcode; - uint32_t abortcplt ; - __IO uint32_t count; - __IO uint32_t resetcount; - - /* Initialized local variable */ - errorcode = HAL_OK; - abortcplt = 1U; - resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); - count = resetcount; - - /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE); - - /* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */ - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE)) - { - hspi->TxISR = SPI_AbortTx_ISR; - /* Wait HAL_SPI_STATE_ABORT state */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - break; - } - count--; - } while (hspi->State != HAL_SPI_STATE_ABORT); - /* Reset Timeout Counter */ - count = resetcount; - } - - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)) - { - hspi->RxISR = SPI_AbortRx_ISR; - /* Wait HAL_SPI_STATE_ABORT state */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - break; - } - count--; - } while (hspi->State != HAL_SPI_STATE_ABORT); - /* Reset Timeout Counter */ - count = resetcount; - } - - /* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks should be initialised - before any call to DMA Abort functions */ - /* DMA Tx Handle is valid */ - if (hspi->hdmatx != NULL) - { - /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. - Otherwise, set it to NULL */ - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) - { - hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback; - } - else - { - hspi->hdmatx->XferAbortCallback = NULL; - } - } - /* DMA Rx Handle is valid */ - if (hspi->hdmarx != NULL) - { - /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. - Otherwise, set it to NULL */ - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) - { - hspi->hdmarx->XferAbortCallback = SPI_DMARxAbortCallback; - } - else - { - hspi->hdmarx->XferAbortCallback = NULL; - } - } - - /* Disable the SPI DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) - { - /* Abort the SPI DMA Tx Stream/Channel */ - if (hspi->hdmatx != NULL) - { - /* Abort DMA Tx Handle linked to SPI Peripheral */ - if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK) - { - hspi->hdmatx->XferAbortCallback = NULL; - hspi->ErrorCode = HAL_SPI_ERROR_ABORT; - } - else - { - abortcplt = 0U; - } - } - } - /* Disable the SPI DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) - { - /* Abort the SPI DMA Rx Stream/Channel */ - if (hspi->hdmarx != NULL) - { - /* Abort DMA Rx Handle linked to SPI Peripheral */ - if (HAL_DMA_Abort_IT(hspi->hdmarx) != HAL_OK) - { - hspi->hdmarx->XferAbortCallback = NULL; - hspi->ErrorCode = HAL_SPI_ERROR_ABORT; - } - else - { - abortcplt = 0U; - } - } - } - - if (abortcplt == 1U) - { - /* Reset Tx and Rx transfer counters */ - hspi->RxXferCount = 0U; - hspi->TxXferCount = 0U; - - /* Check error during Abort procedure */ - if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT) - { - /* return HAL_Error in case of error during Abort procedure */ - errorcode = HAL_ERROR; - } - else - { - /* Reset errorCode */ - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - } - - /* Clear the Error flags in the SR register */ - __HAL_SPI_CLEAR_OVRFLAG(hspi); - __HAL_SPI_CLEAR_FREFLAG(hspi); - - /* Restore hspi->State to Ready */ - hspi->State = HAL_SPI_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->AbortCpltCallback(hspi); -#else - HAL_SPI_AbortCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - - return errorcode; -} - -/** - * @brief Pause the DMA Transfer. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for the specified SPI module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi) -{ - /* Process Locked */ - __HAL_LOCK(hspi); - - /* Disable the SPI DMA Tx & Rx requests */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); - - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - - return HAL_OK; -} - -/** - * @brief Resume the DMA Transfer. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for the specified SPI module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi) -{ - /* Process Locked */ - __HAL_LOCK(hspi); - - /* Enable the SPI DMA Tx & Rx requests */ - SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); - - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - - return HAL_OK; -} - -/** - * @brief Stop the DMA Transfer. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for the specified SPI module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) -{ - HAL_StatusTypeDef errorcode = HAL_OK; - /* The Lock is not implemented on this API to allow the user application - to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback(): - when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated - and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback() - */ - - /* Abort the SPI DMA tx Stream/Channel */ - if (hspi->hdmatx != NULL) - { - if (HAL_OK != HAL_DMA_Abort(hspi->hdmatx)) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - } - } - /* Abort the SPI DMA rx Stream/Channel */ - if (hspi->hdmarx != NULL) - { - if (HAL_OK != HAL_DMA_Abort(hspi->hdmarx)) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - errorcode = HAL_ERROR; - } - } - - /* Disable the SPI DMA Tx & Rx requests */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); - hspi->State = HAL_SPI_STATE_READY; - return errorcode; -} - -/** - * @brief Handle SPI interrupt request. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for the specified SPI module. - * @retval None - */ -void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi) -{ - uint32_t itsource = hspi->Instance->CR2; - uint32_t itflag = hspi->Instance->SR; - - /* SPI in mode Receiver ----------------------------------------------------*/ - if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) && - (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET)) - { - hspi->RxISR(hspi); - return; - } - - /* SPI in mode Transmitter -------------------------------------------------*/ - if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET)) - { - hspi->TxISR(hspi); - return; - } - - /* SPI in Error Treatment --------------------------------------------------*/ - if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET) - || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET)) - { - /* SPI Overrun error interrupt occurred ----------------------------------*/ - if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET) - { - if (hspi->State != HAL_SPI_STATE_BUSY_TX) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR); - __HAL_SPI_CLEAR_OVRFLAG(hspi); - } - else - { - __HAL_SPI_CLEAR_OVRFLAG(hspi); - return; - } - } - - /* SPI Mode Fault error interrupt occurred -------------------------------*/ - if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF); - __HAL_SPI_CLEAR_MODFFLAG(hspi); - } - - /* SPI Frame error interrupt occurred ------------------------------------*/ - if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE); - __HAL_SPI_CLEAR_FREFLAG(hspi); - } - - if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - { - /* Disable all interrupts */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR); - - hspi->State = HAL_SPI_STATE_READY; - /* Disable the SPI DMA requests if enabled */ - if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN))) - { - CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN)); - - /* Abort the SPI DMA Rx channel */ - if (hspi->hdmarx != NULL) - { - /* Set the SPI DMA Abort callback : - will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ - hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError; - if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - } - } - /* Abort the SPI DMA Tx channel */ - if (hspi->hdmatx != NULL) - { - /* Set the SPI DMA Abort callback : - will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ - hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError; - if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - } - } - } - else - { - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - } - return; - } -} - -/** - * @brief Tx Transfer completed callback. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_TxCpltCallback should be implemented in the user file - */ -} - -/** - * @brief Rx Transfer completed callback. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_RxCpltCallback should be implemented in the user file - */ -} - -/** - * @brief Tx and Rx Transfer completed callback. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_TxRxCpltCallback should be implemented in the user file - */ -} - -/** - * @brief Tx Half Transfer completed callback. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_TxHalfCpltCallback should be implemented in the user file - */ -} - -/** - * @brief Rx Half Transfer completed callback. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file - */ -} - -/** - * @brief Tx and Rx Half Transfer callback. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file - */ -} - -/** - * @brief SPI error callback. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_ErrorCallback should be implemented in the user file - */ - /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes - and user can use HAL_SPI_GetError() API to check the latest error occurred - */ -} - -/** - * @brief SPI Abort Complete callback. - * @param hspi SPI handle. - * @retval None - */ -__weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hspi); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SPI_AbortCpltCallback can be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions - * @brief SPI control functions - * -@verbatim - =============================================================================== - ##### Peripheral State and Errors functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the SPI. - (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral - (+) HAL_SPI_GetError() check in run-time Errors occurring during communication -@endverbatim - * @{ - */ - -/** - * @brief Return the SPI handle state. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval SPI state - */ -HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi) -{ - /* Return SPI handle state */ - return hspi->State; -} - -/** - * @brief Return the SPI error code. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval SPI error code in bitmap format - */ -uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi) -{ - /* Return SPI ErrorCode */ - return hspi->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup SPI_Private_Functions - * @brief Private functions - * @{ - */ - -/** - * @brief DMA SPI transmit process complete callback. - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - uint32_t tickstart; - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - /* DMA Normal Mode */ - if ((hdma->Instance->CR & DMA_SxCR_CIRC) != DMA_SxCR_CIRC) - { - /* Disable ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); - - /* Disable Tx DMA Request */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); - - /* Check the end of the transaction */ - if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - } - - /* Clear overrun flag in 2 Lines communication mode because received data is not read */ - if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - { - __HAL_SPI_CLEAR_OVRFLAG(hspi); - } - - hspi->TxXferCount = 0U; - hspi->State = HAL_SPI_STATE_READY; - - if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - { - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - return; - } - } - /* Call user Tx complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->TxCpltCallback(hspi); -#else - HAL_SPI_TxCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI receive process complete callback. - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - uint32_t tickstart; -#if (USE_SPI_CRC != 0U) - __IO uint32_t tmpreg = 0U; -#endif /* USE_SPI_CRC */ - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - /* DMA Normal Mode */ - if ((hdma->Instance->CR & DMA_SxCR_CIRC) != DMA_SxCR_CIRC) - { - /* Disable ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); - -#if (USE_SPI_CRC != 0U) - /* CRC handling */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - /* Wait until RXNE flag */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) - { - /* Error on the CRC reception */ - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - } - /* Read CRC */ - tmpreg = READ_REG(hspi->Instance->DR); - /* To avoid GCC warning */ - UNUSED(tmpreg); - } -#endif /* USE_SPI_CRC */ - - /* Check if we are in Master RX 2 line mode */ - if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) - { - /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); - } - else - { - /* Normal case */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); - } - - /* Check the end of the transaction */ - if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) - { - hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - } - - hspi->RxXferCount = 0U; - hspi->State = HAL_SPI_STATE_READY; - -#if (USE_SPI_CRC != 0U) - /* Check if CRC error occurred */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - __HAL_SPI_CLEAR_CRCERRFLAG(hspi); - } -#endif /* USE_SPI_CRC */ - - if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - { - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - return; - } - } - /* Call user Rx complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->RxCpltCallback(hspi); -#else - HAL_SPI_RxCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI transmit receive process complete callback. - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - uint32_t tickstart; -#if (USE_SPI_CRC != 0U) - __IO uint32_t tmpreg = 0U; -#endif /* USE_SPI_CRC */ - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - /* DMA Normal Mode */ - if ((hdma->Instance->CR & DMA_SxCR_CIRC) != DMA_SxCR_CIRC) - { - /* Disable ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); - -#if (USE_SPI_CRC != 0U) - /* CRC handling */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - /* Wait the CRC data */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - } - /* Read CRC to Flush DR and RXNE flag */ - tmpreg = READ_REG(hspi->Instance->DR); - /* To avoid GCC warning */ - UNUSED(tmpreg); - } -#endif /* USE_SPI_CRC */ - - /* Check the end of the transaction */ - if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - } - - /* Disable Rx/Tx DMA Request */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); - - hspi->TxXferCount = 0U; - hspi->RxXferCount = 0U; - hspi->State = HAL_SPI_STATE_READY; - -#if (USE_SPI_CRC != 0U) - /* Check if CRC error occurred */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - __HAL_SPI_CLEAR_CRCERRFLAG(hspi); - } -#endif /* USE_SPI_CRC */ - - if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - { - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - return; - } - } - /* Call user TxRx complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->TxRxCpltCallback(hspi); -#else - HAL_SPI_TxRxCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI half transmit process complete callback. - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - - /* Call user Tx half complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->TxHalfCpltCallback(hspi); -#else - HAL_SPI_TxHalfCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI half receive process complete callback - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - - /* Call user Rx half complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->RxHalfCpltCallback(hspi); -#else - HAL_SPI_RxHalfCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI half transmit receive process complete callback. - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - - /* Call user TxRx half complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->TxRxHalfCpltCallback(hspi); -#else - HAL_SPI_TxRxHalfCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI communication error callback. - * @param hdma pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SPI_DMAError(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - - /* Stop the disable DMA transfer on SPI side */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); - - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); - hspi->State = HAL_SPI_STATE_READY; - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI communication abort callback, when initiated by HAL services on Error - * (To be called at end of DMA Abort procedure following error occurrence). - * @param hdma DMA handle. - * @retval None - */ -static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - hspi->RxXferCount = 0U; - hspi->TxXferCount = 0U; - - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI Tx communication abort callback, when initiated by user - * (To be called at end of DMA Tx Abort procedure following user abort request). - * @note When this callback is executed, User Abort complete call back is called only if no - * Abort still ongoing for Rx DMA Handle. - * @param hdma DMA handle. - * @retval None - */ -static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - __IO uint32_t count; - - hspi->hdmatx->XferAbortCallback = NULL; - count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); - - /* Disable Tx DMA Request */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); - - /* Wait until TXE flag is set */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - break; - } - count--; - } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET); - - /* Check if an Abort process is still ongoing */ - if (hspi->hdmarx != NULL) - { - if (hspi->hdmarx->XferAbortCallback != NULL) - { - return; - } - } - - /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */ - hspi->RxXferCount = 0U; - hspi->TxXferCount = 0U; - - /* Check no error during Abort procedure */ - if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT) - { - /* Reset errorCode */ - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - } - - /* Clear the Error flags in the SR register */ - __HAL_SPI_CLEAR_OVRFLAG(hspi); - __HAL_SPI_CLEAR_FREFLAG(hspi); - - /* Restore hspi->State to Ready */ - hspi->State = HAL_SPI_STATE_READY; - - /* Call user Abort complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->AbortCpltCallback(hspi); -#else - HAL_SPI_AbortCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA SPI Rx communication abort callback, when initiated by user - * (To be called at end of DMA Rx Abort procedure following user abort request). - * @note When this callback is executed, User Abort complete call back is called only if no - * Abort still ongoing for Tx DMA Handle. - * @param hdma DMA handle. - * @retval None - */ -static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma) -{ - SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ - - /* Disable SPI Peripheral */ - __HAL_SPI_DISABLE(hspi); - - hspi->hdmarx->XferAbortCallback = NULL; - - /* Disable Rx DMA Request */ - CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); - - /* Check Busy flag */ - if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - } - - /* Check if an Abort process is still ongoing */ - if (hspi->hdmatx != NULL) - { - if (hspi->hdmatx->XferAbortCallback != NULL) - { - return; - } - } - - /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */ - hspi->RxXferCount = 0U; - hspi->TxXferCount = 0U; - - /* Check no error during Abort procedure */ - if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT) - { - /* Reset errorCode */ - hspi->ErrorCode = HAL_SPI_ERROR_NONE; - } - - /* Clear the Error flags in the SR register */ - __HAL_SPI_CLEAR_OVRFLAG(hspi); - __HAL_SPI_CLEAR_FREFLAG(hspi); - - /* Restore hspi->State to Ready */ - hspi->State = HAL_SPI_STATE_READY; - - /* Call user Abort complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->AbortCpltCallback(hspi); -#else - HAL_SPI_AbortCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ -} - -/** - * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi) -{ - /* Receive data in 8bit mode */ - *hspi->pRxBuffPtr = *((__IO uint8_t *)&hspi->Instance->DR); - hspi->pRxBuffPtr++; - hspi->RxXferCount--; - - /* Check end of the reception */ - if (hspi->RxXferCount == 0U) - { -#if (USE_SPI_CRC != 0U) - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - hspi->RxISR = SPI_2linesRxISR_8BITCRC; - return; - } -#endif /* USE_SPI_CRC */ - - /* Disable RXNE and ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); - - if (hspi->TxXferCount == 0U) - { - SPI_CloseRxTx_ISR(hspi); - } - } -} - -#if (USE_SPI_CRC != 0U) -/** - * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) -{ - __IO uint8_t *ptmpreg8; - __IO uint8_t tmpreg8 = 0; - - /* Initialize the 8bit temporary pointer */ - ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; - /* Read 8bit CRC to flush Data Register */ - tmpreg8 = *ptmpreg8; - /* To avoid GCC warning */ - UNUSED(tmpreg8); - - /* Disable RXNE and ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); - - if (hspi->TxXferCount == 0U) - { - SPI_CloseRxTx_ISR(hspi); - } -} -#endif /* USE_SPI_CRC */ - -/** - * @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi) -{ - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); - hspi->pTxBuffPtr++; - hspi->TxXferCount--; - - /* Check the end of the transmission */ - if (hspi->TxXferCount == 0U) - { -#if (USE_SPI_CRC != 0U) - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - /* Set CRC Next Bit to send CRC */ - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - /* Disable TXE interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); - return; - } -#endif /* USE_SPI_CRC */ - - /* Disable TXE interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); - - if (hspi->RxXferCount == 0U) - { - SPI_CloseRxTx_ISR(hspi); - } - } -} - -/** - * @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi) -{ - /* Receive data in 16 Bit mode */ - *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); - hspi->pRxBuffPtr += sizeof(uint16_t); - hspi->RxXferCount--; - - if (hspi->RxXferCount == 0U) - { -#if (USE_SPI_CRC != 0U) - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - hspi->RxISR = SPI_2linesRxISR_16BITCRC; - return; - } -#endif /* USE_SPI_CRC */ - - /* Disable RXNE interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE); - - if (hspi->TxXferCount == 0U) - { - SPI_CloseRxTx_ISR(hspi); - } - } -} - -#if (USE_SPI_CRC != 0U) -/** - * @brief Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) -{ - __IO uint32_t tmpreg = 0U; - - /* Read 16bit CRC to flush Data Register */ - tmpreg = READ_REG(hspi->Instance->DR); - /* To avoid GCC warning */ - UNUSED(tmpreg); - - /* Disable RXNE interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE); - - SPI_CloseRxTx_ISR(hspi); -} -#endif /* USE_SPI_CRC */ - -/** - * @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi) -{ - /* Transmit data in 16 Bit mode */ - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint16_t); - hspi->TxXferCount--; - - /* Enable CRC Transmission */ - if (hspi->TxXferCount == 0U) - { -#if (USE_SPI_CRC != 0U) - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - /* Set CRC Next Bit to send CRC */ - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - /* Disable TXE interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); - return; - } -#endif /* USE_SPI_CRC */ - - /* Disable TXE interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); - - if (hspi->RxXferCount == 0U) - { - SPI_CloseRxTx_ISR(hspi); - } - } -} - -#if (USE_SPI_CRC != 0U) -/** - * @brief Manage the CRC 8-bit receive in Interrupt context. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) -{ - __IO uint8_t *ptmpreg8; - __IO uint8_t tmpreg8 = 0; - - /* Initialize the 8bit temporary pointer */ - ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; - /* Read 8bit CRC to flush Data Register */ - tmpreg8 = *ptmpreg8; - /* To avoid GCC warning */ - UNUSED(tmpreg8); - - SPI_CloseRx_ISR(hspi); -} -#endif /* USE_SPI_CRC */ - -/** - * @brief Manage the receive 8-bit in Interrupt context. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi) -{ - *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR); - hspi->pRxBuffPtr++; - hspi->RxXferCount--; - -#if (USE_SPI_CRC != 0U) - /* Enable CRC Transmission */ - if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) - { - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - } -#endif /* USE_SPI_CRC */ - - if (hspi->RxXferCount == 0U) - { -#if (USE_SPI_CRC != 0U) - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - hspi->RxISR = SPI_RxISR_8BITCRC; - return; - } -#endif /* USE_SPI_CRC */ - SPI_CloseRx_ISR(hspi); - } -} - -#if (USE_SPI_CRC != 0U) -/** - * @brief Manage the CRC 16-bit receive in Interrupt context. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) -{ - __IO uint32_t tmpreg = 0U; - - /* Read 16bit CRC to flush Data Register */ - tmpreg = READ_REG(hspi->Instance->DR); - /* To avoid GCC warning */ - UNUSED(tmpreg); - - /* Disable RXNE and ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); - - SPI_CloseRx_ISR(hspi); -} -#endif /* USE_SPI_CRC */ - -/** - * @brief Manage the 16-bit receive in Interrupt context. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi) -{ - *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); - hspi->pRxBuffPtr += sizeof(uint16_t); - hspi->RxXferCount--; - -#if (USE_SPI_CRC != 0U) - /* Enable CRC Transmission */ - if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) - { - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - } -#endif /* USE_SPI_CRC */ - - if (hspi->RxXferCount == 0U) - { -#if (USE_SPI_CRC != 0U) - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - hspi->RxISR = SPI_RxISR_16BITCRC; - return; - } -#endif /* USE_SPI_CRC */ - SPI_CloseRx_ISR(hspi); - } -} - -/** - * @brief Handle the data 8-bit transmit in Interrupt mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi) -{ - *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); - hspi->pTxBuffPtr++; - hspi->TxXferCount--; - - if (hspi->TxXferCount == 0U) - { -#if (USE_SPI_CRC != 0U) - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - /* Enable CRC Transmission */ - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - } -#endif /* USE_SPI_CRC */ - SPI_CloseTx_ISR(hspi); - } -} - -/** - * @brief Handle the data 16-bit transmit in Interrupt mode. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi) -{ - /* Transmit data in 16 Bit mode */ - hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); - hspi->pTxBuffPtr += sizeof(uint16_t); - hspi->TxXferCount--; - - if (hspi->TxXferCount == 0U) - { -#if (USE_SPI_CRC != 0U) - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - /* Enable CRC Transmission */ - SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); - } -#endif /* USE_SPI_CRC */ - SPI_CloseTx_ISR(hspi); - } -} - -/** - * @brief Handle SPI Communication Timeout. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param Flag SPI flag to check - * @param State flag state to check - * @param Timeout Timeout duration - * @param Tickstart tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, - uint32_t Timeout, uint32_t Tickstart) -{ - __IO uint32_t count; - uint32_t tmp_timeout; - uint32_t tmp_tickstart; - - /* Adjust Timeout value in case of end of transfer */ - tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); - tmp_tickstart = HAL_GetTick(); - - /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ - count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); - - while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) - { - if (Timeout != HAL_MAX_DELAY) - { - if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) - { - /* Disable the SPI and reset the CRC: the CRC value should be cleared - on both master and slave sides in order to resynchronize the master - and slave for their respective CRC calculation */ - - /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ - __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); - - if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - { - /* Disable SPI peripheral */ - __HAL_SPI_DISABLE(hspi); - } - - /* Reset CRC Calculation */ - if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - { - SPI_RESET_CRC(hspi); - } - - hspi->State = HAL_SPI_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hspi); - - return HAL_TIMEOUT; - } - /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ - if (count == 0U) - { - tmp_timeout = 0U; - } - count--; - } - } - - return HAL_OK; -} - -/** - * @brief Handle the check of the RX transaction complete. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @param Timeout Timeout duration - * @param Tickstart tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) -{ - if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - { - /* Disable SPI peripheral */ - __HAL_SPI_DISABLE(hspi); - } - - /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */ - if (hspi->Init.Mode == SPI_MODE_MASTER) - { - if (hspi->Init.Direction != SPI_DIRECTION_2LINES_RXONLY) - { - /* Control the BSY flag */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - return HAL_TIMEOUT; - } - } - else - { - /* Wait the RXNE reset */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - return HAL_TIMEOUT; - } - } - } - else - { - /* Wait the RXNE reset */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -/** - * @brief Handle the check of the RXTX or TX transaction complete. - * @param hspi SPI handle - * @param Timeout Timeout duration - * @param Tickstart tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) -{ - /* Timeout in µs */ - __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); - /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */ - if (hspi->Init.Mode == SPI_MODE_MASTER) - { - /* Control the BSY flag */ - if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - return HAL_TIMEOUT; - } - } - else - { - /* Wait BSY flag during 1 Byte time transfer in case of Full-Duplex and Tx transfer - * If Timeout is reached, the transfer is considered as finish. - * User have to calculate the timeout value to fit with the time of 1 byte transfer. - * This time is directly link with the SPI clock from Master device. - */ - do - { - if (count == 0U) - { - break; - } - count--; - } while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET); - } - - return HAL_OK; -} - -/** - * @brief Handle the end of the RXTX transaction. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi) -{ - uint32_t tickstart; - __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); - - /* Init tickstart for timeout management */ - tickstart = HAL_GetTick(); - - /* Disable ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); - - /* Wait until TXE flag is set */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - break; - } - count--; - } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET); - - /* Check the end of the transaction */ - if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - } - - /* Clear overrun flag in 2 Lines communication mode because received is not read */ - if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - { - __HAL_SPI_CLEAR_OVRFLAG(hspi); - } - -#if (USE_SPI_CRC != 0U) - /* Check if CRC error occurred */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) - { - hspi->State = HAL_SPI_STATE_READY; - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - __HAL_SPI_CLEAR_CRCERRFLAG(hspi); - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - else - { -#endif /* USE_SPI_CRC */ - if (hspi->ErrorCode == HAL_SPI_ERROR_NONE) - { - if (hspi->State == HAL_SPI_STATE_BUSY_RX) - { - hspi->State = HAL_SPI_STATE_READY; - /* Call user Rx complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->RxCpltCallback(hspi); -#else - HAL_SPI_RxCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - else - { - hspi->State = HAL_SPI_STATE_READY; - /* Call user TxRx complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->TxRxCpltCallback(hspi); -#else - HAL_SPI_TxRxCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - } - else - { - hspi->State = HAL_SPI_STATE_READY; - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } -#if (USE_SPI_CRC != 0U) - } -#endif /* USE_SPI_CRC */ -} - -/** - * @brief Handle the end of the RX transaction. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi) -{ - /* Disable RXNE and ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); - - /* Check the end of the transaction */ - if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - } - - /* Clear overrun flag in 2 Lines communication mode because received is not read */ - if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - { - __HAL_SPI_CLEAR_OVRFLAG(hspi); - } - hspi->State = HAL_SPI_STATE_READY; - -#if (USE_SPI_CRC != 0U) - /* Check if CRC error occurred */ - if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); - __HAL_SPI_CLEAR_CRCERRFLAG(hspi); - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - else - { -#endif /* USE_SPI_CRC */ - if (hspi->ErrorCode == HAL_SPI_ERROR_NONE) - { - /* Call user Rx complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->RxCpltCallback(hspi); -#else - HAL_SPI_RxCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - else - { - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } -#if (USE_SPI_CRC != 0U) - } -#endif /* USE_SPI_CRC */ -} - -/** - * @brief Handle the end of the TX transaction. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi) -{ - uint32_t tickstart; - __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - /* Wait until TXE flag is set */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - break; - } - count--; - } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET); - - /* Disable TXE and ERR interrupt */ - __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); - - /* Check the end of the transaction */ - if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - } - - /* Clear overrun flag in 2 Lines communication mode because received is not read */ - if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - { - __HAL_SPI_CLEAR_OVRFLAG(hspi); - } - - hspi->State = HAL_SPI_STATE_READY; - if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - { - /* Call user error callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->ErrorCallback(hspi); -#else - HAL_SPI_ErrorCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } - else - { - /* Call user Rx complete callback */ -#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) - hspi->TxCpltCallback(hspi); -#else - HAL_SPI_TxCpltCallback(hspi); -#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ - } -} - -/** - * @brief Handle abort a Rx transaction. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi) -{ - __IO uint32_t tmpreg = 0U; - __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); - - /* Wait until TXE flag is set */ - do - { - if (count == 0U) - { - SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); - break; - } - count--; - } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET); - - /* Disable SPI Peripheral */ - __HAL_SPI_DISABLE(hspi); - - /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */ - CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE)); - - /* Flush Data Register by a blank read */ - tmpreg = READ_REG(hspi->Instance->DR); - /* To avoid GCC warning */ - UNUSED(tmpreg); - - hspi->State = HAL_SPI_STATE_ABORT; -} - -/** - * @brief Handle abort a Tx or Rx/Tx transaction. - * @param hspi pointer to a SPI_HandleTypeDef structure that contains - * the configuration information for SPI module. - * @retval None - */ -static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi) -{ - /* Disable TXEIE interrupt */ - CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE)); - - /* Disable SPI Peripheral */ - __HAL_SPI_DISABLE(hspi); - - hspi->State = HAL_SPI_STATE_ABORT; -} - -/** - * @} - */ - -#endif /* HAL_SPI_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - diff --git a/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c b/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c deleted file mode 100644 index 36b7317..0000000 --- a/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c +++ /dev/null @@ -1,3751 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_uart.c - * @author MCD Application Team - * @brief UART HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State and Errors functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The UART HAL driver can be used as follows: - - (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart). - (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API: - (##) Enable the USARTx interface clock. - (##) UART pins configuration: - (+++) Enable the clock for the UART GPIOs. - (+++) Configure the UART TX/RX pins as alternate function pull-up. - (##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT() - and HAL_UART_Receive_IT() APIs): - (+++) Configure the USARTx interrupt priority. - (+++) Enable the NVIC USART IRQ handle. - (##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA() - and HAL_UART_Receive_DMA() APIs): - (+++) Declare a DMA handle structure for the Tx/Rx stream. - (+++) Enable the DMAx interface clock. - (+++) Configure the declared DMA handle structure with the required - Tx/Rx parameters. - (+++) Configure the DMA Tx/Rx stream. - (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle. - (+++) Configure the priority and enable the NVIC for the transfer complete - interrupt on the DMA Tx/Rx stream. - (+++) Configure the USARTx interrupt priority and enable the NVIC USART IRQ handle - (used for last byte sending completion detection in DMA non circular mode) - - (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware - flow control and Mode(Receiver/Transmitter) in the huart Init structure. - - (#) For the UART asynchronous mode, initialize the UART registers by calling - the HAL_UART_Init() API. - - (#) For the UART Half duplex mode, initialize the UART registers by calling - the HAL_HalfDuplex_Init() API. - - (#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API. - - (#) For the Multi-Processor mode, initialize the UART registers by calling - the HAL_MultiProcessor_Init() API. - - [..] - (@) The specific UART interrupts (Transmission complete interrupt, - RXNE interrupt and Error Interrupts) will be managed using the macros - __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit - and receive process. - - [..] - (@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the - low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customized - HAL_UART_MspInit() API. - - ##### Callback registration ##### - ================================== - - [..] - The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1 - allows the user to configure dynamically the driver callbacks. - - [..] - Use Function HAL_UART_RegisterCallback() to register a user callback. - Function HAL_UART_RegisterCallback() allows to register following callbacks: - (+) TxHalfCpltCallback : Tx Half Complete Callback. - (+) TxCpltCallback : Tx Complete Callback. - (+) RxHalfCpltCallback : Rx Half Complete Callback. - (+) RxCpltCallback : Rx Complete Callback. - (+) ErrorCallback : Error Callback. - (+) AbortCpltCallback : Abort Complete Callback. - (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. - (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. - (+) MspInitCallback : UART MspInit. - (+) MspDeInitCallback : UART MspDeInit. - This function takes as parameters the HAL peripheral handle, the Callback ID - and a pointer to the user callback function. - - [..] - Use function HAL_UART_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. - HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, - and the Callback ID. - This function allows to reset following callbacks: - (+) TxHalfCpltCallback : Tx Half Complete Callback. - (+) TxCpltCallback : Tx Complete Callback. - (+) RxHalfCpltCallback : Rx Half Complete Callback. - (+) RxCpltCallback : Rx Complete Callback. - (+) ErrorCallback : Error Callback. - (+) AbortCpltCallback : Abort Complete Callback. - (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. - (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. - (+) MspInitCallback : UART MspInit. - (+) MspDeInitCallback : UART MspDeInit. - - [..] - For specific callback RxEventCallback, use dedicated registration/reset functions: - respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback(). - - [..] - By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: - examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback(). - Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_UART_Init() - and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit() - keep and use the user MspInit/MspDeInit callbacks (registered beforehand). - - [..] - Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only. - Exception done MspInit/MspDeInit that can be registered/unregistered - in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user) - MspInit/DeInit callbacks can be used during the Init/DeInit. - In that case first register the MspInit/MspDeInit user callbacks - using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit() - or HAL_UART_Init() function. - - [..] - When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. - - [..] - Three operation modes are available within this driver : - - *** Polling mode IO operation *** - ================================= - [..] - (+) Send an amount of data in blocking mode using HAL_UART_Transmit() - (+) Receive an amount of data in blocking mode using HAL_UART_Receive() - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT() - (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can - add his own code by customization of function pointer HAL_UART_TxCpltCallback - (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT() - (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can - add his own code by customization of function pointer HAL_UART_RxCpltCallback - (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_UART_ErrorCallback - - *** DMA mode IO operation *** - ============================== - [..] - (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA() - (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can - add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback - (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can - add his own code by customization of function pointer HAL_UART_TxCpltCallback - (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA() - (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can - add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback - (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can - add his own code by customization of function pointer HAL_UART_RxCpltCallback - (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_UART_ErrorCallback - (+) Pause the DMA Transfer using HAL_UART_DMAPause() - (+) Resume the DMA Transfer using HAL_UART_DMAResume() - (+) Stop the DMA Transfer using HAL_UART_DMAStop() - - - [..] This subsection also provides a set of additional functions providing enhanced reception - services to user. (For example, these functions allow application to handle use cases - where number of data to be received is unknown). - - (#) Compared to standard reception services which only consider number of received - data elements as reception completion criteria, these functions also consider additional events - as triggers for updating reception status to caller : - (+) Detection of inactivity period (RX line has not been active for a given period). - (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state) - for 1 frame time, after last received byte. - - (#) There are two mode of transfer: - (+) Blocking mode: The reception is performed in polling mode, until either expected number of data is received, - or till IDLE event occurs. Reception is handled only during function execution. - When function exits, no data reception could occur. HAL status and number of actually received data elements, - are returned by function after finishing transfer. - (+) Non-Blocking mode: The reception is performed using Interrupts or DMA. - These API's return the HAL status. - The end of the data processing will be indicated through the - dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode. - The HAL_UARTEx_RxEventCallback() user callback will be executed during Receive process - The HAL_UART_ErrorCallback()user callback will be executed when a reception error is detected. - - (#) Blocking mode API: - (+) HAL_UARTEx_ReceiveToIdle() - - (#) Non-Blocking mode API with Interrupt: - (+) HAL_UARTEx_ReceiveToIdle_IT() - - (#) Non-Blocking mode API with DMA: - (+) HAL_UARTEx_ReceiveToIdle_DMA() - - - *** UART HAL driver macros list *** - ============================================= - [..] - Below the list of most used macros in UART HAL driver. - - (+) __HAL_UART_ENABLE: Enable the UART peripheral - (+) __HAL_UART_DISABLE: Disable the UART peripheral - (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not - (+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag - (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt - (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt - (+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not - - [..] - (@) You can refer to the UART HAL driver header file for more useful macros - - @endverbatim - [..] - (@) Additional remark: If the parity is enabled, then the MSB bit of the data written - in the data register is transmitted but is changed by the parity bit. - Depending on the frame length defined by the M bit (8-bits or 9-bits), - the possible UART frame formats are as listed in the following table: - +-------------------------------------------------------------+ - | M bit | PCE bit | UART frame | - |---------------------|---------------------------------------| - | 0 | 0 | | SB | 8 bit data | STB | | - |---------|-----------|---------------------------------------| - | 0 | 1 | | SB | 7 bit data | PB | STB | | - |---------|-----------|---------------------------------------| - | 1 | 0 | | SB | 9 bit data | STB | | - |---------|-----------|---------------------------------------| - | 1 | 1 | | SB | 8 bit data | PB | STB | | - +-------------------------------------------------------------+ - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f4xx_hal.h" - -/** @addtogroup STM32F4xx_HAL_Driver - * @{ - */ - -/** @defgroup UART UART - * @brief HAL UART module driver - * @{ - */ -#ifdef HAL_UART_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @addtogroup UART_Private_Constants - * @{ - */ -/** - * @} - */ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup UART_Private_Functions UART Private Functions - * @{ - */ - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) -void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart); -static void UART_EndRxTransfer(UART_HandleTypeDef *huart); -static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); -static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); -static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); -static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); -static void UART_DMAError(DMA_HandleTypeDef *hdma); -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma); -static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma); -static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart); -static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart); -static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart); -static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, - uint32_t Tickstart, uint32_t Timeout); -static void UART_SetConfig(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/* Exported functions ---------------------------------------------------------*/ -/** @defgroup UART_Exported_Functions UART Exported Functions - * @{ - */ - -/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and Configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the USARTx or the UARTy - in asynchronous mode. - (+) For the asynchronous mode only these parameters can be configured: - (++) Baud Rate - (++) Word Length - (++) Stop Bit - (++) Parity: If the parity is enabled, then the MSB bit of the data written - in the data register is transmitted but is changed by the parity bit. - Depending on the frame length defined by the M bit (8-bits or 9-bits), - please refer to Reference manual for possible UART frame formats. - (++) Hardware flow control - (++) Receiver/transmitter modes - (++) Over Sampling Method - [..] - The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs - follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor configuration - procedures (details for the procedures are available in reference manual - (RM0430 for STM32F4X3xx MCUs and RM0402 for STM32F412xx MCUs - RM0383 for STM32F411xC/E MCUs and RM0401 for STM32F410xx MCUs - RM0090 for STM32F4X5xx/STM32F4X7xx/STM32F429xx/STM32F439xx MCUs - RM0390 for STM32F446xx MCUs and RM0386 for STM32F469xx/STM32F479xx MCUs)). - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the UART mode according to the specified parameters in - * the UART_InitTypeDef and create the associated handle. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if (huart == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE) - { - /* The hardware flow control is available only for USART1, USART2, USART3 and USART6. - Except for STM32F446xx devices, that is available for USART1, USART2, USART3, USART6, UART4 and UART5. - */ - assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance)); - assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl)); - } - else - { - assert_param(IS_UART_INSTANCE(huart->Instance)); - } - assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); - assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); - - if (huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - UART_InitCallbacksToDefault(huart); - - if (huart->MspInitCallback == NULL) - { - huart->MspInitCallback = HAL_UART_MspInit; - } - - /* Init the low level hardware */ - huart->MspInitCallback(huart); -#else - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - UART_SetConfig(huart); - - /* In asynchronous mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - - /* Enable the peripheral */ - __HAL_UART_ENABLE(huart); - - /* Initialize the UART state */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Initializes the half-duplex mode according to the specified - * parameters in the UART_InitTypeDef and create the associated handle. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if (huart == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance)); - assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); - assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); - - if (huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - UART_InitCallbacksToDefault(huart); - - if (huart->MspInitCallback == NULL) - { - huart->MspInitCallback = HAL_UART_MspInit; - } - - /* Init the low level hardware */ - huart->MspInitCallback(huart); -#else - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - UART_SetConfig(huart); - - /* In half-duplex mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); - - /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); - - /* Enable the peripheral */ - __HAL_UART_ENABLE(huart); - - /* Initialize the UART state*/ - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Initializes the LIN mode according to the specified - * parameters in the UART_InitTypeDef and create the associated handle. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param BreakDetectLength Specifies the LIN break detection length. - * This parameter can be one of the following values: - * @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection - * @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection - * @retval HAL status - */ -HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) -{ - /* Check the UART handle allocation */ - if (huart == NULL) - { - return HAL_ERROR; - } - - /* Check the LIN UART instance */ - assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); - - /* Check the Break detection length parameter */ - assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength)); - assert_param(IS_UART_LIN_WORD_LENGTH(huart->Init.WordLength)); - assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling)); - - if (huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - UART_InitCallbacksToDefault(huart); - - if (huart->MspInitCallback == NULL) - { - huart->MspInitCallback = HAL_UART_MspInit; - } - - /* Init the low level hardware */ - huart->MspInitCallback(huart); -#else - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - UART_SetConfig(huart); - - /* In LIN mode, the following bits must be kept cleared: - - CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); - - /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ - SET_BIT(huart->Instance->CR2, USART_CR2_LINEN); - - /* Set the USART LIN Break detection length. */ - CLEAR_BIT(huart->Instance->CR2, USART_CR2_LBDL); - SET_BIT(huart->Instance->CR2, BreakDetectLength); - - /* Enable the peripheral */ - __HAL_UART_ENABLE(huart); - - /* Initialize the UART state*/ - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Initializes the Multi-Processor mode according to the specified - * parameters in the UART_InitTypeDef and create the associated handle. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param Address USART address - * @param WakeUpMethod specifies the USART wake-up method. - * This parameter can be one of the following values: - * @arg UART_WAKEUPMETHOD_IDLELINE: Wake-up by an idle line detection - * @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wake-up by an address mark - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod) -{ - /* Check the UART handle allocation */ - if (huart == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_UART_INSTANCE(huart->Instance)); - - /* Check the Address & wake up method parameters */ - assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod)); - assert_param(IS_UART_ADDRESS(Address)); - assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); - assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); - - if (huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - UART_InitCallbacksToDefault(huart); - - if (huart->MspInitCallback == NULL) - { - huart->MspInitCallback = HAL_UART_MspInit; - } - - /* Init the low level hardware */ - huart->MspInitCallback(huart); -#else - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - UART_SetConfig(huart); - - /* In Multi-Processor mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register */ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - - /* Set the USART address node */ - CLEAR_BIT(huart->Instance->CR2, USART_CR2_ADD); - SET_BIT(huart->Instance->CR2, Address); - - /* Set the wake up method by setting the WAKE bit in the CR1 register */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_WAKE); - SET_BIT(huart->Instance->CR1, WakeUpMethod); - - /* Enable the peripheral */ - __HAL_UART_ENABLE(huart); - - /* Initialize the UART state */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitializes the UART peripheral. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if (huart == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_UART_INSTANCE(huart->Instance)); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - if (huart->MspDeInitCallback == NULL) - { - huart->MspDeInitCallback = HAL_UART_MspDeInit; - } - /* DeInit the low level hardware */ - huart->MspDeInitCallback(huart); -#else - /* DeInit the low level hardware */ - HAL_UART_MspDeInit(huart); -#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_RESET; - huart->RxState = HAL_UART_STATE_RESET; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* Process Unlock */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief UART MSP Init. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_MspInit could be implemented in the user file - */ -} - -/** - * @brief UART MSP DeInit. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_MspDeInit could be implemented in the user file - */ -} - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) -/** - * @brief Register a User UART Callback - * To be used instead of the weak predefined callback - * @param huart uart handle - * @param CallbackID ID of the callback to be registered - * This parameter can be one of the following values: - * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID - * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID - * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID - * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID - * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID - * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID - * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID - * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID - * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID - * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID - * @param pCallback pointer to the Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, - pUART_CallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) - { - switch (CallbackID) - { - case HAL_UART_TX_HALFCOMPLETE_CB_ID : - huart->TxHalfCpltCallback = pCallback; - break; - - case HAL_UART_TX_COMPLETE_CB_ID : - huart->TxCpltCallback = pCallback; - break; - - case HAL_UART_RX_HALFCOMPLETE_CB_ID : - huart->RxHalfCpltCallback = pCallback; - break; - - case HAL_UART_RX_COMPLETE_CB_ID : - huart->RxCpltCallback = pCallback; - break; - - case HAL_UART_ERROR_CB_ID : - huart->ErrorCallback = pCallback; - break; - - case HAL_UART_ABORT_COMPLETE_CB_ID : - huart->AbortCpltCallback = pCallback; - break; - - case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : - huart->AbortTransmitCpltCallback = pCallback; - break; - - case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : - huart->AbortReceiveCpltCallback = pCallback; - break; - - case HAL_UART_MSPINIT_CB_ID : - huart->MspInitCallback = pCallback; - break; - - case HAL_UART_MSPDEINIT_CB_ID : - huart->MspDeInitCallback = pCallback; - break; - - default : - /* Update the error code */ - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else if (huart->gState == HAL_UART_STATE_RESET) - { - switch (CallbackID) - { - case HAL_UART_MSPINIT_CB_ID : - huart->MspInitCallback = pCallback; - break; - - case HAL_UART_MSPDEINIT_CB_ID : - huart->MspDeInitCallback = pCallback; - break; - - default : - /* Update the error code */ - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(huart); - - return status; -} - -/** - * @brief Unregister an UART Callback - * UART callaback is redirected to the weak predefined callback - * @param huart uart handle - * @param CallbackID ID of the callback to be unregistered - * This parameter can be one of the following values: - * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID - * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID - * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID - * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID - * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID - * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID - * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID - * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID - * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID - * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(huart); - - if (HAL_UART_STATE_READY == huart->gState) - { - switch (CallbackID) - { - case HAL_UART_TX_HALFCOMPLETE_CB_ID : - huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ - break; - - case HAL_UART_TX_COMPLETE_CB_ID : - huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */ - break; - - case HAL_UART_RX_HALFCOMPLETE_CB_ID : - huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ - break; - - case HAL_UART_RX_COMPLETE_CB_ID : - huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */ - break; - - case HAL_UART_ERROR_CB_ID : - huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ - break; - - case HAL_UART_ABORT_COMPLETE_CB_ID : - huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ - break; - - case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : - huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */ - break; - - case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : - huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */ - break; - - case HAL_UART_MSPINIT_CB_ID : - huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */ - break; - - case HAL_UART_MSPDEINIT_CB_ID : - huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */ - break; - - default : - /* Update the error code */ - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else if (HAL_UART_STATE_RESET == huart->gState) - { - switch (CallbackID) - { - case HAL_UART_MSPINIT_CB_ID : - huart->MspInitCallback = HAL_UART_MspInit; - break; - - case HAL_UART_MSPDEINIT_CB_ID : - huart->MspDeInitCallback = HAL_UART_MspDeInit; - break; - - default : - /* Update the error code */ - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(huart); - - return status; -} - -/** - * @brief Register a User UART Rx Event Callback - * To be used instead of the weak predefined callback - * @param huart Uart handle - * @param pCallback Pointer to the Rx Event Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) - { - huart->RxEventCallback = pCallback; - } - else - { - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(huart); - - return status; -} - -/** - * @brief UnRegister the UART Rx Event Callback - * UART Rx Event Callback is redirected to the weak HAL_UARTEx_RxEventCallback() predefined callback - * @param huart Uart handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) - { - huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */ - } - else - { - huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; - - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(huart); - return status; -} -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group2 IO operation functions - * @brief UART Transmit and Receive functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - This subsection provides a set of functions allowing to manage the UART asynchronous - and Half duplex data transfers. - - (#) There are two modes of transfer: - (+) Blocking mode: The communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (+) Non-Blocking mode: The communication is performed using Interrupts - or DMA, these API's return the HAL status. - The end of the data processing will be indicated through the - dedicated UART IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks - will be executed respectively at the end of the transmit or receive process - The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected. - - (#) Blocking mode API's are : - (+) HAL_UART_Transmit() - (+) HAL_UART_Receive() - - (#) Non-Blocking mode API's with Interrupt are : - (+) HAL_UART_Transmit_IT() - (+) HAL_UART_Receive_IT() - (+) HAL_UART_IRQHandler() - - (#) Non-Blocking mode API's with DMA are : - (+) HAL_UART_Transmit_DMA() - (+) HAL_UART_Receive_DMA() - (+) HAL_UART_DMAPause() - (+) HAL_UART_DMAResume() - (+) HAL_UART_DMAStop() - - (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode: - (+) HAL_UART_TxHalfCpltCallback() - (+) HAL_UART_TxCpltCallback() - (+) HAL_UART_RxHalfCpltCallback() - (+) HAL_UART_RxCpltCallback() - (+) HAL_UART_ErrorCallback() - - (#) Non-Blocking mode transfers could be aborted using Abort API's : - (+) HAL_UART_Abort() - (+) HAL_UART_AbortTransmit() - (+) HAL_UART_AbortReceive() - (+) HAL_UART_Abort_IT() - (+) HAL_UART_AbortTransmit_IT() - (+) HAL_UART_AbortReceive_IT() - - (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: - (+) HAL_UART_AbortCpltCallback() - (+) HAL_UART_AbortTransmitCpltCallback() - (+) HAL_UART_AbortReceiveCpltCallback() - - (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced reception services: - (+) HAL_UARTEx_RxEventCallback() - - (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. - Errors are handled as follows : - (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is - to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception . - Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type, - and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side. - If user wants to abort it, Abort services should be called by user. - (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. - This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. - Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed. - - -@- In the Half duplex communication, it is forbidden to run the transmit - and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. - -@endverbatim - * @{ - */ - -/** - * @brief Sends an amount of data in blocking mode. - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), - * the sent data is handled as a set of u16. In this case, Size must indicate the number - * of u16 provided through pData. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - const uint8_t *pdata8bits; - const uint16_t *pdata16bits; - uint32_t tickstart = 0U; - - /* Check that a Tx process is not already ongoing */ - if (huart->gState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - - /* Init tickstart for timeout management */ - tickstart = HAL_GetTick(); - - huart->TxXferSize = Size; - huart->TxXferCount = Size; - - /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - pdata8bits = NULL; - pdata16bits = (const uint16_t *) pData; - } - else - { - pdata8bits = pData; - pdata16bits = NULL; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - while (huart->TxXferCount > 0U) - { - if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if (pdata8bits == NULL) - { - huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - pdata16bits++; - } - else - { - huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - pdata8bits++; - } - huart->TxXferCount--; - } - - if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receives an amount of data in blocking mode. - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), - * the received data is handled as a set of u16. In this case, Size must indicate the number - * of u16 available through pData. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be received. - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint8_t *pdata8bits; - uint16_t *pdata16bits; - uint32_t tickstart = 0U; - - /* Check that a Rx process is not already ongoing */ - if (huart->RxState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* Init tickstart for timeout management */ - tickstart = HAL_GetTick(); - - huart->RxXferSize = Size; - huart->RxXferCount = Size; - - /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - pdata8bits = NULL; - pdata16bits = (uint16_t *) pData; - } - else - { - pdata8bits = pData; - pdata16bits = NULL; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Check the remain data to be received */ - while (huart->RxXferCount > 0U) - { - if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if (pdata8bits == NULL) - { - *pdata16bits = (uint16_t)(huart->Instance->DR & 0x01FF); - pdata16bits++; - } - else - { - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - } - else - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - } - pdata8bits++; - } - huart->RxXferCount--; - } - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Sends an amount of data in non blocking mode. - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), - * the sent data is handled as a set of u16. In this case, Size must indicate the number - * of u16 provided through pData. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) -{ - /* Check that a Tx process is not already ongoing */ - if (huart->gState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pTxBuffPtr = pData; - huart->TxXferSize = Size; - huart->TxXferCount = Size; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the UART Transmit data register empty Interrupt */ - __HAL_UART_ENABLE_IT(huart, UART_IT_TXE); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receives an amount of data in non blocking mode. - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), - * the received data is handled as a set of u16. In this case, Size must indicate the number - * of u16 available through pData. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be received. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Rx process is not already ongoing */ - if (huart->RxState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - /* Set Reception type to Standard reception */ - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - return (UART_Start_Receive_IT(huart, pData, Size)); - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Sends an amount of data in DMA mode. - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), - * the sent data is handled as a set of u16. In this case, Size must indicate the number - * of u16 provided through pData. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) -{ - const uint32_t *tmp; - - /* Check that a Tx process is not already ongoing */ - if (huart->gState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pTxBuffPtr = pData; - huart->TxXferSize = Size; - huart->TxXferCount = Size; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - - /* Set the UART DMA transfer complete callback */ - huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; - - /* Set the UART DMA Half transfer complete callback */ - huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; - - /* Set the DMA error callback */ - huart->hdmatx->XferErrorCallback = UART_DMAError; - - /* Set the DMA abort callback */ - huart->hdmatx->XferAbortCallback = NULL; - - /* Enable the UART transmit DMA stream */ - tmp = (const uint32_t *)&pData; - HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size); - - /* Clear the TC flag in the SR register by writing 0 to it */ - __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the UART CR3 register */ - ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receives an amount of data in DMA mode. - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), - * the received data is handled as a set of u16. In this case, Size must indicate the number - * of u16 available through pData. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be received. - * @note When the UART parity is enabled (PCE = 1) the received data contains the parity bit. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Rx process is not already ongoing */ - if (huart->RxState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - /* Set Reception type to Standard reception */ - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - return (UART_Start_Receive_DMA(huart, pData, Size)); - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Pauses the DMA Transfer. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart) -{ - uint32_t dmarequest = 0x00U; - - /* Process Locked */ - __HAL_LOCK(huart); - - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); - if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) - { - /* Disable the UART DMA Tx request */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - } - - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) - { - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Rx request */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Resumes the DMA Transfer. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - /* Enable the UART DMA Tx request */ - ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - } - - if (huart->RxState == HAL_UART_STATE_BUSY_RX) - { - /* Clear the Overrun flag before resuming the Rx transfer*/ - __HAL_UART_CLEAR_OREFLAG(huart); - - /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */ - if (huart->Init.Parity != UART_PARITY_NONE) - { - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - } - ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Enable the UART DMA Rx request */ - ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Stops the DMA Transfer. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) -{ - uint32_t dmarequest = 0x00U; - /* The Lock is not implemented on this API to allow the user application - to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback(): - when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated - and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() - */ - - /* Stop UART DMA Tx request if ongoing */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); - if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx stream */ - if (huart->hdmatx != NULL) - { - HAL_DMA_Abort(huart->hdmatx); - } - UART_EndTxTransfer(huart); - } - - /* Stop UART DMA Rx request if ongoing */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx stream */ - if (huart->hdmarx != NULL) - { - HAL_DMA_Abort(huart->hdmarx); - } - UART_EndRxTransfer(huart); - } - - return HAL_OK; -} - -/** - * @brief Receive an amount of data in blocking mode till either the expected number of data is received or an IDLE event occurs. - * @note HAL_OK is returned if reception is completed (expected number of data has been received) - * or if reception is stopped after IDLE event (less than the expected number of data has been received) - * In this case, RxLen output parameter indicates number of data available in reception buffer. - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01), - * the received data is handled as a set of uint16_t. In this case, Size must indicate the number - * of uint16_t available through pData. - * @param huart UART handle. - * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). - * @param Size Amount of data elements (uint8_t or uint16_t) to be received. - * @param RxLen Number of data elements finally received (could be lower than Size, in case reception ends on IDLE event) - * @param Timeout Timeout duration expressed in ms (covers the whole reception sequence). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, - uint32_t Timeout) -{ - uint8_t *pdata8bits; - uint16_t *pdata16bits; - uint32_t tickstart; - - /* Check that a Rx process is not already ongoing */ - if (huart->RxState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - __HAL_LOCK(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; - - /* Init tickstart for timeout management */ - tickstart = HAL_GetTick(); - - huart->RxXferSize = Size; - huart->RxXferCount = Size; - - /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - pdata8bits = NULL; - pdata16bits = (uint16_t *) pData; - } - else - { - pdata8bits = pData; - pdata16bits = NULL; - } - - __HAL_UNLOCK(huart); - - /* Initialize output number of received elements */ - *RxLen = 0U; - - /* as long as data have to be received */ - while (huart->RxXferCount > 0U) - { - /* Check if IDLE flag is set */ - if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - { - /* Clear IDLE flag in ISR */ - __HAL_UART_CLEAR_IDLEFLAG(huart); - - /* If Set, but no data ever received, clear flag without exiting loop */ - /* If Set, and data has already been received, this means Idle Event is valid : End reception */ - if (*RxLen > 0U) - { - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; - } - } - - /* Check if RXNE flag is set */ - if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE)) - { - if (pdata8bits == NULL) - { - *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - pdata16bits++; - } - else - { - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - } - else - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - } - - pdata8bits++; - } - /* Increment number of received elements */ - *RxLen += 1U; - huart->RxXferCount--; - } - - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - { - if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) - { - huart->RxState = HAL_UART_STATE_READY; - - return HAL_TIMEOUT; - } - } - } - - /* Set number of received elements in output parameter : RxLen */ - *RxLen = huart->RxXferSize - huart->RxXferCount; - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in interrupt mode till either the expected number of data is received or an IDLE event occurs. - * @note Reception is initiated by this function call. Further progress of reception is achieved thanks - * to UART interrupts raised by RXNE and IDLE events. Callback is called at end of reception indicating - * number of received data elements. - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01), - * the received data is handled as a set of uint16_t. In this case, Size must indicate the number - * of uint16_t available through pData. - * @param huart UART handle. - * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). - * @param Size Amount of data elements (uint8_t or uint16_t) to be received. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - HAL_StatusTypeDef status; - - /* Check that a Rx process is not already ongoing */ - if (huart->RxState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - __HAL_LOCK(huart); - - /* Set Reception type to reception till IDLE Event*/ - huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; - - status = UART_Start_Receive_IT(huart, pData, Size); - - /* Check Rx process has been successfully started */ - if (status == HAL_OK) - { - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - __HAL_UART_CLEAR_IDLEFLAG(huart); - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - } - else - { - /* In case of errors already pending when reception is started, - Interrupts may have already been raised and lead to reception abortion. - (Overrun error for instance). - In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ - status = HAL_ERROR; - } - } - - return status; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in DMA mode till either the expected number of data is received or an IDLE event occurs. - * @note Reception is initiated by this function call. Further progress of reception is achieved thanks - * to DMA services, transferring automatically received data elements in user reception buffer and - * calling registered callbacks at half/end of reception. UART IDLE events are also used to consider - * reception phase as ended. In all cases, callback execution will indicate number of received data elements. - * @note When the UART parity is enabled (PCE = 1), the received data contain - * the parity bit (MSB position). - * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01), - * the received data is handled as a set of uint16_t. In this case, Size must indicate the number - * of uint16_t available through pData. - * @param huart UART handle. - * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). - * @param Size Amount of data elements (uint8_t or uint16_t) to be received. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - HAL_StatusTypeDef status; - - /* Check that a Rx process is not already ongoing */ - if (huart->RxState == HAL_UART_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - __HAL_LOCK(huart); - - /* Set Reception type to reception till IDLE Event*/ - huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; - - status = UART_Start_Receive_DMA(huart, pData, Size); - - /* Check Rx process has been successfully started */ - if (status == HAL_OK) - { - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - __HAL_UART_CLEAR_IDLEFLAG(huart); - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - } - else - { - /* In case of errors already pending when reception is started, - Interrupts may have already been raised and lead to reception abortion. - (Overrun error for instance). - In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ - status = HAL_ERROR; - } - } - - return status; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Abort ongoing transfers (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx and Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); - } - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx stream: use blocking DMA Abort API (no callback) */ - if (huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = NULL; - - if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) - { - if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) - { - /* Set error code to DMA */ - huart->ErrorCode = HAL_UART_ERROR_DMA; - - return HAL_TIMEOUT; - } - } - } - } - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx stream: use blocking DMA Abort API (no callback) */ - if (huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = NULL; - - if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) - { - if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) - { - /* Set error code to DMA */ - huart->ErrorCode = HAL_UART_ERROR_DMA; - - return HAL_TIMEOUT; - } - } - } - } - - /* Reset Tx and Rx transfer counters */ - huart->TxXferCount = 0x00U; - huart->RxXferCount = 0x00U; - - /* Reset ErrorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Restore huart->RxState and huart->gState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - huart->gState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - return HAL_OK; -} - -/** - * @brief Abort ongoing Transmit transfer (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx stream : use blocking DMA Abort API (no callback) */ - if (huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = NULL; - - if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) - { - if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) - { - /* Set error code to DMA */ - huart->ErrorCode = HAL_UART_ERROR_DMA; - - return HAL_TIMEOUT; - } - } - } - } - - /* Reset Tx transfer counter */ - huart->TxXferCount = 0x00U; - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Abort ongoing Receive transfer (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); - } - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx stream : use blocking DMA Abort API (no callback) */ - if (huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = NULL; - - if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) - { - if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) - { - /* Set error code to DMA */ - huart->ErrorCode = HAL_UART_ERROR_DMA; - - return HAL_TIMEOUT; - } - } - } - } - - /* Reset Rx transfer counter */ - huart->RxXferCount = 0x00U; - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - return HAL_OK; -} - -/** - * @brief Abort ongoing transfers (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx and Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) -{ - uint32_t AbortCplt = 0x01U; - - /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); - } - - /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised - before any call to DMA Abort functions */ - /* DMA Tx Handle is valid */ - if (huart->hdmatx != NULL) - { - /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. - Otherwise, set it to NULL */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; - } - else - { - huart->hdmatx->XferAbortCallback = NULL; - } - } - /* DMA Rx Handle is valid */ - if (huart->hdmarx != NULL) - { - /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. - Otherwise, set it to NULL */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; - } - else - { - huart->hdmarx->XferAbortCallback = NULL; - } - } - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - /* Disable DMA Tx at UART level */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx stream : use non blocking DMA Abort API (callback) */ - if (huart->hdmatx != NULL) - { - /* UART Tx DMA Abort callback has already been initialised : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - - /* Abort DMA TX */ - if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) - { - huart->hdmatx->XferAbortCallback = NULL; - } - else - { - AbortCplt = 0x00U; - } - } - } - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx stream : use non blocking DMA Abort API (callback) */ - if (huart->hdmarx != NULL) - { - /* UART Rx DMA Abort callback has already been initialised : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - - /* Abort DMA RX */ - if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - huart->hdmarx->XferAbortCallback = NULL; - AbortCplt = 0x01U; - } - else - { - AbortCplt = 0x00U; - } - } - } - - /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ - if (AbortCplt == 0x01U) - { - /* Reset Tx and Rx transfer counters */ - huart->TxXferCount = 0x00U; - huart->RxXferCount = 0x00U; - - /* Reset ErrorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* As no DMA to be aborted, call directly user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort complete callback */ - huart->AbortCpltCallback(huart); -#else - /* Call legacy weak Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - - return HAL_OK; -} - -/** - * @brief Abort ongoing Transmit transfer (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx stream : use blocking DMA Abort API (no callback) */ - if (huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback; - - /* Abort DMA TX */ - if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) - { - /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */ - huart->hdmatx->XferAbortCallback(huart->hdmatx); - } - } - else - { - /* Reset Tx transfer counter */ - huart->TxXferCount = 0x00U; - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort Transmit Complete Callback */ - huart->AbortTransmitCpltCallback(huart); -#else - /* Call legacy weak Abort Transmit Complete Callback */ - HAL_UART_AbortTransmitCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - } - else - { - /* Reset Tx transfer counter */ - huart->TxXferCount = 0x00U; - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort Transmit Complete Callback */ - huart->AbortTransmitCpltCallback(huart); -#else - /* Call legacy weak Abort Transmit Complete Callback */ - HAL_UART_AbortTransmitCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - - return HAL_OK; -} - -/** - * @brief Abort ongoing Receive transfer (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); - } - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx stream : use blocking DMA Abort API (no callback) */ - if (huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback; - - /* Abort DMA RX */ - if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - } - } - else - { - /* Reset Rx transfer counter */ - huart->RxXferCount = 0x00U; - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* As no DMA to be aborted, call directly user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort Receive Complete Callback */ - huart->AbortReceiveCpltCallback(huart); -#else - /* Call legacy weak Abort Receive Complete Callback */ - HAL_UART_AbortReceiveCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - } - else - { - /* Reset Rx transfer counter */ - huart->RxXferCount = 0x00U; - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* As no DMA to be aborted, call directly user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort Receive Complete Callback */ - huart->AbortReceiveCpltCallback(huart); -#else - /* Call legacy weak Abort Receive Complete Callback */ - HAL_UART_AbortReceiveCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - - return HAL_OK; -} - -/** - * @brief This function handles UART interrupt request. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) -{ - uint32_t isrflags = READ_REG(huart->Instance->SR); - uint32_t cr1its = READ_REG(huart->Instance->CR1); - uint32_t cr3its = READ_REG(huart->Instance->CR3); - uint32_t errorflags = 0x00U; - uint32_t dmarequest = 0x00U; - - /* If no error occurs */ - errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); - if (errorflags == RESET) - { - /* UART in mode Receiver -------------------------------------------------*/ - if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - { - UART_Receive_IT(huart); - return; - } - } - - /* If some errors occur */ - if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) - || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) - { - /* UART parity error interrupt occurred ----------------------------------*/ - if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - { - huart->ErrorCode |= HAL_UART_ERROR_PE; - } - - /* UART noise error interrupt occurred -----------------------------------*/ - if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - { - huart->ErrorCode |= HAL_UART_ERROR_NE; - } - - /* UART frame error interrupt occurred -----------------------------------*/ - if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - { - huart->ErrorCode |= HAL_UART_ERROR_FE; - } - - /* UART Over-Run interrupt occurred --------------------------------------*/ - if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) - || ((cr3its & USART_CR3_EIE) != RESET))) - { - huart->ErrorCode |= HAL_UART_ERROR_ORE; - } - - /* Call UART Error Call back function if need be --------------------------*/ - if (huart->ErrorCode != HAL_UART_ERROR_NONE) - { - /* UART in mode Receiver -----------------------------------------------*/ - if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - { - UART_Receive_IT(huart); - } - - /* If Overrun error occurs, or if any error occurs in DMA mode reception, - consider error as blocking */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) - { - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ - UART_EndRxTransfer(huart); - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx stream */ - if (huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - /* Call Directly XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - } - } - else - { - /* Call user error callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - } - else - { - /* Call user error callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - } - else - { - /* Non Blocking error : transfer could go on. - Error is notified to user through user error callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - - huart->ErrorCode = HAL_UART_ERROR_NONE; - } - } - return; - } /* End if some error occurs */ - - /* Check current reception Mode : - If Reception till IDLE event has been selected : */ - if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - && ((isrflags & USART_SR_IDLE) != 0U) - && ((cr1its & USART_SR_IDLE) != 0U)) - { - __HAL_UART_CLEAR_IDLEFLAG(huart); - - /* Check if DMA mode is enabled in UART */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - /* DMA mode enabled */ - /* Check received length : If all expected data are received, do nothing, - (DMA cplt callback will be called). - Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ - uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - if ((nb_remaining_rx_data > 0U) - && (nb_remaining_rx_data < huart->RxXferSize)) - { - /* Reception is not complete */ - huart->RxXferCount = nb_remaining_rx_data; - - /* In Normal mode, end DMA xfer and HAL UART Rx process*/ - if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - { - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the UART CR3 register */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - - /* Last bytes received, so no need as the abort is immediate */ - (void)HAL_DMA_Abort(huart->hdmarx); - } -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - return; - } - else - { - /* DMA mode not enabled */ - /* Check received length : If all expected data are received, do nothing. - Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ - uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - if ((huart->RxXferCount > 0U) - && (nb_rx_data > 0U)) - { - /* Disable the UART Parity Error Interrupt and RXNE interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx complete callback*/ - huart->RxEventCallback(huart, nb_rx_data); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, nb_rx_data); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - return; - } - } - - /* UART in mode Transmitter ------------------------------------------------*/ - if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) - { - UART_Transmit_IT(huart); - return; - } - - /* UART in mode Transmitter end --------------------------------------------*/ - if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - { - UART_EndTransmit_IT(huart); - return; - } -} - -/** - * @brief Tx Transfer completed callbacks. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_TxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Tx Half Transfer completed callbacks. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_TxHalfCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Rx Transfer completed callbacks. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_RxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Rx Half Transfer completed callbacks. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_RxHalfCpltCallback could be implemented in the user file - */ -} - -/** - * @brief UART error callbacks. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_ErrorCallback could be implemented in the user file - */ -} - -/** - * @brief UART Abort Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief UART Abort Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief UART Abort Receive Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Reception Event Callback (Rx event notification called after use of advanced reception service). - * @param huart UART handle - * @param Size Number of data available in application reception buffer (indicates a position in - * reception buffer until which, data are available) - * @retval None - */ -__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - UNUSED(Size); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_RxEventCallback can be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions - * @brief UART control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control the UART: - (+) HAL_LIN_SendBreak() API can be helpful to transmit the break character. - (+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode. - (+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software. - (+) HAL_HalfDuplex_EnableTransmitter() API to enable the UART transmitter and disables the UART receiver in Half Duplex mode - (+) HAL_HalfDuplex_EnableReceiver() API to enable the UART receiver and disables the UART transmitter in Half Duplex mode - -@endverbatim - * @{ - */ - -/** - * @brief Transmits break characters. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart) -{ - /* Check the parameters */ - assert_param(IS_UART_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Send break characters */ - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_SBK); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Enters the UART in mute mode. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart) -{ - /* Check the parameters */ - assert_param(IS_UART_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Enable the USART mute mode by setting the RWU bit in the CR1 register */ - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RWU); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Exits the UART mute mode: wake up software. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart) -{ - /* Check the parameters */ - assert_param(IS_UART_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Enables the UART transmitter and disables the UART receiver. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart) -{ - uint32_t tmpreg = 0x00U; - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /*-------------------------- USART CR1 Configuration -----------------------*/ - tmpreg = huart->Instance->CR1; - - /* Clear TE and RE bits */ - tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE)); - - /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ - tmpreg |= (uint32_t)USART_CR1_TE; - - /* Write to USART CR1 */ - WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Enables the UART receiver and disables the UART transmitter. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart) -{ - uint32_t tmpreg = 0x00U; - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /*-------------------------- USART CR1 Configuration -----------------------*/ - tmpreg = huart->Instance->CR1; - - /* Clear TE and RE bits */ - tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE)); - - /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ - tmpreg |= (uint32_t)USART_CR1_RE; - - /* Write to USART CR1 */ - WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions - * @brief UART State and Errors functions - * -@verbatim - ============================================================================== - ##### Peripheral State and Errors functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to return the State of - UART communication process, return Peripheral Errors occurred during communication - process - (+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral. - (+) HAL_UART_GetError() check in run-time errors that could be occurred during communication. - -@endverbatim - * @{ - */ - -/** - * @brief Returns the UART state. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL state - */ -HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart) -{ - uint32_t temp1 = 0x00U, temp2 = 0x00U; - temp1 = huart->gState; - temp2 = huart->RxState; - - return (HAL_UART_StateTypeDef)(temp1 | temp2); -} - -/** - * @brief Return the UART error code - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART. - * @retval UART Error Code - */ -uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart) -{ - return huart->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup UART_Private_Functions UART Private Functions - * @{ - */ - -/** - * @brief Initialize the callbacks to their default values. - * @param huart UART handle. - * @retval none - */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) -void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart) -{ - /* Init the UART Callback settings */ - huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ - huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */ - huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ - huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */ - huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ - huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ - huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */ - huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */ - huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */ - -} -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - -/** - * @brief DMA UART transmit process complete callback. - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - /* DMA Normal mode*/ - if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U) - { - huart->TxXferCount = 0x00U; - - /* Disable the DMA transfer for transmit request by setting the DMAT bit - in the UART CR3 register */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Enable the UART Transmit Complete Interrupt */ - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - - } - /* DMA Circular mode */ - else - { -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Tx complete callback*/ - huart->TxCpltCallback(huart); -#else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } -} - -/** - * @brief DMA UART transmit process half complete callback - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Tx complete callback*/ - huart->TxHalfCpltCallback(huart); -#else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxHalfCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA UART receive process complete callback. - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - /* DMA Normal mode*/ - if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U) - { - huart->RxXferCount = 0U; - - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the DMA transfer for the receiver request by setting the DMAR bit - in the UART CR3 register */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - } - } - - /* Check current reception Mode : - If Reception till IDLE event has been selected : use Rx Event callback */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - else - { - /* In other cases : use Rx Complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx complete callback*/ - huart->RxCpltCallback(huart); -#else - /*Call legacy weak Rx complete callback*/ - HAL_UART_RxCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } -} - -/** - * @brief DMA UART receive process half complete callback - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Check current reception Mode : - If Reception till IDLE event has been selected : use Rx Event callback */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize / 2U); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - else - { - /* In other cases : use Rx Half Complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Half complete callback*/ - huart->RxHalfCpltCallback(huart); -#else - /*Call legacy weak Rx Half complete callback*/ - HAL_UART_RxHalfCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } -} - -/** - * @brief DMA UART communication error callback. - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMAError(DMA_HandleTypeDef *hdma) -{ - uint32_t dmarequest = 0x00U; - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Stop UART DMA Tx request if ongoing */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); - if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) - { - huart->TxXferCount = 0x00U; - UART_EndTxTransfer(huart); - } - - /* Stop UART DMA Rx request if ongoing */ - dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) - { - huart->RxXferCount = 0x00U; - UART_EndRxTransfer(huart); - } - - huart->ErrorCode |= HAL_UART_ERROR_DMA; -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - -/** - * @brief This function handles UART Communication Timeout. It waits - * until a flag is no longer in the specified status. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @param Flag specifies the UART flag to check. - * @param Status The actual Flag status (SET or RESET). - * @param Tickstart Tick start value - * @param Timeout Timeout duration - * @retval HAL status - */ -static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, - uint32_t Tickstart, uint32_t Timeout) -{ - /* Wait until flag is set */ - while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - { - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - -/** - * @brief Start Receive operation in interrupt mode. - * @note This function could be called by all HAL UART API providing reception in Interrupt mode. - * @note When calling this function, parameters validity is considered as already checked, - * i.e. Rx State, buffer address, ... - * UART Handle is assumed as Locked. - * @param huart UART handle. - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be received. - * @retval HAL status - */ -HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - huart->pRxBuffPtr = pData; - huart->RxXferSize = Size; - huart->RxXferCount = Size; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - if (huart->Init.Parity != UART_PARITY_NONE) - { - /* Enable the UART Parity Error Interrupt */ - __HAL_UART_ENABLE_IT(huart, UART_IT_PE); - } - - /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); - - /* Enable the UART Data Register not empty Interrupt */ - __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); - - return HAL_OK; -} - -/** - * @brief Start Receive operation in DMA mode. - * @note This function could be called by all HAL UART API providing reception in DMA mode. - * @note When calling this function, parameters validity is considered as already checked, - * i.e. Rx State, buffer address, ... - * UART Handle is assumed as Locked. - * @param huart UART handle. - * @param pData Pointer to data buffer (u8 or u16 data elements). - * @param Size Amount of data elements (u8 or u16) to be received. - * @retval HAL status - */ -HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - uint32_t *tmp; - - huart->pRxBuffPtr = pData; - huart->RxXferSize = Size; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - - /* Set the UART DMA transfer complete callback */ - huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; - - /* Set the UART DMA Half transfer complete callback */ - huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; - - /* Set the DMA error callback */ - huart->hdmarx->XferErrorCallback = UART_DMAError; - - /* Set the DMA abort callback */ - huart->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA stream */ - tmp = (uint32_t *)&pData; - HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size); - - /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */ - __HAL_UART_CLEAR_OREFLAG(huart); - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - if (huart->Init.Parity != UART_PARITY_NONE) - { - /* Enable the UART Parity Error Interrupt */ - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - } - - /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the UART CR3 register */ - ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - return HAL_OK; -} - -/** - * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; -} - -/** - * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndRxTransfer(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - } - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; -} - -/** - * @brief DMA UART communication abort callback, when initiated by HAL services on Error - * (To be called at end of DMA Abort procedure following error occurrence). - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - huart->RxXferCount = 0x00U; - huart->TxXferCount = 0x00U; - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered error callback*/ - huart->ErrorCallback(huart); -#else - /*Call legacy weak error callback*/ - HAL_UART_ErrorCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA UART Tx communication abort callback, when initiated by user - * (To be called at end of DMA Tx Abort procedure following user abort request). - * @note When this callback is executed, User Abort complete call back is called only if no - * Abort still ongoing for Rx DMA Handle. - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - huart->hdmatx->XferAbortCallback = NULL; - - /* Check if an Abort process is still ongoing */ - if (huart->hdmarx != NULL) - { - if (huart->hdmarx->XferAbortCallback != NULL) - { - return; - } - } - - /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ - huart->TxXferCount = 0x00U; - huart->RxXferCount = 0x00U; - - /* Reset ErrorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* Call user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort complete callback */ - huart->AbortCpltCallback(huart); -#else - /* Call legacy weak Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA UART Rx communication abort callback, when initiated by user - * (To be called at end of DMA Rx Abort procedure following user abort request). - * @note When this callback is executed, User Abort complete call back is called only if no - * Abort still ongoing for Tx DMA Handle. - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - huart->hdmarx->XferAbortCallback = NULL; - - /* Check if an Abort process is still ongoing */ - if (huart->hdmatx != NULL) - { - if (huart->hdmatx->XferAbortCallback != NULL) - { - return; - } - } - - /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ - huart->TxXferCount = 0x00U; - huart->RxXferCount = 0x00U; - - /* Reset ErrorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* Call user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort complete callback */ - huart->AbortCpltCallback(huart); -#else - /* Call legacy weak Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA UART Tx communication abort callback, when initiated by user by a call to - * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer) - * (This callback is executed at end of DMA Tx Abort procedure following user abort request, - * and leads to user Tx Abort Complete callback execution). - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - huart->TxXferCount = 0x00U; - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort Transmit Complete Callback */ - huart->AbortTransmitCpltCallback(huart); -#else - /* Call legacy weak Abort Transmit Complete Callback */ - HAL_UART_AbortTransmitCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - -/** - * @brief DMA UART Rx communication abort callback, when initiated by user by a call to - * HAL_UART_AbortReceive_IT API (Abort only Rx transfer) - * (This callback is executed at end of DMA Rx Abort procedure following user abort request, - * and leads to user Rx Abort Complete callback execution). - * @param hdma Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - huart->RxXferCount = 0x00U; - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* Call user Abort complete callback */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /* Call registered Abort Receive Complete Callback */ - huart->AbortReceiveCpltCallback(huart); -#else - /* Call legacy weak Abort Receive Complete Callback */ - HAL_UART_AbortReceiveCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ -} - -/** - * @brief Sends an amount of data in non blocking mode. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) -{ - const uint16_t *tmp; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - tmp = (const uint16_t *) huart->pTxBuffPtr; - huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); - huart->pTxBuffPtr += 2U; - } - else - { - huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); - } - - if (--huart->TxXferCount == 0U) - { - /* Disable the UART Transmit Data Register Empty Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); - - /* Enable the UART Transmit Complete Interrupt */ - __HAL_UART_ENABLE_IT(huart, UART_IT_TC); - } - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Wraps up transmission in non blocking mode. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) -{ - /* Disable the UART Transmit Complete Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_TC); - - /* Tx process is ended, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Tx complete callback*/ - huart->TxCpltCallback(huart); -#else - /*Call legacy weak Tx complete callback*/ - HAL_UART_TxCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - - return HAL_OK; -} - -/** - * @brief Receives an amount of data in non blocking mode - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) -{ - uint8_t *pdata8bits; - uint16_t *pdata16bits; - - /* Check that a Rx process is ongoing */ - if (huart->RxState == HAL_UART_STATE_BUSY_RX) - { - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - pdata8bits = NULL; - pdata16bits = (uint16_t *) huart->pRxBuffPtr; - *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - huart->pRxBuffPtr += 2U; - } - else - { - pdata8bits = (uint8_t *) huart->pRxBuffPtr; - pdata16bits = NULL; - - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - } - else - { - *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - } - huart->pRxBuffPtr += 1U; - } - - if (--huart->RxXferCount == 0U) - { - /* Disable the UART Data Register not empty Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); - - /* Disable the UART Parity Error Interrupt */ - __HAL_UART_DISABLE_IT(huart, UART_IT_PE); - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Check current reception Mode : - If Reception till IDLE event has been selected : */ - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - /* Set reception type to Standard */ - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - - /* Disable IDLE interrupt */ - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - - /* Check if IDLE flag is set */ - if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - { - /* Clear IDLE flag in ISR */ - __HAL_UART_CLEAR_IDLEFLAG(huart); - } - -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx Event callback*/ - huart->RxEventCallback(huart, huart->RxXferSize); -#else - /*Call legacy weak Rx Event callback*/ - HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - else - { - /* Standard reception API called */ -#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - /*Call registered Rx complete callback*/ - huart->RxCpltCallback(huart); -#else - /*Call legacy weak Rx complete callback*/ - HAL_UART_RxCpltCallback(huart); -#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ - } - - return HAL_OK; - } - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Configures the UART peripheral. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -static void UART_SetConfig(UART_HandleTypeDef *huart) -{ - uint32_t tmpreg; - uint32_t pclk; - - /* Check the parameters */ - assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate)); - assert_param(IS_UART_STOPBITS(huart->Init.StopBits)); - assert_param(IS_UART_PARITY(huart->Init.Parity)); - assert_param(IS_UART_MODE(huart->Init.Mode)); - - /*-------------------------- USART CR2 Configuration -----------------------*/ - /* Configure the UART Stop Bits: Set STOP[13:12] bits - according to huart->Init.StopBits value */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - - /*-------------------------- USART CR1 Configuration -----------------------*/ - /* Configure the UART Word Length, Parity and mode: - Set the M bits according to huart->Init.WordLength value - Set PCE and PS bits according to huart->Init.Parity value - Set TE and RE bits according to huart->Init.Mode value - Set OVER8 bit according to huart->Init.OverSampling value */ - - tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; - MODIFY_REG(huart->Instance->CR1, - (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), - tmpreg); - - /*-------------------------- USART CR3 Configuration -----------------------*/ - /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ - MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - - -#if defined(USART6) && defined(UART9) && defined(UART10) - if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10)) - { - pclk = HAL_RCC_GetPCLK2Freq(); - } -#elif defined(USART6) - if ((huart->Instance == USART1) || (huart->Instance == USART6)) - { - pclk = HAL_RCC_GetPCLK2Freq(); - } -#else - if (huart->Instance == USART1) - { - pclk = HAL_RCC_GetPCLK2Freq(); - } -#endif /* USART6 */ - else - { - pclk = HAL_RCC_GetPCLK1Freq(); - } - /*-------------------------- USART BRR Configuration ---------------------*/ - if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - { - huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate); - } - else - { - huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - } -} - -/** - * @} - */ - -#endif /* HAL_UART_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - diff --git a/MDK-ARM/EventRecorderStub.scvd b/MDK-ARM/EventRecorderStub.scvd deleted file mode 100644 index 2956b29..0000000 --- a/MDK-ARM/EventRecorderStub.scvd +++ /dev/null @@ -1,9 +0,0 @@ - - - - - - - - - diff --git a/MDK-ARM/RTE/_TEST2/RTE_Components.h b/MDK-ARM/RTE/_remote_dido_unit/RTE_Components.h similarity index 80% rename from MDK-ARM/RTE/_TEST2/RTE_Components.h rename to MDK-ARM/RTE/_remote_dido_unit/RTE_Components.h index 5d1cac6..089864e 100644 --- a/MDK-ARM/RTE/_TEST2/RTE_Components.h +++ b/MDK-ARM/RTE/_remote_dido_unit/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'TEST2' - * Target: 'TEST2' + * Project: 'remote_dido_unit' + * Target: 'remote_dido_unit' */ #ifndef RTE_COMPONENTS_H diff --git a/MDK-ARM/RTE/_semi-finished_product_testing/RTE_Components.h b/MDK-ARM/RTE/_semi-finished_product_testing/RTE_Components.h deleted file mode 100644 index 3ea7478..0000000 --- a/MDK-ARM/RTE/_semi-finished_product_testing/RTE_Components.h +++ /dev/null @@ -1,21 +0,0 @@ - -/* - * Auto generated Run-Time-Environment Configuration File - * *** Do not modify ! *** - * - * Project: 'semi-finished_product_testing' - * Target: 'semi-finished_product_testing' - */ - -#ifndef RTE_COMPONENTS_H -#define RTE_COMPONENTS_H - - -/* - * Define the Device Header File: - */ -#define CMSIS_device_header "stm32f4xx.h" - - - -#endif /* RTE_COMPONENTS_H */ diff --git a/MDK-ARM/semi-finished_product_testing.uvoptx b/MDK-ARM/remote_dido_unit.uvoptx similarity index 92% rename from MDK-ARM/semi-finished_product_testing.uvoptx rename to MDK-ARM/remote_dido_unit.uvoptx index d6a9acd..2c637cd 100644 --- a/MDK-ARM/semi-finished_product_testing.uvoptx +++ b/MDK-ARM/remote_dido_unit.uvoptx @@ -22,7 +22,7 @@ - semi-finished_product_testing + remote_dido_unit 0x4 ARM-ADS @@ -173,7 +173,7 @@ 1 - 1 + 0 0 2 10000000 @@ -183,7 +183,7 @@ Application/MDK-ARM - 0 + 1 0 0 0 @@ -203,7 +203,7 @@ Application/User/Core - 0 + 1 0 0 0 @@ -250,30 +250,6 @@ 0 0 0 - ../Core/Src/dma.c - dma.c - 0 - 0 - - - 2 - 6 - 1 - 0 - 0 - 0 - ../Core/Src/spi.c - spi.c - 0 - 0 - - - 2 - 7 - 1 - 0 - 0 - 0 ../Core/Src/tim.c tim.c 0 @@ -281,19 +257,7 @@ 2 - 8 - 1 - 0 - 0 - 0 - ../Core/Src/usart.c - usart.c - 0 - 0 - - - 2 - 9 + 6 1 0 0 @@ -305,7 +269,7 @@ 2 - 10 + 7 1 0 0 @@ -317,7 +281,7 @@ 2 - 11 + 8 1 0 0 @@ -337,7 +301,7 @@ 0 3 - 12 + 9 1 0 0 @@ -357,7 +321,7 @@ 0 4 - 13 + 10 1 0 0 @@ -377,7 +341,7 @@ 0 5 - 14 + 11 1 0 0 @@ -397,7 +361,7 @@ 0 6 - 15 + 12 1 0 0 @@ -409,7 +373,7 @@ 6 - 16 + 13 1 0 0 @@ -421,7 +385,7 @@ 6 - 17 + 14 1 0 0 @@ -433,7 +397,7 @@ 6 - 18 + 15 1 0 0 @@ -445,7 +409,7 @@ 6 - 19 + 16 1 0 0 @@ -457,7 +421,7 @@ 6 - 20 + 17 1 0 0 @@ -469,7 +433,7 @@ 6 - 21 + 18 1 0 0 @@ -481,7 +445,7 @@ 6 - 22 + 19 1 0 0 @@ -493,7 +457,7 @@ 6 - 23 + 20 1 0 0 @@ -505,7 +469,7 @@ 6 - 24 + 21 1 0 0 @@ -517,7 +481,7 @@ 6 - 25 + 22 1 0 0 @@ -529,7 +493,7 @@ 6 - 26 + 23 1 0 0 @@ -541,7 +505,7 @@ 6 - 27 + 24 1 0 0 @@ -553,7 +517,7 @@ 6 - 28 + 25 1 0 0 @@ -565,19 +529,7 @@ 6 - 29 - 1 - 0 - 0 - 0 - ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c - stm32f4xx_hal_spi.c - 0 - 0 - - - 6 - 30 + 26 1 0 0 @@ -589,7 +541,7 @@ 6 - 31 + 27 1 0 0 @@ -599,18 +551,6 @@ 0 0 - - 6 - 32 - 1 - 0 - 0 - 0 - ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c - stm32f4xx_hal_uart.c - 0 - 0 - @@ -621,7 +561,7 @@ 0 7 - 33 + 28 1 0 0 @@ -641,7 +581,7 @@ 0 8 - 34 + 29 1 0 0 @@ -653,7 +593,7 @@ 8 - 35 + 30 1 0 0 @@ -665,7 +605,7 @@ 8 - 36 + 31 1 0 0 @@ -677,7 +617,7 @@ 8 - 37 + 32 1 0 0 @@ -689,7 +629,7 @@ 8 - 38 + 33 1 0 0 @@ -701,7 +641,7 @@ 8 - 39 + 34 1 0 0 @@ -713,7 +653,7 @@ 8 - 40 + 35 1 0 0 @@ -725,7 +665,7 @@ 8 - 41 + 36 1 0 0 @@ -737,7 +677,7 @@ 8 - 42 + 37 1 0 0 @@ -749,7 +689,7 @@ 8 - 43 + 38 1 0 0 @@ -769,7 +709,7 @@ 0 9 - 44 + 39 1 0 0 @@ -781,7 +721,7 @@ 9 - 45 + 40 1 0 0 @@ -793,7 +733,7 @@ 9 - 46 + 41 1 0 0 @@ -805,7 +745,7 @@ 9 - 47 + 42 1 0 0 @@ -817,7 +757,7 @@ 9 - 48 + 43 1 0 0 @@ -829,7 +769,7 @@ 9 - 49 + 44 1 0 0 @@ -841,7 +781,7 @@ 9 - 50 + 45 1 0 0 @@ -853,7 +793,7 @@ 9 - 51 + 46 1 0 0 @@ -865,7 +805,7 @@ 9 - 52 + 47 1 0 0 @@ -877,7 +817,7 @@ 9 - 53 + 48 1 0 0 @@ -889,7 +829,7 @@ 9 - 54 + 49 1 0 0 @@ -901,7 +841,7 @@ 9 - 55 + 50 1 0 0 @@ -913,7 +853,7 @@ 9 - 56 + 51 1 0 0 @@ -925,7 +865,7 @@ 9 - 57 + 52 1 0 0 @@ -937,7 +877,7 @@ 9 - 58 + 53 1 0 0 @@ -949,7 +889,7 @@ 9 - 59 + 54 1 0 0 @@ -961,7 +901,7 @@ 9 - 60 + 55 1 0 0 @@ -973,7 +913,7 @@ 9 - 61 + 56 1 0 0 @@ -985,7 +925,7 @@ 9 - 62 + 57 1 0 0 @@ -997,7 +937,7 @@ 9 - 63 + 58 1 0 0 @@ -1009,7 +949,7 @@ 9 - 64 + 59 1 0 0 @@ -1021,7 +961,7 @@ 9 - 65 + 60 1 0 0 @@ -1033,7 +973,7 @@ 9 - 66 + 61 1 0 0 @@ -1045,7 +985,7 @@ 9 - 67 + 62 1 0 0 @@ -1057,7 +997,7 @@ 9 - 68 + 63 1 0 0 @@ -1069,7 +1009,7 @@ 9 - 69 + 64 1 0 0 @@ -1081,7 +1021,7 @@ 9 - 70 + 65 1 0 0 @@ -1093,7 +1033,7 @@ 9 - 71 + 66 1 0 0 @@ -1105,7 +1045,7 @@ 9 - 72 + 67 1 0 0 @@ -1117,7 +1057,7 @@ 9 - 73 + 68 1 0 0 @@ -1129,7 +1069,7 @@ 9 - 74 + 69 1 0 0 @@ -1141,7 +1081,7 @@ 9 - 75 + 70 1 0 0 @@ -1153,7 +1093,7 @@ 9 - 76 + 71 1 0 0 @@ -1165,7 +1105,7 @@ 9 - 77 + 72 1 0 0 @@ -1177,7 +1117,7 @@ 9 - 78 + 73 1 0 0 @@ -1189,7 +1129,7 @@ 9 - 79 + 74 1 0 0 @@ -1201,7 +1141,7 @@ 9 - 80 + 75 1 0 0 @@ -1213,7 +1153,7 @@ 9 - 81 + 76 1 0 0 @@ -1225,7 +1165,7 @@ 9 - 82 + 77 1 0 0 @@ -1237,7 +1177,7 @@ 9 - 83 + 78 1 0 0 @@ -1249,7 +1189,7 @@ 9 - 84 + 79 1 0 0 @@ -1261,7 +1201,7 @@ 9 - 85 + 80 1 0 0 @@ -1273,7 +1213,7 @@ 9 - 86 + 81 1 0 0 @@ -1285,7 +1225,7 @@ 9 - 87 + 82 1 0 0 @@ -1297,7 +1237,7 @@ 9 - 88 + 83 1 0 0 @@ -1309,7 +1249,7 @@ 9 - 89 + 84 1 0 0 @@ -1321,7 +1261,7 @@ 9 - 90 + 85 1 0 0 @@ -1333,7 +1273,7 @@ 9 - 91 + 86 1 0 0 @@ -1345,7 +1285,7 @@ 9 - 92 + 87 1 0 0 @@ -1357,7 +1297,7 @@ 9 - 93 + 88 1 0 0 @@ -1369,7 +1309,7 @@ 9 - 94 + 89 1 0 0 @@ -1381,7 +1321,7 @@ 9 - 95 + 90 1 0 0 @@ -1393,7 +1333,7 @@ 9 - 96 + 91 1 0 0 @@ -1405,7 +1345,7 @@ 9 - 97 + 92 1 0 0 @@ -1417,7 +1357,7 @@ 9 - 98 + 93 1 0 0 @@ -1429,7 +1369,7 @@ 9 - 99 + 94 1 0 0 @@ -1441,7 +1381,7 @@ 9 - 100 + 95 1 0 0 @@ -1453,7 +1393,7 @@ 9 - 101 + 96 1 0 0 @@ -1465,7 +1405,7 @@ 9 - 102 + 97 1 0 0 @@ -1477,7 +1417,7 @@ 9 - 103 + 98 1 0 0 @@ -1489,7 +1429,7 @@ 9 - 104 + 99 1 0 0 @@ -1501,7 +1441,7 @@ 9 - 105 + 100 1 0 0 @@ -1513,7 +1453,7 @@ 9 - 106 + 101 1 0 0 @@ -1525,7 +1465,7 @@ 9 - 107 + 102 1 0 0 @@ -1537,7 +1477,7 @@ 9 - 108 + 103 1 0 0 @@ -1549,7 +1489,7 @@ 9 - 109 + 104 1 0 0 @@ -1561,7 +1501,7 @@ 9 - 110 + 105 1 0 0 @@ -1573,7 +1513,7 @@ 9 - 111 + 106 1 0 0 @@ -1585,7 +1525,7 @@ 9 - 112 + 107 1 0 0 @@ -1597,7 +1537,7 @@ 9 - 113 + 108 1 0 0 @@ -1609,7 +1549,7 @@ 9 - 114 + 109 1 0 0 @@ -1621,7 +1561,7 @@ 9 - 115 + 110 1 0 0 @@ -1633,7 +1573,7 @@ 9 - 116 + 111 1 0 0 @@ -1645,7 +1585,7 @@ 9 - 117 + 112 1 0 0 @@ -1657,7 +1597,7 @@ 9 - 118 + 113 1 0 0 @@ -1669,7 +1609,7 @@ 9 - 119 + 114 1 0 0 @@ -1681,7 +1621,7 @@ 9 - 120 + 115 1 0 0 @@ -1693,7 +1633,7 @@ 9 - 121 + 116 1 0 0 @@ -1705,7 +1645,7 @@ 9 - 122 + 117 1 0 0 @@ -1717,7 +1657,7 @@ 9 - 123 + 118 1 0 0 @@ -1729,7 +1669,7 @@ 9 - 124 + 119 1 0 0 @@ -1742,46 +1682,14 @@ - User/board - 0 + User/application + 1 0 0 0 10 - 125 - 1 - 0 - 0 - 0 - ..\User\board\src\leds.c - leds.c - 0 - 0 - - - - - User/application - 0 - 0 - 0 - 0 - - 11 - 126 - 1 - 0 - 0 - 0 - ..\User\application\src\ble_mx_02.c - ble_mx_02.c - 0 - 0 - - - 11 - 127 + 120 1 0 0 @@ -1792,32 +1700,8 @@ 0 - 11 - 128 - 1 - 0 - 0 - 0 - ..\User\application\src\tcpclient.c - tcpclient.c - 0 - 0 - - - 11 - 129 - 1 - 0 - 0 - 0 - ..\User\application\src\tcpserverc.c - tcpserverc.c - 0 - 0 - - - 11 - 130 + 10 + 121 1 0 0 @@ -1827,47 +1711,15 @@ 0 0 - - - - User/driver - 0 - 0 - 0 - 0 - 12 - 131 + 10 + 122 1 0 0 0 - ..\User\driver\ad7124.c - ad7124.c - 0 - 0 - - - 12 - 132 - 1 - 0 - 0 - 0 - ..\User\driver\dac161s997.c - dac161s997.c - 0 - 0 - - - 12 - 133 - 1 - 0 - 0 - 0 - ..\User\driver\ht1200m.c - ht1200m.c + ..\User\application\src\tcpserverc.c + tcpserverc.c 0 0 @@ -1875,13 +1727,13 @@ User/system - 0 + 1 0 0 0 - 13 - 134 + 11 + 123 1 0 0 @@ -1891,15 +1743,23 @@ 0 0 + + + + User/board + 1 + 0 + 0 + 0 - 13 - 135 + 12 + 124 1 0 0 0 - ..\User\system\user_spi.c - user_spi.c + ..\User\board\src\leds.c + leds.c 0 0 diff --git a/MDK-ARM/semi-finished_product_testing.uvprojx b/MDK-ARM/remote_dido_unit.uvprojx similarity index 93% rename from MDK-ARM/semi-finished_product_testing.uvprojx rename to MDK-ARM/remote_dido_unit.uvprojx index 6e67e4a..eb3cd7c 100644 --- a/MDK-ARM/semi-finished_product_testing.uvprojx +++ b/MDK-ARM/remote_dido_unit.uvprojx @@ -7,7 +7,7 @@ - semi-finished_product_testing + remote_dido_unit 0x4 ARM-ADS 5060960::V5.06 update 7 (build 960)::.\ARMCC @@ -18,7 +18,7 @@ STMicroelectronics Keil.STM32F4xx_DFP.2.12.0 http://www.keil.com/pack - IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ + IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ @@ -48,8 +48,8 @@ 0 1 - semi-finished_product_testing\ - semi-finished_product_testing + remote_dido_unit\ + remote_dido_unit 1 0 0 @@ -138,7 +138,7 @@ 1 BIN\UL2V8M.DLL - + "" () @@ -339,7 +339,7 @@ USE_HAL_DRIVER,STM32F407xx - ../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;..\User\application\inc;..\User\board\inc;..\User\driver;..\User\system + ../Core/Inc;../LWIP/App;../LWIP/Target;../Middlewares/Third_Party/LwIP/src/include;../Middlewares/Third_Party/LwIP/system;../Drivers/STM32F4xx_HAL_Driver/Inc;../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../Middlewares/Third_Party/FreeRTOS/Source/include;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../Drivers/BSP/Components/lan8742;../Middlewares/Third_Party/LwIP/src/include/netif/ppp;../Drivers/CMSIS/Device/ST/STM32F4xx/Include;../Middlewares/Third_Party/LwIP/src/include/lwip;../Middlewares/Third_Party/LwIP/src/include/lwip/apps;../Middlewares/Third_Party/LwIP/src/include/lwip/priv;../Middlewares/Third_Party/LwIP/src/include/lwip/prot;../Middlewares/Third_Party/LwIP/src/include/netif;../Middlewares/Third_Party/LwIP/src/include/compat/posix;../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa;../Middlewares/Third_Party/LwIP/src/include/compat/posix/net;../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys;../Middlewares/Third_Party/LwIP/src/include/compat/stdc;../Middlewares/Third_Party/LwIP/system/arch;../Drivers/CMSIS/Include;../User/application/inc;../User/system;../User/board/inc @@ -408,26 +408,11 @@ 1 ../Core/Src/freertos.c - - dma.c - 1 - ../Core/Src/dma.c - - - spi.c - 1 - ../Core/Src/spi.c - tim.c 1 ../Core/Src/tim.c - - usart.c - 1 - ../Core/Src/usart.c - stm32f4xx_it.c 1 @@ -548,11 +533,6 @@ 1 ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c - - stm32f4xx_hal_spi.c - 1 - ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c - stm32f4xx_hal_tim.c 1 @@ -563,11 +543,6 @@ 1 ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c - - stm32f4xx_hal_uart.c - 1 - ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c - @@ -1045,64 +1020,24 @@ - - User/board - - - leds.c - 1 - ..\User\board\src\leds.c - - - User/application - - ble_mx_02.c - 1 - ..\User\application\src\ble_mx_02.c - communication_protocol.c 1 ..\User\application\src\communication_protocol.c - tcpclient.c + user_lib.c 1 - ..\User\application\src\tcpclient.c + ..\User\application\src\user_lib.c tcpserverc.c 1 ..\User\application\src\tcpserverc.c - - user_lib.c - 1 - ..\User\application\src\user_lib.c - - - - - User/driver - - - ad7124.c - 1 - ..\User\driver\ad7124.c - - - dac161s997.c - 1 - ..\User\driver\dac161s997.c - - - ht1200m.c - 1 - ..\User\driver\ht1200m.c - @@ -1113,10 +1048,15 @@ 1 ..\User\system\user_gpio.c + + + + User/board + - user_spi.c + leds.c 1 - ..\User\system\user_spi.c + ..\User\board\src\leds.c @@ -1133,7 +1073,7 @@ - + @@ -1143,7 +1083,7 @@ - semi-finished_product_testing + remote_dido_unit 1 diff --git a/MDK-ARM/TEST2/TEST2.sct b/MDK-ARM/remote_dido_unit/remote_dido_unit.sct similarity index 100% rename from MDK-ARM/TEST2/TEST2.sct rename to MDK-ARM/remote_dido_unit/remote_dido_unit.sct diff --git a/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.sct b/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.sct deleted file mode 100644 index a335d3e..0000000 --- a/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.sct +++ /dev/null @@ -1,19 +0,0 @@ -; ************************************************************* -; *** Scatter-Loading Description File generated by uVision *** -; ************************************************************* - -LR_IROM1 0x08000000 0x00100000 { ; load region size_region - ER_IROM1 0x08000000 0x00100000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - .ANY (+XO) - } - RW_IRAM1 0x20000000 0x0001C000 { ; RW data - .ANY (+RW +ZI) - } - RW_IRAM2 0x2001C000 0x00004000 { - .ANY (+RW +ZI) - } -} - diff --git a/User/application/src/communication_protocol.c b/User/application/src/communication_protocol.c index 838067f..51accfe 100644 --- a/User/application/src/communication_protocol.c +++ b/User/application/src/communication_protocol.c @@ -1,9 +1,8 @@ #include "communication_protocol.h" #include "user_lib.h" -#include "ad7124.h" -extern float current_buff[2]; -extern ad7124_analog_t ad7124_analog[AD7124_CHANNEL_EN_MAX]; + + /** * @brief 处理通信异常 * @@ -25,25 +24,4 @@ void communication_exception(uint8_t *tx_data, const uint8_t *const rx_data, com tx_data[6] = FRAME_TAIL; // 帧尾 } -void communication_get_ai(communication_ai_t *ai_data, uint8_t *tx_data, const uint8_t *const rx_data) -{ - float32_u analog_data; - uint8_t tx_data_len = COM_AI_DATA_SIZE; - analog_data.f = S2B_FLOAT32(ad7124_analog[ai_data->channel].current); - tx_data[0] = FRAME_HEAD; // 帧头 - tx_data[1] = COM_OK; // 状态 - tx_data[2] = rx_data[2]; // 设备号 - tx_data[3] = rx_data[3]; // 命令号 - tx_data[4] = 4; // 数据长度 - tx_data[5] = analog_data.c; // 数据 - tx_data[6] = analog_data.c >> 8; // 数据 - tx_data[7] = analog_data.c >> 16; // 数据 - tx_data[8] = analog_data.c >> 24; // 数据 - tx_data[9] = xor_compute(tx_data + 1, tx_data_len - 3); // 异或校验 - tx_data[10] = FRAME_TAIL; // 帧尾 -} -void communication_set_ao(communication_ao_t *ao_data) -{ - current_buff[ao_data->channel] = B2S_FLOAT32(ao_data->data.f); -} diff --git a/User/application/src/tcpserverc.c b/User/application/src/tcpserverc.c index 930ad35..c6bfcb5 100644 --- a/User/application/src/tcpserverc.c +++ b/User/application/src/tcpserverc.c @@ -8,123 +8,24 @@ #include "lwip/pbuf.h" #include #include -#include "usart.h" + #include "main.h" -#include "ht1200m.h" + #include "user_lib.h" #include "communication_protocol.h" #include "user_gpio.h" -struct tcp_pcb *server_pcb_hart1 = NULL; -struct tcp_pcb *server_pcb_hart2 = NULL; -struct tcp_pcb *server_pcb_ble1 = NULL; -struct tcp_pcb *server_pcb_ble2 = NULL; + struct tcp_pcb *server_pcb_control = NULL; communication_di_t *user_communication_di = NULL; communication_do_t *user_communication_do = NULL; -communication_ai_t *user_communication_ai = NULL; -communication_ao_t *user_communication_ao = NULL; -extern uint8_t tcp_echo_flags_hart1; -extern uint8_t tcp_echo_flags_hart2; -extern uint8_t tcp_echo_flags_ble1; -extern uint8_t tcp_echo_flags_ble2; + extern uint8_t tcp_echo_flags_control; /*接收回调函数*/ -static err_t tcpecho_recv_hart1(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err) -{ // 对应接收数据连接的控制块 接收到的数据 - if (p != NULL) - { - /* 更新窗口*/ - tcp_echo_flags_hart1 = 1; - tcp_recved(tpcb, p->tot_len); // 读取数据的控制块 得到所有数据的长度 - server_pcb_hart1 = tpcb; // 直接赋值 - memcpy(hart1_uart5.tx_data, (int *)p->payload, p->tot_len); - if (huart5.gState == HAL_UART_STATE_READY) - { - HART1_RTS_SEND; - dma_usart_send(&huart5, hart1_uart5.tx_data, p->tot_len); - } - pbuf_free(p); - } - else if (err == ERR_OK) // 检测到对方主动关闭连接时,也会调用recv函数,此时p为空 - { - return tcp_close(tpcb); - } - return ERR_OK; -} -static err_t tcpecho_recv_hart2(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err) -{ // 对应接收数据连接的控制块 接收到的数据 - if (p != NULL) - { - /* 更新窗口*/ - tcp_echo_flags_hart2 = 1; - tcp_recved(tpcb, p->tot_len); // 读取数据的控制块 得到所有数据的长度 - server_pcb_hart2 = tpcb; // 直接赋值 - memcpy(hart2_uart2.tx_data, (int *)p->payload, p->tot_len); - if (huart2.gState == HAL_UART_STATE_READY) - { - HART2_RTS_SEND; - dma_usart_send(&huart2, hart2_uart2.tx_data, p->tot_len); - } - - pbuf_free(p); - } - else if (err == ERR_OK) // 检测到对方主动关闭连接时,也会调用recv函数,此时p为空 - { - return tcp_close(tpcb); - } - return ERR_OK; -} - -static err_t tcpecho_recv_ble1(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err) -{ // 对应接收数据连接的控制块 接收到的数据 - if (p != NULL) - { - /* 更新窗口*/ - tcp_echo_flags_ble1 = 1; - tcp_recved(tpcb, p->tot_len); // 读取数据的控制块 得到所有数据的长度 - server_pcb_ble1 = tpcb; // 直接赋值 - - memcpy(ble1_uart6.tx_data, (int *)p->payload, p->tot_len); - if (huart6.gState == HAL_UART_STATE_READY) - { - dma_usart_send(&huart6, ble1_uart6.tx_data, p->tot_len); - } - - pbuf_free(p); - } - else if (err == ERR_OK) // 检测到对方主动关闭连接时,也会调用recv函数,此时p为空 - { - return tcp_close(tpcb); - } - return ERR_OK; -} - -static err_t tcpecho_recv_ble2(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err) -{ // 对应接收数据连接的控制块 接收到的数据 - if (p != NULL) - { - /* 更新窗口*/ - tcp_echo_flags_ble2 = 1; - tcp_recved(tpcb, p->tot_len); // 读取数据的控制块 得到所有数据的长度 - server_pcb_ble2 = tpcb; // 直接赋值 - memcpy(ble2_uart3.tx_data, (int *)p->payload, p->tot_len); - if (huart3.gState == HAL_UART_STATE_READY) - { - dma_usart_send(&huart3, ble2_uart3.tx_data, p->tot_len); - } - pbuf_free(p); - } - else if (err == ERR_OK) // 检测到对方主动关闭连接时,也会调用recv函数,此时p为空 - { - return tcp_close(tpcb); - } - return ERR_OK; -} static err_t tcpecho_recv_control(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err) { @@ -158,24 +59,8 @@ static err_t tcpecho_recv_control(void *arg, struct tcp_pcb *tpcb, struct pbuf * } else { - memcpy(communication_data.data, tcp_rx_data + 5, tcp_rx_data[4]); - if (tcp_rx_data[3] == 0x00) // 读模拟量指令 - { - /*读操作,从寄存器读取数据,组包返回*/ - tx_data_len = COM_AI_DATA_SIZE; - user_communication_ai = &communication_data.ai_data; - communication_get_ai(user_communication_ai, tcp_tx_data, tcp_rx_data); - tcp_write(tpcb, tcp_tx_data, tx_data_len, 1); - } - else if (tcp_rx_data[3] == 0x01) // 写模拟量指令 - { - /*写操作,将数据写入寄存器,组包返回*/ - tcp_echo_flags_control = 1; - user_communication_ao = &communication_data.ao_data; - communication_set_ao(user_communication_ao); - tcp_write(tpcb, tcp_rx_data, rx_data_len, 1); - } - else if (tcp_rx_data[3] == 0x02) // 读数字量指令 + memcpy(communication_data.data, tcp_rx_data + 5, tcp_rx_data[4]); + if (tcp_rx_data[3] == 0x02) // 读数字量指令 { /*读操作,从寄存器读取数据,组包返回*/ @@ -213,33 +98,6 @@ static err_t tcpecho_recv_control(void *arg, struct tcp_pcb *tpcb, struct pbuf * return ERR_OK; } -static err_t tcpecho_accept_hart1(void *arg, struct tcp_pcb *newpcb, err_t err) // 由于这个函数是*tcp_accept_fn类型的 - // 形参的数量和类型必须一致 -{ - tcp_recv(newpcb, tcpecho_recv_hart1); // 当收到数据时,回调用户自己写的tcpecho_recv - - return ERR_OK; -} - -static err_t tcpecho_accept_hart2(void *arg, struct tcp_pcb *newpcb, err_t err) // 由于这个函数是*tcp_accept_fn类型的 -{ - tcp_recv(newpcb, tcpecho_recv_hart2); // 当收到数据时,回调用户自己写的tcpecho_recv - - return ERR_OK; -} - -static err_t tcpecho_accept_ble1(void *arg, struct tcp_pcb *newpcb, err_t err) // 由于这个函数是*tcp_accept_fn类型的 -{ - tcp_recv(newpcb, tcpecho_recv_ble1); // 当收到数据时,回调用户自己写的tcpecho_recv - - return ERR_OK; -} -static err_t tcpecho_accept_ble2(void *arg, struct tcp_pcb *newpcb, err_t err) // 由于这个函数是*tcp_accept_fn类型的 -{ - tcp_recv(newpcb, tcpecho_recv_ble2); // 当收到数据时,回调用户自己写的tcpecho_recv - - return ERR_OK; -} static err_t tcpecho_accept_control(void *arg, struct tcp_pcb *newpcb, err_t err) // 由于这个函数是*tcp_accept_fn类型的 { tcp_recv(newpcb, tcpecho_recv_control); // 当收到数据时,回调用户自己写的tcpecho_recv @@ -248,59 +106,8 @@ static err_t tcpecho_accept_control(void *arg, struct tcp_pcb *newpcb, err_t err } void tcp_echo_init(void) { - struct tcp_pcb *server_hart1 = NULL; - struct tcp_pcb *server_hart2 = NULL; - struct tcp_pcb *server_ble1 = NULL; - struct tcp_pcb *server_ble2 = NULL; struct tcp_pcb *server_control = NULL; - /* 创建一路HART */ - server_hart1 = tcp_new(); - - /* 绑定TCP控制块 */ - tcp_bind(server_hart1, IP_ADDR_ANY, TCP_PORT_HART1); - - /* 进入监听状态 */ - server_hart1 = tcp_listen(server_hart1); - - /* 处理连接 注册函数,侦听到连接时被注册的函数被回调 */ - tcp_accept(server_hart1, tcpecho_accept_hart1); // 侦听到连接后,回调用户编写的tcpecho_accept - - /* 创建二路HART */ - server_hart2 = tcp_new(); - - /* 绑定TCP控制块 */ - tcp_bind(server_hart2, IP_ADDR_ANY, TCP_PORT_HART2); - - /* 进入监听状态 */ - server_hart2 = tcp_listen(server_hart2); - - /* 处理连接 注册函数,侦听到连接时被注册的函数被回调 */ - tcp_accept(server_hart2, tcpecho_accept_hart2); // 侦听到连接后,回调用户编写的tcpecho_accept - - /* 创建一路蓝牙 */ - server_ble1 = tcp_new(); - - /* 绑定TCP控制块 */ - tcp_bind(server_ble1, IP_ADDR_ANY, TCP_PORT_BLE1); - - /* 进入监听状态 */ - server_ble1 = tcp_listen(server_ble1); - - /* 处理连接 注册函数,侦听到连接时被注册的函数被回调 */ - tcp_accept(server_ble1, tcpecho_accept_ble1); // 侦听到连接后,回调用户编写的tcpecho_accept - - /* 创建二路蓝牙 */ - server_ble2 = tcp_new(); - - /* 绑定TCP控制块 */ - tcp_bind(server_ble2, IP_ADDR_ANY, TCP_PORT_BLE2); - - /* 进入监听状态 */ - server_ble2 = tcp_listen(server_ble2); - - /* 处理连接 注册函数,侦听到连接时被注册的函数被回调 */ - tcp_accept(server_ble2, tcpecho_accept_ble2); // 侦听到连接后,回调用户编写的tcpecho_accept /* 创建控制块 */ server_control = tcp_new(); @@ -315,24 +122,4 @@ void tcp_echo_init(void) tcp_accept(server_control, tcpecho_accept_control); // 侦听到连接后,回调用户编写的tcpecho_accept } -void user_send_data_hart1(uint8_t *data, uint16_t len) -{ - tcp_write(server_pcb_hart1, data, len, 1); -} -void user_send_data_hart2(uint8_t *data, uint16_t len) -{ - - tcp_write(server_pcb_hart2, data, len, 1); -} - -void user_send_data_ble1(uint8_t *data, uint16_t len) -{ - - tcp_write(server_pcb_ble1, data, len, 1); -} -void user_send_data_ble2(uint8_t *data, uint16_t len) -{ - - tcp_write(server_pcb_ble2, data, len, 1); -} diff --git a/User/board/inc/leds.h b/User/board/inc/leds.h index fc0724b..1d57714 100644 --- a/User/board/inc/leds.h +++ b/User/board/inc/leds.h @@ -11,12 +11,9 @@ typedef enum { - LEDS2_RED, - LEDS2_GREEN, - LEDS2_YELLOW, - LEDS3_RED, - LEDS3_GREEN, - LEDS3_YELLOW, + LEDS_RED, + LEDS_GREEN, + LEDS_YELLOW, LEDS_MAX, } leds_e; @@ -26,5 +23,4 @@ extern void leds_on_all(void); extern void leds_off_all(void); extern unsigned char tim_led_state; -// extern void lan8720_reset(void); #endif diff --git a/User/board/src/leds.c b/User/board/src/leds.c index de277fb..df25756 100644 --- a/User/board/src/leds.c +++ b/User/board/src/leds.c @@ -13,23 +13,14 @@ void leds_on(leds_e io) { switch (io) { - case LEDS2_RED: - HAL_GPIO_WritePin(LED2_R_GPIO_Port, LED2_R_Pin, GPIO_PIN_RESET); + case LEDS_RED: + HAL_GPIO_WritePin(LED_R_GPIO_Port, LED_R_Pin, GPIO_PIN_RESET); break; - case LEDS2_GREEN: - HAL_GPIO_WritePin(LED2_G_GPIO_Port, LED2_G_Pin, GPIO_PIN_RESET); + case LEDS_GREEN: + HAL_GPIO_WritePin(LED_G_GPIO_Port, LED_G_Pin, GPIO_PIN_RESET); break; - case LEDS2_YELLOW: - HAL_GPIO_WritePin(LED2_Y_GPIO_Port, LED2_Y_Pin, GPIO_PIN_RESET); - break; - case LEDS3_RED: - HAL_GPIO_WritePin(LED3_R_GPIO_Port, LED3_R_Pin, GPIO_PIN_RESET); - break; - case LEDS3_GREEN: - HAL_GPIO_WritePin(LED3_G_GPIO_Port, LED3_G_Pin, GPIO_PIN_RESET); - break; - case LEDS3_YELLOW: - HAL_GPIO_WritePin(LED3_Y_GPIO_Port, LED3_Y_Pin, GPIO_PIN_RESET); + case LEDS_YELLOW: + HAL_GPIO_WritePin(LED_Y_GPIO_Port, LED_Y_Pin, GPIO_PIN_RESET); break; default: break; @@ -47,23 +38,14 @@ void leds_off(leds_e io) { switch (io) { - case LEDS2_RED: - HAL_GPIO_WritePin(LED2_R_GPIO_Port, LED2_R_Pin, GPIO_PIN_SET); + case LEDS_RED: + HAL_GPIO_WritePin(LED_R_GPIO_Port, LED_R_Pin, GPIO_PIN_SET); break; - case LEDS2_GREEN: - HAL_GPIO_WritePin(LED2_G_GPIO_Port, LED2_G_Pin, GPIO_PIN_SET); + case LEDS_GREEN: + HAL_GPIO_WritePin(LED_G_GPIO_Port, LED_G_Pin, GPIO_PIN_SET); break; - case LEDS2_YELLOW: - HAL_GPIO_WritePin(LED2_Y_GPIO_Port, LED2_Y_Pin, GPIO_PIN_SET); - break; - case LEDS3_RED: - HAL_GPIO_WritePin(LED3_R_GPIO_Port, LED3_R_Pin, GPIO_PIN_SET); - break; - case LEDS3_GREEN: - HAL_GPIO_WritePin(LED3_G_GPIO_Port, LED3_G_Pin, GPIO_PIN_SET); - break; - case LEDS3_YELLOW: - HAL_GPIO_WritePin(LED3_Y_GPIO_Port, LED3_Y_Pin, GPIO_PIN_SET); + case LEDS_YELLOW: + HAL_GPIO_WritePin(LED_Y_GPIO_Port, LED_Y_Pin, GPIO_PIN_SET); break; default: break; @@ -80,12 +62,9 @@ void leds_off(leds_e io) */ void leds_on_all(void) { - HAL_GPIO_WritePin(LED2_R_GPIO_Port, LED2_R_Pin, GPIO_PIN_RESET); - HAL_GPIO_WritePin(LED2_G_GPIO_Port, LED2_G_Pin, GPIO_PIN_RESET); - HAL_GPIO_WritePin(LED2_Y_GPIO_Port, LED2_Y_Pin, GPIO_PIN_RESET); - HAL_GPIO_WritePin(LED3_R_GPIO_Port, LED3_R_Pin, GPIO_PIN_RESET); - HAL_GPIO_WritePin(LED3_G_GPIO_Port, LED3_G_Pin, GPIO_PIN_RESET); - HAL_GPIO_WritePin(LED3_Y_GPIO_Port, LED3_Y_Pin, GPIO_PIN_RESET); + HAL_GPIO_WritePin(LED_R_GPIO_Port, LED_R_Pin, GPIO_PIN_RESET); + HAL_GPIO_WritePin(LED_G_GPIO_Port, LED_G_Pin, GPIO_PIN_RESET); + HAL_GPIO_WritePin(LED_Y_GPIO_Port, LED_Y_Pin, GPIO_PIN_RESET); } /** @@ -95,18 +74,9 @@ void leds_on_all(void) */ void leds_off_all(void) { - HAL_GPIO_WritePin(LED2_R_GPIO_Port, LED2_R_Pin, GPIO_PIN_SET); - HAL_GPIO_WritePin(LED2_G_GPIO_Port, LED2_G_Pin, GPIO_PIN_SET); - HAL_GPIO_WritePin(LED2_Y_GPIO_Port, LED2_Y_Pin, GPIO_PIN_SET); - HAL_GPIO_WritePin(LED3_R_GPIO_Port, LED3_R_Pin, GPIO_PIN_SET); - HAL_GPIO_WritePin(LED3_G_GPIO_Port, LED3_G_Pin, GPIO_PIN_SET); - HAL_GPIO_WritePin(LED3_Y_GPIO_Port, LED3_Y_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(LED_R_GPIO_Port, LED_R_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(LED_G_GPIO_Port, LED_G_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(LED_Y_GPIO_Port, LED_Y_Pin, GPIO_PIN_SET); } -// void lan8720_reset(void) -// { -// LL_GPIO_ResetOutputPin(ETH_RESET_GPIO_Port, ETH_RESET_Pin); -// HAL_Delay(55); -// LL_GPIO_SetOutputPin(ETH_RESET_GPIO_Port, ETH_RESET_Pin); -// HAL_Delay(55); -// } + diff --git a/remote_dido_unit.ioc b/remote_dido_unit.ioc new file mode 100644 index 0000000..c407358 --- /dev/null +++ b/remote_dido_unit.ioc @@ -0,0 +1,440 @@ +#MicroXplorer Configuration settings - do not modify +CAD.formats= +CAD.pinconfig= +CAD.provider= +ETH.IPParameters=MediaInterface +ETH.MediaInterface=HAL_ETH_RMII_MODE +FREERTOS.FootprintOK=true +FREERTOS.IPParameters=Tasks01,configMAX_TASK_NAME_LEN,configENABLE_FPU,configMAX_PRIORITIES,FootprintOK +FREERTOS.Tasks01=lwip_task,2,512,start_tcp_task,Default,NULL,Dynamic,NULL,NULL;gpio_di_do_task,0,128,start_gpio_di_do_task,Default,NULL,Dynamic,NULL,NULL;leds_task,-3,128,start_leds_task,Default,NULL,Dynamic,NULL,NULL +FREERTOS.configENABLE_FPU=1 +FREERTOS.configMAX_PRIORITIES=32 +FREERTOS.configMAX_TASK_NAME_LEN=24 +File.Version=6 +GPIO.groupedBy=Group By Peripherals +KeepUserPlacement=false +LWIP.BSP.number=1 +LWIP.CMSIS_VERSION-Enabled=1 +LWIP.GATEWAY_ADDRESS=192.168.001.029 +LWIP.IPParameters=LWIP_DHCP,IP_ADDRESS,NETMASK_ADDRESS,GATEWAY_ADDRESS,LWIP_UDP,CMSIS_VERSION-Enabled +LWIP.IP_ADDRESS=192.168.001.100 +LWIP.LWIP_DHCP=0 +LWIP.LWIP_UDP=0 +LWIP.NETMASK_ADDRESS=255.255.255.000 +LWIP.Version=v2.1.2_Cube +LWIP0.BSP.STBoard=false +LWIP0.BSP.api=BSP_COMPONENT_DRIVER +LWIP0.BSP.component=LAN8742 +LWIP0.BSP.condition= +LWIP0.BSP.instance=LAN8742 +LWIP0.BSP.ip= +LWIP0.BSP.mode= +LWIP0.BSP.name=Driver_PHY +LWIP0.BSP.semaphore=S_LAN8742 +LWIP0.BSP.solution=LAN8742 +Mcu.CPN=STM32F407VGT6 +Mcu.Family=STM32F4 +Mcu.IP0=ETH +Mcu.IP1=FREERTOS +Mcu.IP2=LWIP +Mcu.IP3=NVIC +Mcu.IP4=RCC +Mcu.IP5=SYS +Mcu.IP6=TIM2 +Mcu.IP7=TIM3 +Mcu.IPNb=8 +Mcu.Name=STM32F407V(E-G)Tx +Mcu.Package=LQFP100 +Mcu.Pin0=PE2 +Mcu.Pin1=PE3 +Mcu.Pin10=PA2 +Mcu.Pin11=PA7 +Mcu.Pin12=PC4 +Mcu.Pin13=PC5 +Mcu.Pin14=PB1 +Mcu.Pin15=PB2 +Mcu.Pin16=PE7 +Mcu.Pin17=PB10 +Mcu.Pin18=PB11 +Mcu.Pin19=PB12 +Mcu.Pin2=PE4 +Mcu.Pin20=PB13 +Mcu.Pin21=PD10 +Mcu.Pin22=PD11 +Mcu.Pin23=PD12 +Mcu.Pin24=PD13 +Mcu.Pin25=PD14 +Mcu.Pin26=PD15 +Mcu.Pin27=PC9 +Mcu.Pin28=PA8 +Mcu.Pin29=PA11 +Mcu.Pin3=PE5 +Mcu.Pin30=PA12 +Mcu.Pin31=PA13 +Mcu.Pin32=PA14 +Mcu.Pin33=PA15 +Mcu.Pin34=PC12 +Mcu.Pin35=PD0 +Mcu.Pin36=PD1 +Mcu.Pin37=PD2 +Mcu.Pin38=PD3 +Mcu.Pin39=PD4 +Mcu.Pin4=PE6 +Mcu.Pin40=PD5 +Mcu.Pin41=PD6 +Mcu.Pin42=PD7 +Mcu.Pin43=PB3 +Mcu.Pin44=PB4 +Mcu.Pin45=PB5 +Mcu.Pin46=PB6 +Mcu.Pin47=PB7 +Mcu.Pin48=PE0 +Mcu.Pin49=PE1 +Mcu.Pin5=PH0-OSC_IN +Mcu.Pin50=VP_FREERTOS_VS_CMSIS_V1 +Mcu.Pin51=VP_LWIP_VS_Enabled +Mcu.Pin52=VP_SYS_VS_tim1 +Mcu.Pin53=VP_TIM2_VS_ClockSourceINT +Mcu.Pin54=VP_TIM3_VS_ClockSourceINT +Mcu.Pin6=PH1-OSC_OUT +Mcu.Pin7=PC0 +Mcu.Pin8=PC1 +Mcu.Pin9=PA1 +Mcu.PinsNb=55 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32F407VGTx +MxCube.Version=6.8.0 +MxDb.Version=DB.6.0.80 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false +NVIC.SavedPendsvIrqHandlerGenerated=true +NVIC.SavedSvcallIrqHandlerGenerated=true +NVIC.SavedSystickIrqHandlerGenerated=true +NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false +NVIC.TIM1_UP_TIM10_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true +NVIC.TIM3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.TimeBase=TIM1_UP_TIM10_IRQn +NVIC.TimeBaseIP=TIM1 +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +PA1.Mode=RMII +PA1.Signal=ETH_REF_CLK +PA11.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PA11.GPIO_Label=DO_CH9 +PA11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PA11.Locked=true +PA11.PinState=GPIO_PIN_SET +PA11.Signal=GPIO_Output +PA12.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PA12.GPIO_Label=DO_CH10 +PA12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PA12.Locked=true +PA12.PinState=GPIO_PIN_SET +PA12.Signal=GPIO_Output +PA13.Mode=Serial_Wire +PA13.Signal=SYS_JTMS-SWDIO +PA14.Mode=Serial_Wire +PA14.Signal=SYS_JTCK-SWCLK +PA15.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PA15.GPIO_Label=DO_CH11 +PA15.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PA15.Locked=true +PA15.PinState=GPIO_PIN_SET +PA15.Signal=GPIO_Output +PA2.Mode=RMII +PA2.Signal=ETH_MDIO +PA7.Mode=RMII +PA7.Signal=ETH_CRS_DV +PA8.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PA8.GPIO_Label=DO_CH8 +PA8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PA8.Locked=true +PA8.PinState=GPIO_PIN_SET +PA8.Signal=GPIO_Output +PB1.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PB1.GPIO_Label=LED_R +PB1.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PB1.Locked=true +PB1.PinState=GPIO_PIN_SET +PB1.Signal=GPIO_Output +PB10.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PB10.GPIO_Label=DO_EN +PB10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PB10.Locked=true +PB10.PinState=GPIO_PIN_SET +PB10.Signal=GPIO_Output +PB11.Mode=RMII +PB11.Signal=ETH_TX_EN +PB12.Mode=RMII +PB12.Signal=ETH_TXD0 +PB13.Mode=RMII +PB13.Signal=ETH_TXD1 +PB2.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PB2.GPIO_Label=LED_G +PB2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PB2.Locked=true +PB2.PinState=GPIO_PIN_SET +PB2.Signal=GPIO_Output +PB3.GPIOParameters=GPIO_PuPd,GPIO_Label +PB3.GPIO_Label=DI_CH5 +PB3.GPIO_PuPd=GPIO_PULLUP +PB3.Locked=true +PB3.Signal=GPIO_Input +PB4.GPIOParameters=GPIO_PuPd,GPIO_Label +PB4.GPIO_Label=DI_CH6 +PB4.GPIO_PuPd=GPIO_PULLUP +PB4.Locked=true +PB4.Signal=GPIO_Input +PB5.GPIOParameters=GPIO_PuPd,GPIO_Label +PB5.GPIO_Label=DI_CH7 +PB5.GPIO_PuPd=GPIO_PULLUP +PB5.Locked=true +PB5.Signal=GPIO_Input +PB6.GPIOParameters=GPIO_PuPd,GPIO_Label +PB6.GPIO_Label=DI_CH8 +PB6.GPIO_PuPd=GPIO_PULLUP +PB6.Locked=true +PB6.Signal=GPIO_Input +PB7.GPIOParameters=GPIO_PuPd,GPIO_Label +PB7.GPIO_Label=DI_CH9 +PB7.GPIO_PuPd=GPIO_PULLUP +PB7.Locked=true +PB7.Signal=GPIO_Input +PC0.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PC0.GPIO_Label=ETH_RESET +PC0.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM +PC0.Locked=true +PC0.PinState=GPIO_PIN_SET +PC0.Signal=GPIO_Output +PC1.Mode=RMII +PC1.Signal=ETH_MDC +PC12.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PC12.GPIO_Label=DO_CH12 +PC12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PC12.Locked=true +PC12.PinState=GPIO_PIN_SET +PC12.Signal=GPIO_Output +PC4.Mode=RMII +PC4.Signal=ETH_RXD0 +PC5.Mode=RMII +PC5.Signal=ETH_RXD1 +PC9.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PC9.GPIO_Label=DO_CH7 +PC9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PC9.Locked=true +PC9.PinState=GPIO_PIN_SET +PC9.Signal=GPIO_Output +PD0.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD0.GPIO_Label=DO_CH13 +PD0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD0.Locked=true +PD0.PinState=GPIO_PIN_SET +PD0.Signal=GPIO_Output +PD1.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD1.GPIO_Label=DO_CH14 +PD1.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD1.Locked=true +PD1.PinState=GPIO_PIN_SET +PD1.Signal=GPIO_Output +PD10.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD10.GPIO_Label=DO_CH1 +PD10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD10.Locked=true +PD10.PinState=GPIO_PIN_SET +PD10.Signal=GPIO_Output +PD11.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD11.GPIO_Label=DO_CH2 +PD11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD11.Locked=true +PD11.PinState=GPIO_PIN_SET +PD11.Signal=GPIO_Output +PD12.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD12.GPIO_Label=DO_CH3 +PD12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD12.Locked=true +PD12.PinState=GPIO_PIN_SET +PD12.Signal=GPIO_Output +PD13.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD13.GPIO_Label=DO_CH4 +PD13.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD13.Locked=true +PD13.PinState=GPIO_PIN_SET +PD13.Signal=GPIO_Output +PD14.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD14.GPIO_Label=DO_CH5 +PD14.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD14.Locked=true +PD14.PinState=GPIO_PIN_SET +PD14.Signal=GPIO_Output +PD15.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD15.GPIO_Label=DO_CH6 +PD15.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD15.Locked=true +PD15.PinState=GPIO_PIN_SET +PD15.Signal=GPIO_Output +PD2.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD2.GPIO_Label=DO_CH15 +PD2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD2.Locked=true +PD2.PinState=GPIO_PIN_SET +PD2.Signal=GPIO_Output +PD3.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PD3.GPIO_Label=DO_CH16 +PD3.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PD3.Locked=true +PD3.PinState=GPIO_PIN_SET +PD3.Signal=GPIO_Output +PD4.GPIOParameters=GPIO_PuPd,GPIO_Label +PD4.GPIO_Label=DI_CH1 +PD4.GPIO_PuPd=GPIO_PULLUP +PD4.Locked=true +PD4.Signal=GPIO_Input +PD5.GPIOParameters=GPIO_PuPd,GPIO_Label +PD5.GPIO_Label=DI_CH2 +PD5.GPIO_PuPd=GPIO_PULLUP +PD5.Locked=true +PD5.Signal=GPIO_Input +PD6.GPIOParameters=GPIO_PuPd,GPIO_Label +PD6.GPIO_Label=DI_CH3 +PD6.GPIO_PuPd=GPIO_PULLUP +PD6.Locked=true +PD6.Signal=GPIO_Input +PD7.GPIOParameters=GPIO_PuPd,GPIO_Label +PD7.GPIO_Label=DI_CH4 +PD7.GPIO_PuPd=GPIO_PULLUP +PD7.Locked=true +PD7.Signal=GPIO_Input +PE0.GPIOParameters=GPIO_PuPd,GPIO_Label +PE0.GPIO_Label=DI_CH10 +PE0.GPIO_PuPd=GPIO_PULLUP +PE0.Locked=true +PE0.Signal=GPIO_Input +PE1.GPIOParameters=GPIO_PuPd,GPIO_Label +PE1.GPIO_Label=DI_CH11 +PE1.GPIO_PuPd=GPIO_PULLUP +PE1.Locked=true +PE1.Signal=GPIO_Input +PE2.GPIOParameters=GPIO_PuPd,GPIO_Label +PE2.GPIO_Label=DI_CH12 +PE2.GPIO_PuPd=GPIO_PULLUP +PE2.Locked=true +PE2.Signal=GPIO_Input +PE3.GPIOParameters=GPIO_PuPd,GPIO_Label +PE3.GPIO_Label=DI_CH13 +PE3.GPIO_PuPd=GPIO_PULLUP +PE3.Locked=true +PE3.Signal=GPIO_Input +PE4.GPIOParameters=GPIO_PuPd,GPIO_Label +PE4.GPIO_Label=DI_CH14 +PE4.GPIO_PuPd=GPIO_PULLUP +PE4.Locked=true +PE4.Signal=GPIO_Input +PE5.GPIOParameters=GPIO_PuPd,GPIO_Label +PE5.GPIO_Label=DI_CH15 +PE5.GPIO_PuPd=GPIO_PULLUP +PE5.Locked=true +PE5.Signal=GPIO_Input +PE6.GPIOParameters=GPIO_PuPd,GPIO_Label +PE6.GPIO_Label=DI_CH16 +PE6.GPIO_PuPd=GPIO_PULLUP +PE6.Locked=true +PE6.Signal=GPIO_Input +PE7.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PE7.GPIO_Label=LED_Y +PE7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PE7.Locked=true +PE7.PinState=GPIO_PIN_SET +PE7.Signal=GPIO_Output +PH0-OSC_IN.Mode=HSE-External-Oscillator +PH0-OSC_IN.Signal=RCC_OSC_IN +PH1-OSC_OUT.Mode=HSE-External-Oscillator +PH1-OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=true +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32F407VGTx +ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.27.1 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=1 +ProjectManager.MainLocation=Core/Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=remote_dido_unit.ioc +ProjectManager.ProjectName=remote_dido_unit +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=MDK-ARM V5.32 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_LWIP_Init-LWIP-false-HAL-false,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true +RCC.48MHZClocksFreq_Value=55296000 +RCC.AHBFreq_Value=110592000 +RCC.APB1CLKDivider=RCC_HCLK_DIV4 +RCC.APB1Freq_Value=27648000 +RCC.APB1TimFreq_Value=55296000 +RCC.APB2CLKDivider=RCC_HCLK_DIV4 +RCC.APB2Freq_Value=27648000 +RCC.APB2TimFreq_Value=55296000 +RCC.CortexFreq_Value=110592000 +RCC.EthernetFreq_Value=110592000 +RCC.FCLKCortexFreq_Value=110592000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=110592000 +RCC.HSE_VALUE=11059200 +RCC.HSI_VALUE=16000000 +RCC.I2SClocksFreq_Value=106168320 +RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S +RCC.LSE_VALUE=32768 +RCC.LSI_VALUE=32000 +RCC.MCO2PinFreq_Value=110592000 +RCC.PLLCLKFreq_Value=110592000 +RCC.PLLM=10 +RCC.PLLN=200 +RCC.PLLQCLKFreq_Value=55296000 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.RTCFreq_Value=32000 +RCC.RTCHSEDivFreq_Value=5529600 +RCC.SYSCLKFreq_VALUE=110592000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.VCOI2SOutputFreq_Value=212336640 +RCC.VCOInputFreq_Value=1105920 +RCC.VCOOutputFreq_Value=221184000 +RCC.VcooutputI2S=106168320 +TIM2.IPParameters=Period +TIM2.Period=119 +TIM3.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE +TIM3.IPParameters=Prescaler,Period,AutoReloadPreload +TIM3.Period=999 +TIM3.Prescaler=55295 +VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1 +VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1 +VP_LWIP_VS_Enabled.Mode=Enabled +VP_LWIP_VS_Enabled.Signal=LWIP_VS_Enabled +VP_SYS_VS_tim1.Mode=TIM1 +VP_SYS_VS_tim1.Signal=SYS_VS_tim1 +VP_TIM2_VS_ClockSourceINT.Mode=Internal +VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT +VP_TIM3_VS_ClockSourceINT.Mode=Internal +VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT +board=custom +rtos.0.ip=FREERTOS diff --git a/semi-finished_product_testing.ioc b/semi-finished_product_testing.ioc deleted file mode 100644 index e0472f5..0000000 --- a/semi-finished_product_testing.ioc +++ /dev/null @@ -1,646 +0,0 @@ -#MicroXplorer Configuration settings - do not modify -CAD.formats= -CAD.pinconfig= -CAD.provider= -Dma.Request0=USART6_RX -Dma.Request1=USART6_TX -Dma.Request2=UART4_RX -Dma.Request3=UART4_TX -Dma.Request4=USART3_RX -Dma.Request5=USART3_TX -Dma.Request6=UART5_TX -Dma.Request7=UART5_RX -Dma.Request8=USART2_RX -Dma.Request9=USART2_TX -Dma.RequestsNb=10 -Dma.UART4_RX.2.Direction=DMA_PERIPH_TO_MEMORY -Dma.UART4_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.UART4_RX.2.Instance=DMA1_Stream2 -Dma.UART4_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.UART4_RX.2.MemInc=DMA_MINC_ENABLE -Dma.UART4_RX.2.Mode=DMA_NORMAL -Dma.UART4_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.UART4_RX.2.PeriphInc=DMA_PINC_DISABLE -Dma.UART4_RX.2.Priority=DMA_PRIORITY_VERY_HIGH -Dma.UART4_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.UART4_TX.3.Direction=DMA_MEMORY_TO_PERIPH -Dma.UART4_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.UART4_TX.3.Instance=DMA1_Stream4 -Dma.UART4_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.UART4_TX.3.MemInc=DMA_MINC_ENABLE -Dma.UART4_TX.3.Mode=DMA_NORMAL -Dma.UART4_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.UART4_TX.3.PeriphInc=DMA_PINC_DISABLE -Dma.UART4_TX.3.Priority=DMA_PRIORITY_VERY_HIGH -Dma.UART4_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.UART5_RX.7.Direction=DMA_PERIPH_TO_MEMORY -Dma.UART5_RX.7.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.UART5_RX.7.Instance=DMA1_Stream0 -Dma.UART5_RX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.UART5_RX.7.MemInc=DMA_MINC_ENABLE -Dma.UART5_RX.7.Mode=DMA_NORMAL -Dma.UART5_RX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.UART5_RX.7.PeriphInc=DMA_PINC_DISABLE -Dma.UART5_RX.7.Priority=DMA_PRIORITY_VERY_HIGH -Dma.UART5_RX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.UART5_TX.6.Direction=DMA_MEMORY_TO_PERIPH -Dma.UART5_TX.6.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.UART5_TX.6.Instance=DMA1_Stream7 -Dma.UART5_TX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.UART5_TX.6.MemInc=DMA_MINC_ENABLE -Dma.UART5_TX.6.Mode=DMA_NORMAL -Dma.UART5_TX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.UART5_TX.6.PeriphInc=DMA_PINC_DISABLE -Dma.UART5_TX.6.Priority=DMA_PRIORITY_VERY_HIGH -Dma.UART5_TX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.USART2_RX.8.Direction=DMA_PERIPH_TO_MEMORY -Dma.USART2_RX.8.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.USART2_RX.8.Instance=DMA1_Stream5 -Dma.USART2_RX.8.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.USART2_RX.8.MemInc=DMA_MINC_ENABLE -Dma.USART2_RX.8.Mode=DMA_NORMAL -Dma.USART2_RX.8.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.USART2_RX.8.PeriphInc=DMA_PINC_DISABLE -Dma.USART2_RX.8.Priority=DMA_PRIORITY_VERY_HIGH -Dma.USART2_RX.8.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.USART2_TX.9.Direction=DMA_MEMORY_TO_PERIPH -Dma.USART2_TX.9.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.USART2_TX.9.Instance=DMA1_Stream6 -Dma.USART2_TX.9.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.USART2_TX.9.MemInc=DMA_MINC_ENABLE -Dma.USART2_TX.9.Mode=DMA_NORMAL -Dma.USART2_TX.9.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.USART2_TX.9.PeriphInc=DMA_PINC_DISABLE -Dma.USART2_TX.9.Priority=DMA_PRIORITY_VERY_HIGH -Dma.USART2_TX.9.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.USART3_RX.4.Direction=DMA_PERIPH_TO_MEMORY -Dma.USART3_RX.4.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.USART3_RX.4.Instance=DMA1_Stream1 -Dma.USART3_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.USART3_RX.4.MemInc=DMA_MINC_ENABLE -Dma.USART3_RX.4.Mode=DMA_NORMAL -Dma.USART3_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.USART3_RX.4.PeriphInc=DMA_PINC_DISABLE -Dma.USART3_RX.4.Priority=DMA_PRIORITY_LOW -Dma.USART3_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.USART3_TX.5.Direction=DMA_MEMORY_TO_PERIPH -Dma.USART3_TX.5.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.USART3_TX.5.Instance=DMA1_Stream3 -Dma.USART3_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.USART3_TX.5.MemInc=DMA_MINC_ENABLE -Dma.USART3_TX.5.Mode=DMA_NORMAL -Dma.USART3_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.USART3_TX.5.PeriphInc=DMA_PINC_DISABLE -Dma.USART3_TX.5.Priority=DMA_PRIORITY_LOW -Dma.USART3_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.USART6_RX.0.Direction=DMA_PERIPH_TO_MEMORY -Dma.USART6_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.USART6_RX.0.Instance=DMA2_Stream1 -Dma.USART6_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.USART6_RX.0.MemInc=DMA_MINC_ENABLE -Dma.USART6_RX.0.Mode=DMA_NORMAL -Dma.USART6_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.USART6_RX.0.PeriphInc=DMA_PINC_DISABLE -Dma.USART6_RX.0.Priority=DMA_PRIORITY_LOW -Dma.USART6_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.USART6_TX.1.Direction=DMA_MEMORY_TO_PERIPH -Dma.USART6_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.USART6_TX.1.Instance=DMA2_Stream6 -Dma.USART6_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.USART6_TX.1.MemInc=DMA_MINC_ENABLE -Dma.USART6_TX.1.Mode=DMA_NORMAL -Dma.USART6_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.USART6_TX.1.PeriphInc=DMA_PINC_DISABLE -Dma.USART6_TX.1.Priority=DMA_PRIORITY_LOW -Dma.USART6_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -ETH.IPParameters=MediaInterface -ETH.MediaInterface=HAL_ETH_RMII_MODE -FREERTOS.FootprintOK=true -FREERTOS.IPParameters=Tasks01,configMAX_TASK_NAME_LEN,configENABLE_FPU,configMAX_PRIORITIES,FootprintOK -FREERTOS.Tasks01=lwip_task,2,512,start_tcp_task,Default,NULL,Dynamic,NULL,NULL;led_task,-2,128,start_led_toggle_task,Default,NULL,Dynamic,NULL,NULL;dac_task,0,512,start_dac_task,Default,NULL,Dynamic,NULL,NULL;adc_task,-1,128,start_adc_task,Default,NULL,Dynamic,NULL,NULL;gpio_di_do_task,0,128,start_gpio_di_do_task,Default,NULL,Dynamic,NULL,NULL -FREERTOS.configENABLE_FPU=1 -FREERTOS.configMAX_PRIORITIES=32 -FREERTOS.configMAX_TASK_NAME_LEN=24 -File.Version=6 -GPIO.groupedBy=Group By Peripherals -KeepUserPlacement=false -LWIP.BSP.number=1 -LWIP.CMSIS_VERSION-Enabled=1 -LWIP.GATEWAY_ADDRESS=192.168.001.029 -LWIP.IPParameters=LWIP_DHCP,IP_ADDRESS,NETMASK_ADDRESS,GATEWAY_ADDRESS,LWIP_UDP,CMSIS_VERSION-Enabled -LWIP.IP_ADDRESS=192.168.001.100 -LWIP.LWIP_DHCP=0 -LWIP.LWIP_UDP=0 -LWIP.NETMASK_ADDRESS=255.255.255.000 -LWIP.Version=v2.1.2_Cube -LWIP0.BSP.STBoard=false -LWIP0.BSP.api=BSP_COMPONENT_DRIVER -LWIP0.BSP.component=LAN8742 -LWIP0.BSP.condition= -LWIP0.BSP.instance=LAN8742 -LWIP0.BSP.ip= -LWIP0.BSP.mode= -LWIP0.BSP.name=Driver_PHY -LWIP0.BSP.semaphore=S_LAN8742 -LWIP0.BSP.solution=LAN8742 -Mcu.CPN=STM32F407VGT6 -Mcu.Family=STM32F4 -Mcu.IP0=DMA -Mcu.IP1=ETH -Mcu.IP10=UART4 -Mcu.IP11=UART5 -Mcu.IP12=USART2 -Mcu.IP13=USART3 -Mcu.IP14=USART6 -Mcu.IP2=FREERTOS -Mcu.IP3=LWIP -Mcu.IP4=NVIC -Mcu.IP5=RCC -Mcu.IP6=SPI1 -Mcu.IP7=SYS -Mcu.IP8=TIM2 -Mcu.IP9=TIM3 -Mcu.IPNb=15 -Mcu.Name=STM32F407V(E-G)Tx -Mcu.Package=LQFP100 -Mcu.Pin0=PE2 -Mcu.Pin1=PE3 -Mcu.Pin10=PC5 -Mcu.Pin11=PB1 -Mcu.Pin12=PB2 -Mcu.Pin13=PE7 -Mcu.Pin14=PE12 -Mcu.Pin15=PE13 -Mcu.Pin16=PE14 -Mcu.Pin17=PB11 -Mcu.Pin18=PB12 -Mcu.Pin19=PB13 -Mcu.Pin2=PH0-OSC_IN -Mcu.Pin20=PD8 -Mcu.Pin21=PD9 -Mcu.Pin22=PD11 -Mcu.Pin23=PD12 -Mcu.Pin24=PD13 -Mcu.Pin25=PD14 -Mcu.Pin26=PD15 -Mcu.Pin27=PC6 -Mcu.Pin28=PC7 -Mcu.Pin29=PC8 -Mcu.Pin3=PH1-OSC_OUT -Mcu.Pin30=PC9 -Mcu.Pin31=PA8 -Mcu.Pin32=PA11 -Mcu.Pin33=PA12 -Mcu.Pin34=PA13 -Mcu.Pin35=PA14 -Mcu.Pin36=PA15 -Mcu.Pin37=PC10 -Mcu.Pin38=PC11 -Mcu.Pin39=PC12 -Mcu.Pin4=PC0 -Mcu.Pin40=PD0 -Mcu.Pin41=PD1 -Mcu.Pin42=PD2 -Mcu.Pin43=PD3 -Mcu.Pin44=PD4 -Mcu.Pin45=PD5 -Mcu.Pin46=PD6 -Mcu.Pin47=PD7 -Mcu.Pin48=PB3 -Mcu.Pin49=PB4 -Mcu.Pin5=PC1 -Mcu.Pin50=PB5 -Mcu.Pin51=PB6 -Mcu.Pin52=PB7 -Mcu.Pin53=PE0 -Mcu.Pin54=PE1 -Mcu.Pin55=VP_FREERTOS_VS_CMSIS_V1 -Mcu.Pin56=VP_LWIP_VS_Enabled -Mcu.Pin57=VP_SYS_VS_tim1 -Mcu.Pin58=VP_TIM2_VS_ClockSourceINT -Mcu.Pin59=VP_TIM3_VS_ClockSourceINT -Mcu.Pin6=PA1 -Mcu.Pin7=PA2 -Mcu.Pin8=PA7 -Mcu.Pin9=PC4 -Mcu.PinsNb=60 -Mcu.ThirdPartyNb=0 -Mcu.UserConstants= -Mcu.UserName=STM32F407VGTx -MxCube.Version=6.8.0 -MxDb.Version=DB.6.0.80 -NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.EXTI1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.EXTI3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.ForceEnableDMAVector=true -NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false -NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false -NVIC.SavedPendsvIrqHandlerGenerated=true -NVIC.SavedSvcallIrqHandlerGenerated=true -NVIC.SavedSystickIrqHandlerGenerated=true -NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false -NVIC.TIM1_UP_TIM10_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true -NVIC.TIM3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.TimeBase=TIM1_UP_TIM10_IRQn -NVIC.TimeBaseIP=TIM1 -NVIC.UART4_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.UART5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.USART6_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -PA1.Mode=RMII -PA1.Signal=ETH_REF_CLK -PA11.GPIOParameters=GPIO_PuPd,GPIO_Label -PA11.GPIO_Label=DI_CH3 -PA11.GPIO_PuPd=GPIO_PULLUP -PA11.Locked=true -PA11.Signal=GPIO_Input -PA12.GPIOParameters=GPIO_PuPd,GPIO_Label -PA12.GPIO_Label=DI_CH4 -PA12.GPIO_PuPd=GPIO_PULLUP -PA12.Locked=true -PA12.Signal=GPIO_Input -PA13.Mode=Serial_Wire -PA13.Signal=SYS_JTMS-SWDIO -PA14.Mode=Serial_Wire -PA14.Signal=SYS_JTCK-SWCLK -PA15.GPIOParameters=GPIO_Speed,GPIO_Label -PA15.GPIO_Label=HART_CLK -PA15.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PA15.Locked=true -PA15.Signal=S_TIM2_CH1_ETR -PA2.Mode=RMII -PA2.Signal=ETH_MDIO -PA7.Mode=RMII -PA7.Signal=ETH_CRS_DV -PA8.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PA8.GPIO_Label=HART1_RST -PA8.GPIO_PuPd=GPIO_PULLUP -PA8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PA8.Locked=true -PA8.PinState=GPIO_PIN_SET -PA8.Signal=GPIO_Output -PB1.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PB1.GPIO_Label=LED3_R -PB1.GPIO_PuPd=GPIO_PULLUP -PB1.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM -PB1.Locked=true -PB1.PinState=GPIO_PIN_SET -PB1.Signal=GPIO_Output -PB11.Mode=RMII -PB11.Signal=ETH_TX_EN -PB12.Mode=RMII -PB12.Signal=ETH_TXD0 -PB13.Mode=RMII -PB13.Signal=ETH_TXD1 -PB2.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB2.GPIO_Label=LED3_G -PB2.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP -PB2.GPIO_PuPd=GPIO_PULLUP -PB2.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM -PB2.Locked=true -PB2.PinState=GPIO_PIN_SET -PB2.Signal=GPIO_Output -PB3.Locked=true -PB3.Mode=Full_Duplex_Master -PB3.Signal=SPI1_SCK -PB4.Locked=true -PB4.Mode=Full_Duplex_Master -PB4.Signal=SPI1_MISO -PB5.Locked=true -PB5.Mode=Full_Duplex_Master -PB5.Signal=SPI1_MOSI -PB6.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PB6.GPIO_Label=DAC1_CS -PB6.GPIO_PuPd=GPIO_PULLUP -PB6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PB6.Locked=true -PB6.PinState=GPIO_PIN_SET -PB6.Signal=GPIO_Output -PB7.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB7.GPIO_Label=DAC2_CS -PB7.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP -PB7.GPIO_PuPd=GPIO_PULLUP -PB7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PB7.Locked=true -PB7.PinState=GPIO_PIN_SET -PB7.Signal=GPIO_Output -PC0.GPIOParameters=GPIO_Speed,PinState,GPIO_Label -PC0.GPIO_Label=ETH_RESET -PC0.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM -PC0.Locked=true -PC0.PinState=GPIO_PIN_SET -PC0.Signal=GPIO_Output -PC1.Mode=RMII -PC1.Signal=ETH_MDC -PC10.GPIOParameters=GPIO_Label -PC10.GPIO_Label=LCD_TX -PC10.Locked=true -PC10.Mode=Asynchronous -PC10.Signal=UART4_TX -PC11.GPIOParameters=GPIO_Label -PC11.GPIO_Label=LCD_RX -PC11.Mode=Asynchronous -PC11.Signal=UART4_RX -PC12.GPIOParameters=GPIO_Label -PC12.GPIO_Label=HART1_TX -PC12.Mode=Asynchronous -PC12.Signal=UART5_TX -PC4.Mode=RMII -PC4.Signal=ETH_RXD0 -PC5.Mode=RMII -PC5.Signal=ETH_RXD1 -PC6.GPIOParameters=GPIO_Label -PC6.GPIO_Label=BLE1_TX -PC6.Mode=Asynchronous -PC6.Signal=USART6_TX -PC7.GPIOParameters=GPIO_Label -PC7.GPIO_Label=BLE1_RX -PC7.Mode=Asynchronous -PC7.Signal=USART6_RX -PC8.GPIOParameters=GPIO_PuPd,GPIO_Label -PC8.GPIO_Label=DI_CH1 -PC8.GPIO_PuPd=GPIO_PULLUP -PC8.Locked=true -PC8.Signal=GPIO_Input -PC9.GPIOParameters=GPIO_PuPd,GPIO_Label -PC9.GPIO_Label=DI_CH2 -PC9.GPIO_PuPd=GPIO_PULLUP -PC9.Locked=true -PC9.Signal=GPIO_Input -PD0.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PD0.GPIO_Label=HART1_RTS -PD0.GPIO_PuPd=GPIO_PULLUP -PD0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PD0.Locked=true -PD0.PinState=GPIO_PIN_SET -PD0.Signal=GPIO_Output -PD1.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI -PD1.GPIO_Label=HART1_OCD -PD1.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING -PD1.GPIO_PuPd=GPIO_PULLUP -PD1.Locked=true -PD1.Signal=GPXTI1 -PD11.GPIOParameters=GPIO_Speed,PinState,GPIO_Label,GPIO_ModeDefaultOutputPP -PD11.GPIO_Label=DO_CH4 -PD11.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP -PD11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PD11.Locked=true -PD11.PinState=GPIO_PIN_SET -PD11.Signal=GPIO_Output -PD12.GPIOParameters=GPIO_Speed,PinState,GPIO_Label -PD12.GPIO_Label=DO_CH3 -PD12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PD12.Locked=true -PD12.PinState=GPIO_PIN_SET -PD12.Signal=GPIO_Output -PD13.GPIOParameters=GPIO_Speed,PinState,GPIO_Label -PD13.GPIO_Label=DO_CH1 -PD13.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PD13.Locked=true -PD13.PinState=GPIO_PIN_SET -PD13.Signal=GPIO_Output -PD14.GPIOParameters=GPIO_Speed,PinState,GPIO_Label -PD14.GPIO_Label=DO_CH2 -PD14.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PD14.Locked=true -PD14.PinState=GPIO_PIN_SET -PD14.Signal=GPIO_Output -PD15.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PD15.GPIO_Label=DO_EN -PD15.GPIO_PuPd=GPIO_PULLUP -PD15.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PD15.Locked=true -PD15.PinState=GPIO_PIN_SET -PD15.Signal=GPIO_Output -PD2.GPIOParameters=GPIO_Label -PD2.GPIO_Label=HART1_RX -PD2.Mode=Asynchronous -PD2.Signal=UART5_RX -PD3.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI -PD3.GPIO_Label=HART2_OCD -PD3.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING -PD3.GPIO_PuPd=GPIO_PULLUP -PD3.Locked=true -PD3.Signal=GPXTI3 -PD4.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PD4.GPIO_Label=HART2_RTS -PD4.GPIO_PuPd=GPIO_PULLUP -PD4.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PD4.Locked=true -PD4.PinState=GPIO_PIN_SET -PD4.Signal=GPIO_Output -PD5.GPIOParameters=GPIO_Label -PD5.GPIO_Label=HART2_TX -PD5.Mode=Asynchronous -PD5.Signal=USART2_TX -PD6.GPIOParameters=GPIO_Label -PD6.GPIO_Label=HART2_RX -PD6.Locked=true -PD6.Mode=Asynchronous -PD6.Signal=USART2_RX -PD7.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label -PD7.GPIO_Label=HART2_RST -PD7.GPIO_PuPd=GPIO_PULLUP -PD7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PD7.Locked=true -PD7.Signal=GPIO_Output -PD8.GPIOParameters=GPIO_Label -PD8.GPIO_Label=BLE2_TX -PD8.Locked=true -PD8.Mode=Asynchronous -PD8.Signal=USART3_TX -PD9.GPIOParameters=GPIO_Label -PD9.GPIO_Label=BLE2_RX -PD9.Locked=true -PD9.Mode=Asynchronous -PD9.Signal=USART3_RX -PE0.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PE0.GPIO_Label=ADC_CS -PE0.GPIO_PuPd=GPIO_PULLUP -PE0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PE0.Locked=true -PE0.PinState=GPIO_PIN_SET -PE0.Signal=GPIO_Output -PE1.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PE1.GPIO_Label=AD7124_SYNC -PE1.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP -PE1.GPIO_PuPd=GPIO_PULLDOWN -PE1.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PE1.Locked=true -PE1.PinState=GPIO_PIN_SET -PE1.Signal=GPIO_Output -PE12.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PE12.GPIO_Label=LED2_R -PE12.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP -PE12.GPIO_PuPd=GPIO_PULLUP -PE12.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM -PE12.Locked=true -PE12.PinState=GPIO_PIN_SET -PE12.Signal=GPIO_Output -PE13.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PE13.GPIO_Label=LED2_G -PE13.GPIO_PuPd=GPIO_PULLUP -PE13.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM -PE13.Locked=true -PE13.PinState=GPIO_PIN_SET -PE13.Signal=GPIO_Output -PE14.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PE14.GPIO_Label=LED2_Y -PE14.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP -PE14.GPIO_PuPd=GPIO_PULLUP -PE14.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM -PE14.Locked=true -PE14.PinState=GPIO_PIN_SET -PE14.Signal=GPIO_Output -PE2.GPIOParameters=GPIO_PuPd,GPIO_Label -PE2.GPIO_Label=DI_CH5 -PE2.GPIO_PuPd=GPIO_PULLUP -PE2.Locked=true -PE2.Signal=GPIO_Input -PE3.GPIOParameters=GPIO_PuPd,GPIO_Label -PE3.GPIO_Label=DI_CH6 -PE3.GPIO_PuPd=GPIO_PULLUP -PE3.Locked=true -PE3.Signal=GPIO_Input -PE7.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label -PE7.GPIO_Label=LED3_Y -PE7.GPIO_PuPd=GPIO_PULLUP -PE7.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM -PE7.Locked=true -PE7.PinState=GPIO_PIN_SET -PE7.Signal=GPIO_Output -PH0-OSC_IN.Mode=HSE-External-Oscillator -PH0-OSC_IN.Signal=RCC_OSC_IN -PH1-OSC_OUT.Mode=HSE-External-Oscillator -PH1-OSC_OUT.Signal=RCC_OSC_OUT -PinOutPanel.RotationAngle=0 -ProjectManager.AskForMigrate=true -ProjectManager.BackupPrevious=false -ProjectManager.CompilerOptimize=6 -ProjectManager.ComputerToolchain=false -ProjectManager.CoupleFile=true -ProjectManager.CustomerFirmwarePackage= -ProjectManager.DefaultFWLocation=true -ProjectManager.DeletePrevious=true -ProjectManager.DeviceId=STM32F407VGTx -ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.27.1 -ProjectManager.FreePins=false -ProjectManager.HalAssertFull=false -ProjectManager.HeapSize=0x200 -ProjectManager.KeepUserCode=true -ProjectManager.LastFirmware=true -ProjectManager.LibraryCopy=1 -ProjectManager.MainLocation=Core/Src -ProjectManager.NoMain=false -ProjectManager.PreviousToolchain= -ProjectManager.ProjectBuild=false -ProjectManager.ProjectFileName=semi-finished_product_testing.ioc -ProjectManager.ProjectName=semi-finished_product_testing -ProjectManager.ProjectStructure= -ProjectManager.RegisterCallBack= -ProjectManager.StackSize=0x400 -ProjectManager.TargetToolchain=MDK-ARM V5.32 -ProjectManager.ToolChainLocation= -ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_LWIP_Init-LWIP-false-HAL-false,5-MX_TIM3_Init-TIM3-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_USART6_UART_Init-USART6-false-HAL-true,8-MX_UART4_Init-UART4-false-HAL-true,9-MX_TIM2_Init-TIM2-false-HAL-true,10-MX_UART5_Init-UART5-false-HAL-true,11-MX_USART2_UART_Init-USART2-false-HAL-true,12-MX_USART3_UART_Init-USART3-false-HAL-true -RCC.48MHZClocksFreq_Value=55296000 -RCC.AHBFreq_Value=110592000 -RCC.APB1CLKDivider=RCC_HCLK_DIV4 -RCC.APB1Freq_Value=27648000 -RCC.APB1TimFreq_Value=55296000 -RCC.APB2CLKDivider=RCC_HCLK_DIV4 -RCC.APB2Freq_Value=27648000 -RCC.APB2TimFreq_Value=55296000 -RCC.CortexFreq_Value=110592000 -RCC.EthernetFreq_Value=110592000 -RCC.FCLKCortexFreq_Value=110592000 -RCC.FamilyName=M -RCC.HCLKFreq_Value=110592000 -RCC.HSE_VALUE=11059200 -RCC.HSI_VALUE=16000000 -RCC.I2SClocksFreq_Value=106168320 -RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S -RCC.LSE_VALUE=32768 -RCC.LSI_VALUE=32000 -RCC.MCO2PinFreq_Value=110592000 -RCC.PLLCLKFreq_Value=110592000 -RCC.PLLM=10 -RCC.PLLN=200 -RCC.PLLQCLKFreq_Value=55296000 -RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE -RCC.RTCFreq_Value=32000 -RCC.RTCHSEDivFreq_Value=5529600 -RCC.SYSCLKFreq_VALUE=110592000 -RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.VCOI2SOutputFreq_Value=212336640 -RCC.VCOInputFreq_Value=1105920 -RCC.VCOOutputFreq_Value=221184000 -RCC.VcooutputI2S=106168320 -SH.GPXTI1.0=GPIO_EXTI1 -SH.GPXTI1.ConfNb=1 -SH.GPXTI3.0=GPIO_EXTI3 -SH.GPXTI3.ConfNb=1 -SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1 -SH.S_TIM2_CH1_ETR.ConfNb=1 -SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_256 -SPI1.CLKPhase=SPI_PHASE_2EDGE -SPI1.CLKPolarity=SPI_POLARITY_HIGH -SPI1.CalculateBaudRate=108.0 KBits/s -SPI1.Direction=SPI_DIRECTION_2LINES -SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler,CLKPolarity,CLKPhase -SPI1.Mode=SPI_MODE_MASTER -SPI1.VirtualType=VM_MASTER -TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 -TIM2.IPParameters=Channel-PWM Generation1 CH1,Period,Pulse-PWM Generation1 CH1 -TIM2.Period=119 -TIM2.Pulse-PWM\ Generation1\ CH1=60 -TIM3.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE -TIM3.IPParameters=Prescaler,Period,AutoReloadPreload -TIM3.Period=999 -TIM3.Prescaler=55295 -UART4.IPParameters=VirtualMode -UART4.VirtualMode=Asynchronous -UART5.BaudRate=1200 -UART5.IPParameters=VirtualMode,BaudRate,WordLength,Parity -UART5.Parity=PARITY_ODD -UART5.VirtualMode=Asynchronous -UART5.WordLength=WORDLENGTH_9B -USART2.BaudRate=1200 -USART2.IPParameters=VirtualMode,BaudRate,WordLength,Parity -USART2.Parity=PARITY_ODD -USART2.VirtualMode=VM_ASYNC -USART2.WordLength=WORDLENGTH_9B -USART3.IPParameters=VirtualMode -USART3.VirtualMode=VM_ASYNC -USART6.IPParameters=VirtualMode -USART6.VirtualMode=VM_ASYNC -VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1 -VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1 -VP_LWIP_VS_Enabled.Mode=Enabled -VP_LWIP_VS_Enabled.Signal=LWIP_VS_Enabled -VP_SYS_VS_tim1.Mode=TIM1 -VP_SYS_VS_tim1.Signal=SYS_VS_tim1 -VP_TIM2_VS_ClockSourceINT.Mode=Internal -VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT -VP_TIM3_VS_ClockSourceINT.Mode=Internal -VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT -board=custom -rtos.0.ip=FREERTOS