diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index 05b7a9d..b62c8ab 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -99,6 +99,8 @@ void Error_Handler(void);
#define DI_CH6_GPIO_Port GPIOE
#define ETH_RESET_Pin GPIO_PIN_0
#define ETH_RESET_GPIO_Port GPIOC
+#define T3_CH3_BUZZER_Pin GPIO_PIN_0
+#define T3_CH3_BUZZER_GPIO_Port GPIOB
#define LED3_R_Pin GPIO_PIN_1
#define LED3_R_GPIO_Port GPIOB
#define LED3_G_Pin GPIO_PIN_2
diff --git a/Core/Inc/stm32f4xx_it.h b/Core/Inc/stm32f4xx_it.h
index 8573ed5..3368879 100644
--- a/Core/Inc/stm32f4xx_it.h
+++ b/Core/Inc/stm32f4xx_it.h
@@ -62,7 +62,6 @@ void DMA1_Stream4_IRQHandler(void);
void DMA1_Stream5_IRQHandler(void);
void DMA1_Stream6_IRQHandler(void);
void EXTI9_5_IRQHandler(void);
-void TIM3_IRQHandler(void);
void TIM4_IRQHandler(void);
void USART1_IRQHandler(void);
void USART2_IRQHandler(void);
diff --git a/Core/Src/freertos.c b/Core/Src/freertos.c
index 93ee0f2..9c93d6b 100644
--- a/Core/Src/freertos.c
+++ b/Core/Src/freertos.c
@@ -73,18 +73,18 @@ uint8_t di_state_last[DI_MAX] = {0};
uint8_t di_state_now[DI_MAX] = {0};
/* USER CODE END FunctionPrototypes */
-void start_tcp_task(void const *argument);
-void start_led_toggle_task(void const *argument);
-void start_dac_task(void const *argument);
-void start_adc_task(void const *argument);
-void start_gpio_di_do_task(void const *argument);
-void start_ec11_task(void const *argument);
+void start_tcp_task(void const * argument);
+void start_led_toggle_task(void const * argument);
+void start_dac_task(void const * argument);
+void start_adc_task(void const * argument);
+void start_gpio_di_do_task(void const * argument);
+void start_ec11_task(void const * argument);
extern void MX_LWIP_Init(void);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* GetIdleTaskMemory prototype (linked to static allocation support) */
-void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize);
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer;
@@ -100,12 +100,11 @@ void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackTyp
/* USER CODE END GET_IDLE_TASK_MEMORY */
/**
- * @brief FreeRTOS initialization
- * @param None
- * @retval None
- */
-void MX_FREERTOS_Init(void)
-{
+ * @brief FreeRTOS initialization
+ * @param None
+ * @retval None
+ */
+void MX_FREERTOS_Init(void) {
/* USER CODE BEGIN Init */
/* USER CODE END Init */
@@ -154,6 +153,7 @@ void MX_FREERTOS_Init(void)
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
/* USER CODE END RTOS_THREADS */
+
}
/* USER CODE BEGIN Header_start_tcp_task */
@@ -163,7 +163,7 @@ void MX_FREERTOS_Init(void)
* @retval None
*/
/* USER CODE END Header_start_tcp_task */
-void start_tcp_task(void const *argument)
+void start_tcp_task(void const * argument)
{
/* init code for LWIP */
MX_LWIP_Init();
@@ -185,7 +185,7 @@ void start_tcp_task(void const *argument)
* @retval None
*/
/* USER CODE END Header_start_led_toggle_task */
-void start_led_toggle_task(void const *argument)
+void start_led_toggle_task(void const * argument)
{
/* USER CODE BEGIN start_led_toggle_task */
/* Infinite loop */
@@ -204,7 +204,7 @@ void start_led_toggle_task(void const *argument)
* @retval None
*/
/* USER CODE END Header_start_dac_task */
-void start_dac_task(void const *argument)
+void start_dac_task(void const * argument)
{
/* USER CODE BEGIN start_dac_task */
dac161s997_init();
@@ -227,7 +227,7 @@ void start_dac_task(void const *argument)
* @retval None
*/
/* USER CODE END Header_start_adc_task */
-void start_adc_task(void const *argument)
+void start_adc_task(void const * argument)
{
/* USER CODE BEGIN start_adc_task */
ad7124_setup();
@@ -262,7 +262,7 @@ void start_adc_task(void const *argument)
* @retval None
*/
/* USER CODE END Header_start_gpio_di_do_task */
-void start_gpio_di_do_task(void const *argument)
+void start_gpio_di_do_task(void const * argument)
{
/* USER CODE BEGIN start_gpio_di_do_task */
/* Infinite loop */
@@ -273,9 +273,9 @@ void start_gpio_di_do_task(void const *argument)
uint8_t tx_data_len = 7 + DI_MAX;
uint8_t tx_data[32] = {0};
tx_data[0] = FRAME_HEAD; // 帧头
- tx_data[1] = COM_OK; // 状态码
- tx_data[2] = DEVICE_NUM; // 设备号
- tx_data[3] = SEND_STATE_CMD; // 命令号
+ tx_data[1] = COM_OK; // 状?码
+ tx_data[2] = DEVICE_NUM; // 设备?
+ tx_data[3] = SEND_STATE_CMD; // 命令?
tx_data[4] = DI_MAX; // 数据长度
for (di_ch = 0; di_ch < DI_MAX; di_ch++)
{
@@ -310,7 +310,7 @@ void start_gpio_di_do_task(void const *argument)
* @retval None
*/
/* USER CODE END Header_start_ec11_task */
-void start_ec11_task(void const *argument)
+void start_ec11_task(void const * argument)
{
/* USER CODE BEGIN start_ec11_task */
/* Infinite loop */
diff --git a/Core/Src/main.c b/Core/Src/main.c
index 29e263d..bfded0a 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -132,7 +132,8 @@ int main(void)
// end
hart_ht1200m_reset(); // 初始化HT1200M模块
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); // PWM输出，用于驱动HT1200M模块
- HAL_TIM_Encoder_Start(&htim1, TIM_CHANNEL_ALL); // 旋转编码器输入，用于检测旋转编码器状态
+ HAL_TIM_Encoder_Start(&htim1, TIM_CHANNEL_ALL); // 旋转编码器输入，用于�????测旋转编码器状�??
+ HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3); // PWM输出，用于驱动HT1200M模块
/* USER CODE END 2 */
/* Call init function for freertos objects (in freertos.c) */
diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c
index eb00275..2fa5647 100644
--- a/Core/Src/stm32f4xx_it.c
+++ b/Core/Src/stm32f4xx_it.c
@@ -62,7 +62,6 @@ extern struct tcp_pcb *server_pcb_ble2;
/* External variables --------------------------------------------------------*/
extern ETH_HandleTypeDef heth;
-extern TIM_HandleTypeDef htim3;
extern DMA_HandleTypeDef hdma_uart4_rx;
extern DMA_HandleTypeDef hdma_uart4_tx;
extern DMA_HandleTypeDef hdma_uart5_tx;
@@ -91,8 +90,8 @@ extern TIM_HandleTypeDef htim4;
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
- * @brief This function handles Non maskable interrupt.
- */
+ * @brief This function handles Non maskable interrupt.
+ */
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
@@ -106,8 +105,8 @@ void NMI_Handler(void)
}
/**
- * @brief This function handles Hard fault interrupt.
- */
+ * @brief This function handles Hard fault interrupt.
+ */
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
@@ -121,8 +120,8 @@ void HardFault_Handler(void)
}
/**
- * @brief This function handles Memory management fault.
- */
+ * @brief This function handles Memory management fault.
+ */
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
@@ -136,8 +135,8 @@ void MemManage_Handler(void)
}
/**
- * @brief This function handles Pre-fetch fault, memory access fault.
- */
+ * @brief This function handles Pre-fetch fault, memory access fault.
+ */
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
@@ -151,8 +150,8 @@ void BusFault_Handler(void)
}
/**
- * @brief This function handles Undefined instruction or illegal state.
- */
+ * @brief This function handles Undefined instruction or illegal state.
+ */
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
@@ -166,8 +165,8 @@ void UsageFault_Handler(void)
}
/**
- * @brief This function handles Debug monitor.
- */
+ * @brief This function handles Debug monitor.
+ */
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
@@ -186,8 +185,8 @@ void DebugMon_Handler(void)
/******************************************************************************/
/**
- * @brief This function handles EXTI line1 interrupt.
- */
+ * @brief This function handles EXTI line1 interrupt.
+ */
void EXTI1_IRQHandler(void)
{
/* USER CODE BEGIN EXTI1_IRQn 0 */
@@ -200,8 +199,8 @@ void EXTI1_IRQHandler(void)
}
/**
- * @brief This function handles EXTI line3 interrupt.
- */
+ * @brief This function handles EXTI line3 interrupt.
+ */
void EXTI3_IRQHandler(void)
{
/* USER CODE BEGIN EXTI3_IRQn 0 */
@@ -214,8 +213,8 @@ void EXTI3_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream0 global interrupt.
- */
+ * @brief This function handles DMA1 stream0 global interrupt.
+ */
void DMA1_Stream0_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
@@ -228,8 +227,8 @@ void DMA1_Stream0_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream1 global interrupt.
- */
+ * @brief This function handles DMA1 stream1 global interrupt.
+ */
void DMA1_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
@@ -242,8 +241,8 @@ void DMA1_Stream1_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream2 global interrupt.
- */
+ * @brief This function handles DMA1 stream2 global interrupt.
+ */
void DMA1_Stream2_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
@@ -256,8 +255,8 @@ void DMA1_Stream2_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream3 global interrupt.
- */
+ * @brief This function handles DMA1 stream3 global interrupt.
+ */
void DMA1_Stream3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
@@ -270,8 +269,8 @@ void DMA1_Stream3_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream4 global interrupt.
- */
+ * @brief This function handles DMA1 stream4 global interrupt.
+ */
void DMA1_Stream4_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
@@ -284,8 +283,8 @@ void DMA1_Stream4_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream5 global interrupt.
- */
+ * @brief This function handles DMA1 stream5 global interrupt.
+ */
void DMA1_Stream5_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
@@ -298,8 +297,8 @@ void DMA1_Stream5_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream6 global interrupt.
- */
+ * @brief This function handles DMA1 stream6 global interrupt.
+ */
void DMA1_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
@@ -312,8 +311,8 @@ void DMA1_Stream6_IRQHandler(void)
}
/**
- * @brief This function handles EXTI line[9:5] interrupts.
- */
+ * @brief This function handles EXTI line[9:5] interrupts.
+ */
void EXTI9_5_IRQHandler(void)
{
/* USER CODE BEGIN EXTI9_5_IRQn 0 */
@@ -326,22 +325,8 @@ void EXTI9_5_IRQHandler(void)
}
/**
- * @brief This function handles TIM3 global interrupt.
- */
-void TIM3_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM3_IRQn 0 */
-
- /* USER CODE END TIM3_IRQn 0 */
- HAL_TIM_IRQHandler(&htim3);
- /* USER CODE BEGIN TIM3_IRQn 1 */
-
- /* USER CODE END TIM3_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM4 global interrupt.
- */
+ * @brief This function handles TIM4 global interrupt.
+ */
void TIM4_IRQHandler(void)
{
/* USER CODE BEGIN TIM4_IRQn 0 */
@@ -354,8 +339,8 @@ void TIM4_IRQHandler(void)
}
/**
- * @brief This function handles USART1 global interrupt.
- */
+ * @brief This function handles USART1 global interrupt.
+ */
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
@@ -368,8 +353,8 @@ void USART1_IRQHandler(void)
}
/**
- * @brief This function handles USART2 global interrupt.
- */
+ * @brief This function handles USART2 global interrupt.
+ */
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
@@ -381,8 +366,8 @@ void USART2_IRQHandler(void)
}
/**
- * @brief This function handles USART3 global interrupt.
- */
+ * @brief This function handles USART3 global interrupt.
+ */
void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
@@ -395,8 +380,8 @@ void USART3_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream7 global interrupt.
- */
+ * @brief This function handles DMA1 stream7 global interrupt.
+ */
void DMA1_Stream7_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
@@ -409,8 +394,8 @@ void DMA1_Stream7_IRQHandler(void)
}
/**
- * @brief This function handles UART4 global interrupt.
- */
+ * @brief This function handles UART4 global interrupt.
+ */
void UART4_IRQHandler(void)
{
/* USER CODE BEGIN UART4_IRQn 0 */
@@ -422,8 +407,8 @@ void UART4_IRQHandler(void)
}
/**
- * @brief This function handles UART5 global interrupt.
- */
+ * @brief This function handles UART5 global interrupt.
+ */
void UART5_IRQHandler(void)
{
/* USER CODE BEGIN UART5_IRQn 0 */
@@ -434,8 +419,8 @@ void UART5_IRQHandler(void)
}
/**
- * @brief This function handles DMA2 stream1 global interrupt.
- */
+ * @brief This function handles DMA2 stream1 global interrupt.
+ */
void DMA2_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
@@ -448,8 +433,8 @@ void DMA2_Stream1_IRQHandler(void)
}
/**
- * @brief This function handles DMA2 stream2 global interrupt.
- */
+ * @brief This function handles DMA2 stream2 global interrupt.
+ */
void DMA2_Stream2_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
@@ -462,8 +447,8 @@ void DMA2_Stream2_IRQHandler(void)
}
/**
- * @brief This function handles Ethernet global interrupt.
- */
+ * @brief This function handles Ethernet global interrupt.
+ */
void ETH_IRQHandler(void)
{
/* USER CODE BEGIN ETH_IRQn 0 */
@@ -476,8 +461,8 @@ void ETH_IRQHandler(void)
}
/**
- * @brief This function handles DMA2 stream6 global interrupt.
- */
+ * @brief This function handles DMA2 stream6 global interrupt.
+ */
void DMA2_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
@@ -490,8 +475,8 @@ void DMA2_Stream6_IRQHandler(void)
}
/**
- * @brief This function handles DMA2 stream7 global interrupt.
- */
+ * @brief This function handles DMA2 stream7 global interrupt.
+ */
void DMA2_Stream7_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
@@ -504,8 +489,8 @@ void DMA2_Stream7_IRQHandler(void)
}
/**
- * @brief This function handles USART6 global interrupt.
- */
+ * @brief This function handles USART6 global interrupt.
+ */
void USART6_IRQHandler(void)
{
/* USER CODE BEGIN USART6_IRQn 0 */
diff --git a/Core/Src/tim.c b/Core/Src/tim.c
index 8285c5f..b28a5cb 100644
--- a/Core/Src/tim.c
+++ b/Core/Src/tim.c
@@ -137,16 +137,17 @@ void MX_TIM3_Init(void)
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3;
- htim3.Init.Prescaler = 55295;
+ htim3.Init.Prescaler = 54;
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim3.Init.Period = 999;
+ htim3.Init.Period = 370;
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
+ htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
{
Error_Handler();
@@ -156,15 +157,28 @@ void MX_TIM3_Init(void)
{
Error_Handler();
}
+ if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
+ {
+ Error_Handler();
+ }
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
+ sConfigOC.OCMode = TIM_OCMODE_PWM1;
+ sConfigOC.Pulse = 92;
+ sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+ {
+ Error_Handler();
+ }
/* USER CODE BEGIN TIM3_Init 2 */
HAL_TIM_Base_Start_IT(&htim3);
/* USER CODE END TIM3_Init 2 */
+ HAL_TIM_MspPostInit(&htim3);
}
@@ -219,10 +233,6 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM3_MspInit 0 */
/* TIM3 clock enable */
__HAL_RCC_TIM3_CLK_ENABLE();
-
- /* TIM3 interrupt Init */
- HAL_NVIC_SetPriority(TIM3_IRQn, 5, 0);
- HAL_NVIC_EnableIRQ(TIM3_IRQn);
/* USER CODE BEGIN TIM3_MspInit 1 */
/* USER CODE END TIM3_MspInit 1 */
@@ -237,7 +247,6 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
-
__HAL_RCC_GPIOA_CLK_ENABLE();
/**TIM2 GPIO Configuration
PA15 ------> TIM2_CH1
@@ -253,6 +262,27 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
/* USER CODE END TIM2_MspPostInit 1 */
}
+ else if(timHandle->Instance==TIM3)
+ {
+ /* USER CODE BEGIN TIM3_MspPostInit 0 */
+
+ /* USER CODE END TIM3_MspPostInit 0 */
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**TIM3 GPIO Configuration
+ PB0 ------> TIM3_CH3
+ */
+ GPIO_InitStruct.Pin = T3_CH3_BUZZER_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
+ HAL_GPIO_Init(T3_CH3_BUZZER_GPIO_Port, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN TIM3_MspPostInit 1 */
+
+ /* USER CODE END TIM3_MspPostInit 1 */
+ }
}
@@ -300,9 +330,6 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM3_CLK_DISABLE();
-
- /* TIM3 interrupt Deinit */
- HAL_NVIC_DisableIRQ(TIM3_IRQn);
/* USER CODE BEGIN TIM3_MspDeInit 1 */
/* USER CODE END TIM3_MspDeInit 1 */
diff --git a/LWIP/App/lwip.c b/LWIP/App/lwip.c
index 98d2beb..bc6c699 100644
--- a/LWIP/App/lwip.c
+++ b/LWIP/App/lwip.c
@@ -22,7 +22,7 @@
#include "lwip.h"
#include "lwip/init.h"
#include "lwip/netif.h"
-#if defined(__CC_ARM) /* MDK ARM Compiler */
+#if defined ( __CC_ARM ) /* MDK ARM Compiler */
#include "lwip/sio.h"
#endif /* MDK ARM Compiler */
#include "ethernetif.h"
@@ -53,8 +53,8 @@ uint8_t GATEWAY_ADDRESS[4];
/* USER CODE END 2 */
/**
- * LwIP initialization function
- */
+ * LwIP initialization function
+ */
void MX_LWIP_Init(void)
{
/* IP addresses initialization */
@@ -71,15 +71,15 @@ void MX_LWIP_Init(void)
GATEWAY_ADDRESS[2] = 1;
GATEWAY_ADDRESS[3] = 29;
- /* USER CODE BEGIN IP_ADDRESSES */
- /* USER CODE END IP_ADDRESSES */
+/* USER CODE BEGIN IP_ADDRESSES */
+/* USER CODE END IP_ADDRESSES */
/* Initilialize the LwIP stack with RTOS */
- tcpip_init(NULL, NULL);
+ tcpip_init( NULL, NULL );
/* IP addresses initialization without DHCP (IPv4) */
IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
- IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1], NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
+ IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);
/* add the network interface (IPv4/IPv6) with RTOS */
@@ -103,14 +103,14 @@ void MX_LWIP_Init(void)
netif_set_link_callback(&gnetif, ethernet_link_status_updated);
/* Create the Ethernet link handler thread */
- /* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
+/* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthLink, ethernet_link_thread, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2);
osThreadCreate(osThread(EthLink), &gnetif);
- /* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
+/* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
- /* USER CODE BEGIN 3 */
+/* USER CODE BEGIN 3 */
- /* USER CODE END 3 */
+/* USER CODE END 3 */
}
#ifdef USE_OBSOLETE_USER_CODE_SECTION_4
@@ -121,25 +121,25 @@ void MX_LWIP_Init(void)
#endif
/**
- * @brief Notify the User about the network interface config status
- * @param netif: the network interface
- * @retval None
- */
+ * @brief Notify the User about the network interface config status
+ * @param netif: the network interface
+ * @retval None
+ */
static void ethernet_link_status_updated(struct netif *netif)
{
if (netif_is_up(netif))
{
- /* USER CODE BEGIN 5 */
- /* USER CODE END 5 */
+/* USER CODE BEGIN 5 */
+/* USER CODE END 5 */
}
else /* netif is down */
{
- /* USER CODE BEGIN 6 */
- /* USER CODE END 6 */
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
}
}
-#if defined(__CC_ARM) /* MDK ARM Compiler */
+#if defined ( __CC_ARM ) /* MDK ARM Compiler */
/**
* Opens a serial device for communication.
*
@@ -150,9 +150,9 @@ sio_fd_t sio_open(u8_t devnum)
{
sio_fd_t sd;
- /* USER CODE BEGIN 7 */
+/* USER CODE BEGIN 7 */
sd = 0; // dummy code
- /* USER CODE END 7 */
+/* USER CODE END 7 */
return sd;
}
@@ -167,8 +167,8 @@ sio_fd_t sio_open(u8_t devnum)
*/
void sio_send(u8_t c, sio_fd_t fd)
{
- /* USER CODE BEGIN 8 */
- /* USER CODE END 8 */
+/* USER CODE BEGIN 8 */
+/* USER CODE END 8 */
}
/**
@@ -186,9 +186,9 @@ u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len)
{
u32_t recved_bytes;
- /* USER CODE BEGIN 9 */
+/* USER CODE BEGIN 9 */
recved_bytes = 0; // dummy code
- /* USER CODE END 9 */
+/* USER CODE END 9 */
return recved_bytes;
}
@@ -205,9 +205,10 @@ u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len)
{
u32_t recved_bytes;
- /* USER CODE BEGIN 10 */
+/* USER CODE BEGIN 10 */
recved_bytes = 0; // dummy code
- /* USER CODE END 10 */
+/* USER CODE END 10 */
return recved_bytes;
}
#endif /* MDK ARM Compiler */
+
diff --git a/LWIP/Target/ethernetif.c b/LWIP/Target/ethernetif.c
index 77e8176..6a15e00 100644
--- a/LWIP/Target/ethernetif.c
+++ b/LWIP/Target/ethernetif.c
@@ -38,7 +38,7 @@
/* Private define ------------------------------------------------------------*/
/* The time to block waiting for input. */
-#define TIME_WAITING_FOR_INPUT (portMAX_DELAY)
+#define TIME_WAITING_FOR_INPUT ( portMAX_DELAY )
/* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */
/* Stack size of the interface thread */
#define INTERFACE_THREAD_STACK_SIZE (350)
@@ -48,8 +48,8 @@
#define IFNAME1 't'
/* ETH Setting */
-#define ETH_DMA_TRANSMIT_TIMEOUT (20U)
-#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
+#define ETH_DMA_TRANSMIT_TIMEOUT ( 20U )
+#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
/* USER CODE BEGIN 1 */
@@ -81,8 +81,8 @@
/* Data Type Definitions */
typedef enum
{
- RX_ALLOC_OK = 0x00,
- RX_ALLOC_ERROR = 0x01
+ RX_ALLOC_OK = 0x00,
+ RX_ALLOC_ERROR = 0x01
} RxAllocStatusTypeDef;
typedef struct
@@ -92,40 +92,40 @@ typedef struct
} RxBuff_t;
/* Memory Pool Declaration */
-#define ETH_RX_BUFFER_CNT 12U
+#define ETH_RX_BUFFER_CNT 12U
LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool");
/* Variable Definitions */
static uint8_t RxAllocStatus;
-ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
-ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
+ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
+ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
-osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */
-osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */
+osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */
+osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */
/* Global Ethernet handle */
ETH_HandleTypeDef heth;
ETH_TxPacketConfig TxConfig;
/* Private function prototypes -----------------------------------------------*/
-static void ethernetif_input(void const *argument);
+static void ethernetif_input(void const * argument);
int32_t ETH_PHY_IO_Init(void);
-int32_t ETH_PHY_IO_DeInit(void);
+int32_t ETH_PHY_IO_DeInit (void);
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
int32_t ETH_PHY_IO_GetTick(void);
lan8742_Object_t LAN8742;
-lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
- ETH_PHY_IO_DeInit,
- ETH_PHY_IO_WriteReg,
- ETH_PHY_IO_ReadReg,
- ETH_PHY_IO_GetTick};
+lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
+ ETH_PHY_IO_DeInit,
+ ETH_PHY_IO_WriteReg,
+ ETH_PHY_IO_ReadReg,
+ ETH_PHY_IO_GetTick};
/* USER CODE BEGIN 3 */
@@ -135,33 +135,33 @@ lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
void pbuf_free_custom(struct pbuf *p);
/**
- * @brief Ethernet Rx Transfer completed callback
- * @param handlerEth: ETH handler
- * @retval None
- */
+ * @brief Ethernet Rx Transfer completed callback
+ * @param handlerEth: ETH handler
+ * @retval None
+ */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
osSemaphoreRelease(RxPktSemaphore);
}
/**
- * @brief Ethernet Tx Transfer completed callback
- * @param handlerEth: ETH handler
- * @retval None
- */
+ * @brief Ethernet Tx Transfer completed callback
+ * @param handlerEth: ETH handler
+ * @retval None
+ */
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
osSemaphoreRelease(TxPktSemaphore);
}
/**
- * @brief Ethernet DMA transfer error callback
- * @param handlerEth: ETH handler
- * @retval None
- */
+ * @brief Ethernet DMA transfer error callback
+ * @param handlerEth: ETH handler
+ * @retval None
+ */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{
- if ((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
+ if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
{
- osSemaphoreRelease(RxPktSemaphore);
+ osSemaphoreRelease(RxPktSemaphore);
}
}
@@ -187,7 +187,7 @@ static void low_level_init(struct netif *netif)
ETH_MACConfigTypeDef MACConf = {0};
/* Start ETH HAL Init */
- uint8_t MACAddr[6];
+ uint8_t MACAddr[6] ;
heth.Instance = ETH;
MACAddr[0] = 0x00;
MACAddr[1] = 0x80;
@@ -210,7 +210,7 @@ static void low_level_init(struct netif *netif)
hal_eth_init_status = HAL_ETH_Init(&heth);
- memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig));
+ memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
@@ -226,23 +226,23 @@ static void low_level_init(struct netif *netif)
netif->hwaddr_len = ETH_HWADDR_LEN;
/* set MAC hardware address */
- netif->hwaddr[0] = heth.Init.MACAddr[0];
- netif->hwaddr[1] = heth.Init.MACAddr[1];
- netif->hwaddr[2] = heth.Init.MACAddr[2];
- netif->hwaddr[3] = heth.Init.MACAddr[3];
- netif->hwaddr[4] = heth.Init.MACAddr[4];
- netif->hwaddr[5] = heth.Init.MACAddr[5];
+ netif->hwaddr[0] = heth.Init.MACAddr[0];
+ netif->hwaddr[1] = heth.Init.MACAddr[1];
+ netif->hwaddr[2] = heth.Init.MACAddr[2];
+ netif->hwaddr[3] = heth.Init.MACAddr[3];
+ netif->hwaddr[4] = heth.Init.MACAddr[4];
+ netif->hwaddr[5] = heth.Init.MACAddr[5];
/* maximum transfer unit */
netif->mtu = ETH_MAX_PAYLOAD;
-/* Accept broadcast address and ARP traffic */
-/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
-#if LWIP_ARP
- netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
-#else
- netif->flags |= NETIF_FLAG_BROADCAST;
-#endif /* LWIP_ARP */
+ /* Accept broadcast address and ARP traffic */
+ /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
+ #if LWIP_ARP
+ netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
+ #else
+ netif->flags |= NETIF_FLAG_BROADCAST;
+ #endif /* LWIP_ARP */
/* create a binary semaphore used for informing ethernetif of frame reception */
RxPktSemaphore = xSemaphoreCreateBinary();
@@ -251,14 +251,14 @@ static void low_level_init(struct netif *netif)
TxPktSemaphore = xSemaphoreCreateBinary();
/* create the task that handles the ETH_MAC */
- /* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
+/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE);
osThreadCreate(osThread(EthIf), netif);
- /* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
+/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
- /* USER CODE BEGIN PHY_PRE_CONFIG */
+/* USER CODE BEGIN PHY_PRE_CONFIG */
- /* USER CODE END PHY_PRE_CONFIG */
+/* USER CODE END PHY_PRE_CONFIG */
/* Set PHY IO functions */
LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx);
@@ -270,7 +270,7 @@ static void low_level_init(struct netif *netif)
PHYLinkState = LAN8742_GetLinkState(&LAN8742);
/* Get link state */
- if (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
+ if(PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
{
netif_set_link_down(netif);
netif_set_down(netif);
@@ -301,20 +301,21 @@ static void low_level_init(struct netif *netif)
break;
}
- /* Get MAC Config MAC */
- HAL_ETH_GetMACConfig(&heth, &MACConf);
- MACConf.DuplexMode = duplex;
- MACConf.Speed = speed;
- HAL_ETH_SetMACConfig(&heth, &MACConf);
+ /* Get MAC Config MAC */
+ HAL_ETH_GetMACConfig(&heth, &MACConf);
+ MACConf.DuplexMode = duplex;
+ MACConf.Speed = speed;
+ HAL_ETH_SetMACConfig(&heth, &MACConf);
- HAL_ETH_Start_IT(&heth);
- netif_set_up(netif);
- netif_set_link_up(netif);
+ HAL_ETH_Start_IT(&heth);
+ netif_set_up(netif);
+ netif_set_link_up(netif);
- /* USER CODE BEGIN PHY_POST_CONFIG */
+/* USER CODE BEGIN PHY_POST_CONFIG */
- /* USER CODE END PHY_POST_CONFIG */
+/* USER CODE END PHY_POST_CONFIG */
}
+
}
else
{
@@ -322,9 +323,9 @@ static void low_level_init(struct netif *netif)
}
#endif /* LWIP_ARP || LWIP_ETHERNET */
- /* USER CODE BEGIN LOW_LEVEL_INIT */
+/* USER CODE BEGIN LOW_LEVEL_INIT */
- /* USER CODE END LOW_LEVEL_INIT */
+/* USER CODE END LOW_LEVEL_INIT */
}
/**
@@ -350,22 +351,22 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
err_t errval = ERR_OK;
ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
- memset(Txbuffer, 0, ETH_TX_DESC_CNT * sizeof(ETH_BufferTypeDef));
+ memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
- for (q = p; q != NULL; q = q->next)
+ for(q = p; q != NULL; q = q->next)
{
- if (i >= ETH_TX_DESC_CNT)
+ if(i >= ETH_TX_DESC_CNT)
return ERR_IF;
Txbuffer[i].buffer = q->payload;
Txbuffer[i].len = q->len;
- if (i > 0)
+ if(i>0)
{
- Txbuffer[i - 1].next = &Txbuffer[i];
+ Txbuffer[i-1].next = &Txbuffer[i];
}
- if (q->next == NULL)
+ if(q->next == NULL)
{
Txbuffer[i].next = NULL;
}
@@ -380,7 +381,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
pbuf_ref(p);
HAL_ETH_Transmit_IT(&heth, &TxConfig);
- while (osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT) != osOK)
+ while(osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
{
}
@@ -397,12 +398,12 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
* @param netif the lwip network interface structure for this ethernetif
* @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error
- */
-static struct pbuf *low_level_input(struct netif *netif)
+ */
+static struct pbuf * low_level_input(struct netif *netif)
{
struct pbuf *p = NULL;
- if (RxAllocStatus == RX_ALLOC_OK)
+ if(RxAllocStatus == RX_ALLOC_OK)
{
HAL_ETH_ReadData(&heth, (void **)&p);
}
@@ -419,26 +420,26 @@ static struct pbuf *low_level_input(struct netif *netif)
*
* @param netif the lwip network interface structure for this ethernetif
*/
-static void ethernetif_input(void const *argument)
+static void ethernetif_input(void const * argument)
{
struct pbuf *p = NULL;
- struct netif *netif = (struct netif *)argument;
+ struct netif *netif = (struct netif *) argument;
- for (;;)
+ for( ;; )
{
if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
{
do
{
- p = low_level_input(netif);
+ p = low_level_input( netif );
if (p != NULL)
{
- if (netif->input(p, netif) != ERR_OK)
+ if (netif->input( p, netif) != ERR_OK )
{
pbuf_free(p);
}
}
- } while (p != NULL);
+ } while(p!=NULL);
}
}
}
@@ -455,11 +456,12 @@ static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const
err_t errval;
errval = ERR_OK;
- /* USER CODE BEGIN 5 */
+/* USER CODE BEGIN 5 */
- /* USER CODE END 5 */
+/* USER CODE END 5 */
return errval;
+
}
#endif /* LWIP_ARP */
@@ -522,13 +524,13 @@ err_t ethernetif_init(struct netif *netif)
}
/**
- * @brief Custom Rx pbuf free callback
- * @param pbuf: pbuf to be freed
- * @retval None
- */
+ * @brief Custom Rx pbuf free callback
+ * @param pbuf: pbuf to be freed
+ * @retval None
+ */
void pbuf_free_custom(struct pbuf *p)
{
- struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p;
+ struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
@@ -557,19 +559,19 @@ u32_t sys_now(void)
/* USER CODE END 6 */
/**
- * @brief Initializes the ETH MSP.
- * @param ethHandle: ETH handle
- * @retval None
- */
+ * @brief Initializes the ETH MSP.
+ * @param ethHandle: ETH handle
+ * @retval None
+ */
-void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
+void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
- if (ethHandle->Instance == ETH)
+ if(ethHandle->Instance==ETH)
{
- /* USER CODE BEGIN ETH_MspInit 0 */
+ /* USER CODE BEGIN ETH_MspInit 0 */
- /* USER CODE END ETH_MspInit 0 */
+ /* USER CODE END ETH_MspInit 0 */
/* Enable Peripheral clock */
__HAL_RCC_ETH_CLK_ENABLE();
@@ -587,21 +589,21 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1
*/
- GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
+ GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
+ GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
+ GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@@ -611,19 +613,19 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(ETH_IRQn);
- /* USER CODE BEGIN ETH_MspInit 1 */
+ /* USER CODE BEGIN ETH_MspInit 1 */
- /* USER CODE END ETH_MspInit 1 */
+ /* USER CODE END ETH_MspInit 1 */
}
}
-void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
+void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
{
- if (ethHandle->Instance == ETH)
+ if(ethHandle->Instance==ETH)
{
- /* USER CODE BEGIN ETH_MspDeInit 0 */
+ /* USER CODE BEGIN ETH_MspDeInit 0 */
- /* USER CODE END ETH_MspDeInit 0 */
+ /* USER CODE END ETH_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ETH_CLK_DISABLE();
@@ -638,18 +640,18 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1
*/
- HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
+ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
- HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
+ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
- HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
+ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(ETH_IRQn);
- /* USER CODE BEGIN ETH_MspDeInit 1 */
+ /* USER CODE BEGIN ETH_MspDeInit 1 */
- /* USER CODE END ETH_MspDeInit 1 */
+ /* USER CODE END ETH_MspDeInit 1 */
}
}
@@ -657,10 +659,10 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
PHI IO Functions
*******************************************************************************/
/**
- * @brief Initializes the MDIO interface GPIO and clocks.
- * @param None
- * @retval 0 if OK, -1 if ERROR
- */
+ * @brief Initializes the MDIO interface GPIO and clocks.
+ * @param None
+ * @retval 0 if OK, -1 if ERROR
+ */
int32_t ETH_PHY_IO_Init(void)
{
/* We assume that MDIO GPIO configuration is already done
@@ -674,25 +676,25 @@ int32_t ETH_PHY_IO_Init(void)
}
/**
- * @brief De-Initializes the MDIO interface .
- * @param None
- * @retval 0 if OK, -1 if ERROR
- */
-int32_t ETH_PHY_IO_DeInit(void)
+ * @brief De-Initializes the MDIO interface .
+ * @param None
+ * @retval 0 if OK, -1 if ERROR
+ */
+int32_t ETH_PHY_IO_DeInit (void)
{
return 0;
}
/**
- * @brief Read a PHY register through the MDIO interface.
- * @param DevAddr: PHY port address
- * @param RegAddr: PHY register address
- * @param pRegVal: pointer to hold the register value
- * @retval 0 if OK -1 if Error
- */
+ * @brief Read a PHY register through the MDIO interface.
+ * @param DevAddr: PHY port address
+ * @param RegAddr: PHY register address
+ * @param pRegVal: pointer to hold the register value
+ * @retval 0 if OK -1 if Error
+ */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{
- if (HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
+ if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
{
return -1;
}
@@ -701,15 +703,15 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal
}
/**
- * @brief Write a value to a PHY register through the MDIO interface.
- * @param DevAddr: PHY port address
- * @param RegAddr: PHY register address
- * @param RegVal: Value to be written
- * @retval 0 if OK -1 if Error
- */
+ * @brief Write a value to a PHY register through the MDIO interface.
+ * @param DevAddr: PHY port address
+ * @param RegAddr: PHY register address
+ * @param RegVal: Value to be written
+ * @retval 0 if OK -1 if Error
+ */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{
- if (HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
+ if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
{
return -1;
}
@@ -718,84 +720,84 @@ int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
}
/**
- * @brief Get the time in millisecons used for internal PHY driver process.
- * @retval Time value
- */
+ * @brief Get the time in millisecons used for internal PHY driver process.
+ * @retval Time value
+ */
int32_t ETH_PHY_IO_GetTick(void)
{
return HAL_GetTick();
}
/**
- * @brief Check the ETH link state then update ETH driver and netif link accordingly.
- * @retval None
- */
+ * @brief Check the ETH link state then update ETH driver and netif link accordingly.
+ * @retval None
+ */
-void ethernet_link_thread(void const *argument)
+void ethernet_link_thread(void const * argument)
{
ETH_MACConfigTypeDef MACConf = {0};
int32_t PHYLinkState = 0;
uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
- struct netif *netif = (struct netif *)argument;
- /* USER CODE BEGIN ETH link init */
+ struct netif *netif = (struct netif *) argument;
+/* USER CODE BEGIN ETH link init */
- /* USER CODE END ETH link init */
+/* USER CODE END ETH link init */
- for (;;)
+ for(;;)
{
- PHYLinkState = LAN8742_GetLinkState(&LAN8742);
+ PHYLinkState = LAN8742_GetLinkState(&LAN8742);
- if (netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
+ if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
+ {
+ HAL_ETH_Stop_IT(&heth);
+ netif_set_down(netif);
+ netif_set_link_down(netif);
+ }
+ else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
+ {
+ switch (PHYLinkState)
{
- HAL_ETH_Stop_IT(&heth);
- netif_set_down(netif);
- netif_set_link_down(netif);
- }
- else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
- {
- switch (PHYLinkState)
- {
- case LAN8742_STATUS_100MBITS_FULLDUPLEX:
- duplex = ETH_FULLDUPLEX_MODE;
- speed = ETH_SPEED_100M;
- linkchanged = 1;
- break;
- case LAN8742_STATUS_100MBITS_HALFDUPLEX:
- duplex = ETH_HALFDUPLEX_MODE;
- speed = ETH_SPEED_100M;
- linkchanged = 1;
- break;
- case LAN8742_STATUS_10MBITS_FULLDUPLEX:
- duplex = ETH_FULLDUPLEX_MODE;
- speed = ETH_SPEED_10M;
- linkchanged = 1;
- break;
- case LAN8742_STATUS_10MBITS_HALFDUPLEX:
- duplex = ETH_HALFDUPLEX_MODE;
- speed = ETH_SPEED_10M;
- linkchanged = 1;
- break;
- default:
- break;
- }
-
- if (linkchanged)
- {
- /* Get MAC Config MAC */
- HAL_ETH_GetMACConfig(&heth, &MACConf);
- MACConf.DuplexMode = duplex;
- MACConf.Speed = speed;
- HAL_ETH_SetMACConfig(&heth, &MACConf);
- HAL_ETH_Start_IT(&heth);
- netif_set_up(netif);
- netif_set_link_up(netif);
- }
+ case LAN8742_STATUS_100MBITS_FULLDUPLEX:
+ duplex = ETH_FULLDUPLEX_MODE;
+ speed = ETH_SPEED_100M;
+ linkchanged = 1;
+ break;
+ case LAN8742_STATUS_100MBITS_HALFDUPLEX:
+ duplex = ETH_HALFDUPLEX_MODE;
+ speed = ETH_SPEED_100M;
+ linkchanged = 1;
+ break;
+ case LAN8742_STATUS_10MBITS_FULLDUPLEX:
+ duplex = ETH_FULLDUPLEX_MODE;
+ speed = ETH_SPEED_10M;
+ linkchanged = 1;
+ break;
+ case LAN8742_STATUS_10MBITS_HALFDUPLEX:
+ duplex = ETH_HALFDUPLEX_MODE;
+ speed = ETH_SPEED_10M;
+ linkchanged = 1;
+ break;
+ default:
+ break;
}
- /* USER CODE BEGIN ETH link Thread core code for User BSP */
+ if(linkchanged)
+ {
+ /* Get MAC Config MAC */
+ HAL_ETH_GetMACConfig(&heth, &MACConf);
+ MACConf.DuplexMode = duplex;
+ MACConf.Speed = speed;
+ HAL_ETH_SetMACConfig(&heth, &MACConf);
+ HAL_ETH_Start_IT(&heth);
+ netif_set_up(netif);
+ netif_set_link_up(netif);
+ }
+ }
- /* USER CODE END ETH link Thread core code for User BSP */
+/* USER CODE BEGIN ETH link Thread core code for User BSP */
+
+/* USER CODE END ETH link Thread core code for User BSP */
osDelay(100);
}
@@ -803,7 +805,7 @@ void ethernet_link_thread(void const *argument)
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{
- /* USER CODE BEGIN HAL ETH RxAllocateCallback */
+/* USER CODE BEGIN HAL ETH RxAllocateCallback */
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
if (p)
{
@@ -820,12 +822,12 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buff)
RxAllocStatus = RX_ALLOC_ERROR;
*buff = NULL;
}
- /* USER CODE END HAL ETH RxAllocateCallback */
+/* USER CODE END HAL ETH RxAllocateCallback */
}
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{
- /* USER CODE BEGIN HAL ETH RxLinkCallback */
+/* USER CODE BEGIN HAL ETH RxLinkCallback */
struct pbuf **ppStart = (struct pbuf **)pStart;
struct pbuf **ppEnd = (struct pbuf **)pEnd;
@@ -857,18 +859,19 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
p->tot_len += Length;
}
- /* USER CODE END HAL ETH RxLinkCallback */
+/* USER CODE END HAL ETH RxLinkCallback */
}
-void HAL_ETH_TxFreeCallback(uint32_t *buff)
+void HAL_ETH_TxFreeCallback(uint32_t * buff)
{
- /* USER CODE BEGIN HAL ETH TxFreeCallback */
+/* USER CODE BEGIN HAL ETH TxFreeCallback */
pbuf_free((struct pbuf *)buff);
- /* USER CODE END HAL ETH TxFreeCallback */
+/* USER CODE END HAL ETH TxFreeCallback */
}
/* USER CODE BEGIN 8 */
/* USER CODE END 8 */
+
diff --git a/MDK-ARM/semi-finished_product_testing.uvoptx b/MDK-ARM/semi-finished_product_testing.uvoptx
index b0b8d82..3a4e933 100644
--- a/MDK-ARM/semi-finished_product_testing.uvoptx
+++ b/MDK-ARM/semi-finished_product_testing.uvoptx
@@ -145,27 +145,10 @@
0
ST-LINKIII-KEIL_SWO
- -US -O2254 -SF1800 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)
+ -UB -O2254 -SF1800 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)
-
-
- 0
- 0
- 208
- 1
- 134254976
- 0
- 0
- 0
- 0
- 0
- 1
- ../LWIP/Target/ethernetif.c
-
- \\semi_finished_product_testing\../LWIP/Target/ethernetif.c\208
-
-
+
0
@@ -292,12 +275,22 @@
1
MACAddr
+
+ 25
+ 1
+ heth
+
+
+ 26
+ 1
+ gnetif,0x10
+
1
0
- 0x1fff7a10
+ \\semi_finished_product_testing\../LWIP/Target/ethernetif.c\heth.Init.MACAddr
0
diff --git a/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm b/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm
new file mode 100644
index 0000000..b2f6036
--- /dev/null
+++ b/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm
@@ -0,0 +1,57 @@
+
+
+
+Vision Build Log
+Tool Versions:
+IDE-Version: Vision V5.36.0.0
+Copyright (C) 2021 ARM Ltd and ARM Germany GmbH. All rights reserved.
+License Information: aaa Administrator, aaa, LIC=6XJT4-F8J98-8YUVV-P833R-DBAKX-Y8EU6
+
+Tool Versions:
+Toolchain: MDK-ARM Professional Version: 5.36.0.0
+Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
+C Compiler: Armcc.exe V5.06 update 7 (build 960)
+Assembler: Armasm.exe V5.06 update 7 (build 960)
+Linker/Locator: ArmLink.exe V5.06 update 7 (build 960)
+Library Manager: ArmAr.exe V5.06 update 7 (build 960)
+Hex Converter: FromElf.exe V5.06 update 7 (build 960)
+CPU DLL: SARMCM3.DLL V5.36.0.0
+Dialog DLL: DCM.DLL V1.17.3.0
+Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.9.0
+Dialog DLL: TCM.DLL V1.53.0.0
+
+Project:
+D:\WORK\positioner_testing\Semi-finished product testing\MDK-ARM\semi-finished_product_testing.uvprojx
+Project File Date: 03/03/2025
+
+Output:
+*** Using Compiler 'V5.06 update 7 (build 960)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
+Build target 'semi-finished_product_testing'
+"semi-finished_product_testing\semi-finished_product_testing.axf" - 0 Error(s), 0 Warning(s).
+
+Software Packages used:
+
+Package Vendor: ARM
+ http://www.keil.com/pack/ARM.CMSIS.5.8.0.pack
+ ARM.CMSIS.5.8.0
+ CMSIS (Common Microcontroller Software Interface Standard)
+ * Component: CORE Version: 5.5.0
+
+Package Vendor: Keil
+ https://www.keil.com/pack/Keil.STM32F4xx_DFP.2.17.1.pack
+ Keil.STM32F4xx_DFP.2.17.1
+ STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
+
+Collection of Component include folders:
+ .\RTE\_semi-finished_product_testing
+ C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.8.0\CMSIS\Core\Include
+ C:\Users\Administrator\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.17.1\Drivers\CMSIS\Device\ST\STM32F4xx\Include
+
+Collection of Component Files used:
+
+ * Component: ARM::CMSIS:CORE:5.5.0
+ Include file: CMSIS\Core\Include\tz_context.h
+Build Time Elapsed: 00:00:01
+
+
+
diff --git a/semi-finished_product_testing.ioc b/semi-finished_product_testing.ioc
index aa32443..1877839 100644
--- a/semi-finished_product_testing.ioc
+++ b/semi-finished_product_testing.ioc
@@ -190,69 +190,70 @@ Mcu.Package=LQFP100
Mcu.Pin0=PE2
Mcu.Pin1=PE3
Mcu.Pin10=PC5
-Mcu.Pin11=PB1
-Mcu.Pin12=PB2
-Mcu.Pin13=PE7
-Mcu.Pin14=PE8
-Mcu.Pin15=PE9
-Mcu.Pin16=PE11
-Mcu.Pin17=PE12
-Mcu.Pin18=PE13
-Mcu.Pin19=PE14
+Mcu.Pin11=PB0
+Mcu.Pin12=PB1
+Mcu.Pin13=PB2
+Mcu.Pin14=PE7
+Mcu.Pin15=PE8
+Mcu.Pin16=PE9
+Mcu.Pin17=PE11
+Mcu.Pin18=PE12
+Mcu.Pin19=PE13
Mcu.Pin2=PH0-OSC_IN
-Mcu.Pin20=PB11
-Mcu.Pin21=PB12
-Mcu.Pin22=PB13
-Mcu.Pin23=PD8
-Mcu.Pin24=PD9
-Mcu.Pin25=PD11
-Mcu.Pin26=PD12
-Mcu.Pin27=PD13
-Mcu.Pin28=PD14
-Mcu.Pin29=PD15
+Mcu.Pin20=PE14
+Mcu.Pin21=PB11
+Mcu.Pin22=PB12
+Mcu.Pin23=PB13
+Mcu.Pin24=PD8
+Mcu.Pin25=PD9
+Mcu.Pin26=PD11
+Mcu.Pin27=PD12
+Mcu.Pin28=PD13
+Mcu.Pin29=PD14
Mcu.Pin3=PH1-OSC_OUT
-Mcu.Pin30=PC6
-Mcu.Pin31=PC7
-Mcu.Pin32=PC8
-Mcu.Pin33=PC9
-Mcu.Pin34=PA8
-Mcu.Pin35=PA9
-Mcu.Pin36=PA10
-Mcu.Pin37=PA11
-Mcu.Pin38=PA12
-Mcu.Pin39=PA13
+Mcu.Pin30=PD15
+Mcu.Pin31=PC6
+Mcu.Pin32=PC7
+Mcu.Pin33=PC8
+Mcu.Pin34=PC9
+Mcu.Pin35=PA8
+Mcu.Pin36=PA9
+Mcu.Pin37=PA10
+Mcu.Pin38=PA11
+Mcu.Pin39=PA12
Mcu.Pin4=PC0
-Mcu.Pin40=PA14
-Mcu.Pin41=PA15
-Mcu.Pin42=PC10
-Mcu.Pin43=PC11
-Mcu.Pin44=PC12
-Mcu.Pin45=PD0
-Mcu.Pin46=PD1
-Mcu.Pin47=PD2
-Mcu.Pin48=PD3
-Mcu.Pin49=PD4
+Mcu.Pin40=PA13
+Mcu.Pin41=PA14
+Mcu.Pin42=PA15
+Mcu.Pin43=PC10
+Mcu.Pin44=PC11
+Mcu.Pin45=PC12
+Mcu.Pin46=PD0
+Mcu.Pin47=PD1
+Mcu.Pin48=PD2
+Mcu.Pin49=PD3
Mcu.Pin5=PC1
-Mcu.Pin50=PD5
-Mcu.Pin51=PD6
-Mcu.Pin52=PD7
-Mcu.Pin53=PB3
-Mcu.Pin54=PB4
-Mcu.Pin55=PB5
-Mcu.Pin56=PB6
-Mcu.Pin57=PB7
-Mcu.Pin58=PE0
-Mcu.Pin59=PE1
+Mcu.Pin50=PD4
+Mcu.Pin51=PD5
+Mcu.Pin52=PD6
+Mcu.Pin53=PD7
+Mcu.Pin54=PB3
+Mcu.Pin55=PB4
+Mcu.Pin56=PB5
+Mcu.Pin57=PB6
+Mcu.Pin58=PB7
+Mcu.Pin59=PE0
Mcu.Pin6=PA1
-Mcu.Pin60=VP_FREERTOS_VS_CMSIS_V1
-Mcu.Pin61=VP_LWIP_VS_Enabled
-Mcu.Pin62=VP_SYS_VS_tim4
-Mcu.Pin63=VP_TIM2_VS_ClockSourceINT
-Mcu.Pin64=VP_TIM3_VS_ClockSourceINT
+Mcu.Pin60=PE1
+Mcu.Pin61=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin62=VP_LWIP_VS_Enabled
+Mcu.Pin63=VP_SYS_VS_tim4
+Mcu.Pin64=VP_TIM2_VS_ClockSourceINT
+Mcu.Pin65=VP_TIM3_VS_ClockSourceINT
Mcu.Pin7=PA2
Mcu.Pin8=PA7
Mcu.Pin9=PC4
-Mcu.PinsNb=65
+Mcu.PinsNb=66
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F407VGTx
@@ -287,7 +288,6 @@ NVIC.SavedPendsvIrqHandlerGenerated=true
NVIC.SavedSvcallIrqHandlerGenerated=true
NVIC.SavedSystickIrqHandlerGenerated=true
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false
-NVIC.TIM3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.TIM4_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
NVIC.TimeBase=TIM4_IRQn
NVIC.TimeBaseIP=TIM4
@@ -338,6 +338,11 @@ PA9.GPIOParameters=GPIO_Label
PA9.GPIO_Label=USB_TX
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
+PB0.GPIOParameters=GPIO_Speed,GPIO_Label
+PB0.GPIO_Label=T3_CH3_BUZZER
+PB0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+PB0.Locked=true
+PB0.Signal=S_TIM3_CH3
PB1.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
PB1.GPIO_Label=LED3_R
PB1.GPIO_PuPd=GPIO_PULLUP
@@ -663,6 +668,8 @@ SH.S_TIM1_CH2.0=TIM1_CH2,Encoder_Interface
SH.S_TIM1_CH2.ConfNb=1
SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1
SH.S_TIM2_CH1_ETR.ConfNb=1
+SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3
+SH.S_TIM3_CH3.ConfNb=1
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_256
SPI1.CLKPhase=SPI_PHASE_2EDGE
SPI1.CLKPolarity=SPI_POLARITY_HIGH
@@ -678,10 +685,11 @@ TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
TIM2.IPParameters=Channel-PWM Generation1 CH1,Period,Pulse-PWM Generation1 CH1
TIM2.Period=119
TIM2.Pulse-PWM\ Generation1\ CH1=60
-TIM3.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE
-TIM3.IPParameters=Prescaler,Period,AutoReloadPreload
-TIM3.Period=999
-TIM3.Prescaler=55295
+TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
+TIM3.IPParameters=Channel-PWM Generation3 CH3,Prescaler,Period,Pulse-PWM Generation3 CH3
+TIM3.Period=370
+TIM3.Prescaler=54
+TIM3.Pulse-PWM\ Generation3\ CH3=92
UART4.IPParameters=VirtualMode
UART4.VirtualMode=Asynchronous
UART5.BaudRate=1200