wxsmart-test
/
signal_generator
7
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

蜂鸣器

This commit is contained in:
王绪洁 2025-03-03 13:17:56 +08:00
parent 472ebda0a7
commit 2e4b25888a
11 changed files with 488 additions and 412 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Core/Inc/main.h
View File

@ -99,6 +99,8 @@ void Error_Handler(void);
#define DI_CH6_GPIO_Port GPIOE #define DI_CH6_GPIO_Port GPIOE
#define ETH_RESET_Pin GPIO_PIN_0 #define ETH_RESET_Pin GPIO_PIN_0
#define ETH_RESET_GPIO_Port GPIOC #define ETH_RESET_GPIO_Port GPIOC
#define T3_CH3_BUZZER_Pin GPIO_PIN_0
#define T3_CH3_BUZZER_GPIO_Port GPIOB
#define LED3_R_Pin GPIO_PIN_1 #define LED3_R_Pin GPIO_PIN_1
#define LED3_R_GPIO_Port GPIOB #define LED3_R_GPIO_Port GPIOB
#define LED3_G_Pin GPIO_PIN_2 #define LED3_G_Pin GPIO_PIN_2

1
Core/Inc/stm32f4xx_it.h
View File

@ -62,7 +62,6 @@ void DMA1_Stream4_IRQHandler(void);
void DMA1_Stream5_IRQHandler(void); void DMA1_Stream5_IRQHandler(void);
void DMA1_Stream6_IRQHandler(void); void DMA1_Stream6_IRQHandler(void);
void EXTI9_5_IRQHandler(void); void EXTI9_5_IRQHandler(void);
void TIM3_IRQHandler(void);
void TIM4_IRQHandler(void); void TIM4_IRQHandler(void);
void USART1_IRQHandler(void); void USART1_IRQHandler(void);
void USART2_IRQHandler(void); void USART2_IRQHandler(void);

36
Core/Src/freertos.c
View File

@ -73,18 +73,18 @@ uint8_t di_state_last[DI_MAX] = {0};
uint8_t di_state_now[DI_MAX] = {0}; uint8_t di_state_now[DI_MAX] = {0};
/* USER CODE END FunctionPrototypes */ /* USER CODE END FunctionPrototypes */
void start_tcp_task(void const *argument); void start_tcp_task(void const * argument);
void start_led_toggle_task(void const *argument); void start_led_toggle_task(void const * argument);
void start_dac_task(void const *argument); void start_dac_task(void const * argument);
void start_adc_task(void const *argument); void start_adc_task(void const * argument);
void start_gpio_di_do_task(void const *argument); void start_gpio_di_do_task(void const * argument);
void start_ec11_task(void const *argument); void start_ec11_task(void const * argument);
extern void MX_LWIP_Init(void); extern void MX_LWIP_Init(void);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* GetIdleTaskMemory prototype (linked to static allocation support) */ /* GetIdleTaskMemory prototype (linked to static allocation support) */
void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize); void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */ /* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer; static StaticTask_t xIdleTaskTCBBuffer;
@ -104,8 +104,7 @@ void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackTyp
* @param None * @param None
* @retval None * @retval None
*/ */
void MX_FREERTOS_Init(void) void MX_FREERTOS_Init(void) {
{
/* USER CODE BEGIN Init */ /* USER CODE BEGIN Init */
/* USER CODE END Init */ /* USER CODE END Init */
@ -154,6 +153,7 @@ void MX_FREERTOS_Init(void)
/* USER CODE BEGIN RTOS_THREADS */ /* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */ /* add threads, ... */
/* USER CODE END RTOS_THREADS */ /* USER CODE END RTOS_THREADS */
} }
/* USER CODE BEGIN Header_start_tcp_task */ /* USER CODE BEGIN Header_start_tcp_task */
@ -163,7 +163,7 @@ void MX_FREERTOS_Init(void)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_tcp_task */ /* USER CODE END Header_start_tcp_task */
void start_tcp_task(void const *argument) void start_tcp_task(void const * argument)
{ {
/* init code for LWIP */ /* init code for LWIP */
MX_LWIP_Init(); MX_LWIP_Init();
@ -185,7 +185,7 @@ void start_tcp_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_led_toggle_task */ /* USER CODE END Header_start_led_toggle_task */
void start_led_toggle_task(void const *argument) void start_led_toggle_task(void const * argument)
{ {
/* USER CODE BEGIN start_led_toggle_task */ /* USER CODE BEGIN start_led_toggle_task */
/* Infinite loop */ /* Infinite loop */
@ -204,7 +204,7 @@ void start_led_toggle_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_dac_task */ /* USER CODE END Header_start_dac_task */
void start_dac_task(void const *argument) void start_dac_task(void const * argument)
{ {
/* USER CODE BEGIN start_dac_task */ /* USER CODE BEGIN start_dac_task */
dac161s997_init(); dac161s997_init();
@ -227,7 +227,7 @@ void start_dac_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_adc_task */ /* USER CODE END Header_start_adc_task */
void start_adc_task(void const *argument) void start_adc_task(void const * argument)
{ {
/* USER CODE BEGIN start_adc_task */ /* USER CODE BEGIN start_adc_task */
ad7124_setup(); ad7124_setup();
@ -262,7 +262,7 @@ void start_adc_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_gpio_di_do_task */ /* USER CODE END Header_start_gpio_di_do_task */
void start_gpio_di_do_task(void const *argument) void start_gpio_di_do_task(void const * argument)
{ {
/* USER CODE BEGIN start_gpio_di_do_task */ /* USER CODE BEGIN start_gpio_di_do_task */
/* Infinite loop */ /* Infinite loop */
@ -273,9 +273,9 @@ void start_gpio_di_do_task(void const *argument)
uint8_t tx_data_len = 7 + DI_MAX; uint8_t tx_data_len = 7 + DI_MAX;
uint8_t tx_data[32] = {0}; uint8_t tx_data[32] = {0};
tx_data[0] = FRAME_HEAD; // 帧头 tx_data[0] = FRAME_HEAD; // 帧头
tx_data[1] = COM_OK; // 状态码 tx_data[1] = COM_OK; // 状æ?<3F>ç <C3A7>
tx_data[2] = DEVICE_NUM; // 设备号 tx_data[2] = DEVICE_NUM; // 设备å<EFBFBD>?
tx_data[3] = SEND_STATE_CMD; // 命令号 tx_data[3] = SEND_STATE_CMD; // 命令å<EFBFBD>?
tx_data[4] = DI_MAX; // 数据长度 tx_data[4] = DI_MAX; // 数据长度
for (di_ch = 0; di_ch < DI_MAX; di_ch++) for (di_ch = 0; di_ch < DI_MAX; di_ch++)
{ {
@ -310,7 +310,7 @@ void start_gpio_di_do_task(void const *argument)
* @retval None * @retval None
*/ */
/* USER CODE END Header_start_ec11_task */ /* USER CODE END Header_start_ec11_task */
void start_ec11_task(void const *argument) void start_ec11_task(void const * argument)
{ {
/* USER CODE BEGIN start_ec11_task */ /* USER CODE BEGIN start_ec11_task */
/* Infinite loop */ /* Infinite loop */

3
Core/Src/main.c
View File

@ -132,7 +132,8 @@ int main(void)
// end // end
hart_ht1200m_reset(); // 初始化HT1200M模块 hart_ht1200m_reset(); // 初始化HT1200M模块
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); // PWM输出，用于驱动HT1200M模块 HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); // PWM输出，用于驱动HT1200M模块
HAL_TIM_Encoder_Start(&htim1, TIM_CHANNEL_ALL); // 旋转编码器输入，用于检测旋转编码器状态 HAL_TIM_Encoder_Start(&htim1, TIM_CHANNEL_ALL); // 旋转编码器输入，用于<E794A8>????测旋转编码器状<E599A8>??
HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3); // PWM输出，用于驱动HT1200M模块
/* USER CODE END 2 */ /* USER CODE END 2 */
/* Call init function for freertos objects (in freertos.c) */ /* Call init function for freertos objects (in freertos.c) */

15
Core/Src/stm32f4xx_it.c
View File

@ -62,7 +62,6 @@ extern struct tcp_pcb *server_pcb_ble2;
/* External variables --------------------------------------------------------*/ /* External variables --------------------------------------------------------*/
extern ETH_HandleTypeDef heth; extern ETH_HandleTypeDef heth;
extern TIM_HandleTypeDef htim3;
extern DMA_HandleTypeDef hdma_uart4_rx; extern DMA_HandleTypeDef hdma_uart4_rx;
extern DMA_HandleTypeDef hdma_uart4_tx; extern DMA_HandleTypeDef hdma_uart4_tx;
extern DMA_HandleTypeDef hdma_uart5_tx; extern DMA_HandleTypeDef hdma_uart5_tx;
@ -325,20 +324,6 @@ void EXTI9_5_IRQHandler(void)
/* USER CODE END EXTI9_5_IRQn 1 */ /* USER CODE END EXTI9_5_IRQn 1 */
} }
/**
* @brief This function handles TIM3 global interrupt.
*/
void TIM3_IRQHandler(void)
{
/* USER CODE BEGIN TIM3_IRQn 0 */
/* USER CODE END TIM3_IRQn 0 */
HAL_TIM_IRQHandler(&htim3);
/* USER CODE BEGIN TIM3_IRQn 1 */
/* USER CODE END TIM3_IRQn 1 */
}
/** /**
* @brief This function handles TIM4 global interrupt. * @brief This function handles TIM4 global interrupt.
*/ */

49
Core/Src/tim.c
View File

@ -137,16 +137,17 @@ void MX_TIM3_Init(void)
TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3; htim3.Instance = TIM3;
htim3.Init.Prescaler = 55295; htim3.Init.Prescaler = 54;
htim3.Init.CounterMode = TIM_COUNTERMODE_UP; htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
htim3.Init.Period = 999; htim3.Init.Period = 370;
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim3) != HAL_OK) if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
{ {
Error_Handler(); Error_Handler();
@ -156,15 +157,28 @@ void MX_TIM3_Init(void)
{ {
Error_Handler(); Error_Handler();
} }
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
{ {
Error_Handler(); Error_Handler();
} }
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 92;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE BEGIN TIM3_Init 2 */
HAL_TIM_Base_Start_IT(&htim3); HAL_TIM_Base_Start_IT(&htim3);
/* USER CODE END TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */
HAL_TIM_MspPostInit(&htim3);
} }
@ -219,10 +233,6 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */
/* TIM3 clock enable */ /* TIM3 clock enable */
__HAL_RCC_TIM3_CLK_ENABLE(); __HAL_RCC_TIM3_CLK_ENABLE();
/* TIM3 interrupt Init */
HAL_NVIC_SetPriority(TIM3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(TIM3_IRQn);
/* USER CODE BEGIN TIM3_MspInit 1 */ /* USER CODE BEGIN TIM3_MspInit 1 */
/* USER CODE END TIM3_MspInit 1 */ /* USER CODE END TIM3_MspInit 1 */
@ -237,7 +247,6 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
/* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE();
/**TIM2 GPIO Configuration /**TIM2 GPIO Configuration
PA15 ------> TIM2_CH1 PA15 ------> TIM2_CH1
@ -253,6 +262,27 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
/* USER CODE END TIM2_MspPostInit 1 */ /* USER CODE END TIM2_MspPostInit 1 */
} }
else if(timHandle->Instance==TIM3)
{
/* USER CODE BEGIN TIM3_MspPostInit 0 */
/* USER CODE END TIM3_MspPostInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE();
/**TIM3 GPIO Configuration
PB0 ------> TIM3_CH3
*/
GPIO_InitStruct.Pin = T3_CH3_BUZZER_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
HAL_GPIO_Init(T3_CH3_BUZZER_GPIO_Port, &GPIO_InitStruct);
/* USER CODE BEGIN TIM3_MspPostInit 1 */
/* USER CODE END TIM3_MspPostInit 1 */
}
} }
@ -300,9 +330,6 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM3_MspDeInit 0 */ /* USER CODE END TIM3_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_TIM3_CLK_DISABLE(); __HAL_RCC_TIM3_CLK_DISABLE();
/* TIM3 interrupt Deinit */
HAL_NVIC_DisableIRQ(TIM3_IRQn);
/* USER CODE BEGIN TIM3_MspDeInit 1 */ /* USER CODE BEGIN TIM3_MspDeInit 1 */
/* USER CODE END TIM3_MspDeInit 1 */ /* USER CODE END TIM3_MspDeInit 1 */

45
LWIP/App/lwip.c
View File

@ -22,7 +22,7 @@
#include "lwip.h" #include "lwip.h"
#include "lwip/init.h" #include "lwip/init.h"
#include "lwip/netif.h" #include "lwip/netif.h"
#if defined(__CC_ARM) /* MDK ARM Compiler */ #if defined ( __CC_ARM ) /* MDK ARM Compiler */
#include "lwip/sio.h" #include "lwip/sio.h"
#endif /* MDK ARM Compiler */ #endif /* MDK ARM Compiler */
#include "ethernetif.h" #include "ethernetif.h"
@ -71,15 +71,15 @@ void MX_LWIP_Init(void)
GATEWAY_ADDRESS[2] = 1; GATEWAY_ADDRESS[2] = 1;
GATEWAY_ADDRESS[3] = 29; GATEWAY_ADDRESS[3] = 29;
/* USER CODE BEGIN IP_ADDRESSES */ /* USER CODE BEGIN IP_ADDRESSES */
/* USER CODE END IP_ADDRESSES */ /* USER CODE END IP_ADDRESSES */
/* Initilialize the LwIP stack with RTOS */ /* Initilialize the LwIP stack with RTOS */
tcpip_init(NULL, NULL); tcpip_init( NULL, NULL );
/* IP addresses initialization without DHCP (IPv4) */ /* IP addresses initialization without DHCP (IPv4) */
IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]); IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1], NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]); IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]); IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);
/* add the network interface (IPv4/IPv6) with RTOS */ /* add the network interface (IPv4/IPv6) with RTOS */
@ -103,14 +103,14 @@ void MX_LWIP_Init(void)
netif_set_link_callback(&gnetif, ethernet_link_status_updated); netif_set_link_callback(&gnetif, ethernet_link_status_updated);
/* Create the Ethernet link handler thread */ /* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE BEGIN H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthLink, ethernet_link_thread, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2); osThreadDef(EthLink, ethernet_link_thread, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2);
osThreadCreate(osThread(EthLink), &gnetif); osThreadCreate(osThread(EthLink), &gnetif);
/* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE END H7_OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
/* USER CODE END 3 */ /* USER CODE END 3 */
} }
#ifdef USE_OBSOLETE_USER_CODE_SECTION_4 #ifdef USE_OBSOLETE_USER_CODE_SECTION_4
@ -129,17 +129,17 @@ static void ethernet_link_status_updated(struct netif *netif)
{ {
if (netif_is_up(netif)) if (netif_is_up(netif))
{ {
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
/* USER CODE END 5 */ /* USER CODE END 5 */
} }
else /* netif is down */ else /* netif is down */
{ {
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
/* USER CODE END 6 */ /* USER CODE END 6 */
} }
} }
#if defined(__CC_ARM) /* MDK ARM Compiler */ #if defined ( __CC_ARM ) /* MDK ARM Compiler */
/** /**
* Opens a serial device for communication. * Opens a serial device for communication.
* *
@ -150,9 +150,9 @@ sio_fd_t sio_open(u8_t devnum)
{ {
sio_fd_t sd; sio_fd_t sd;
/* USER CODE BEGIN 7 */ /* USER CODE BEGIN 7 */
sd = 0; // dummy code sd = 0; // dummy code
/* USER CODE END 7 */ /* USER CODE END 7 */
return sd; return sd;
} }
@ -167,8 +167,8 @@ sio_fd_t sio_open(u8_t devnum)
*/ */
void sio_send(u8_t c, sio_fd_t fd) void sio_send(u8_t c, sio_fd_t fd)
{ {
/* USER CODE BEGIN 8 */ /* USER CODE BEGIN 8 */
/* USER CODE END 8 */ /* USER CODE END 8 */
} }
/** /**
@ -186,9 +186,9 @@ u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len)
{ {
u32_t recved_bytes; u32_t recved_bytes;
/* USER CODE BEGIN 9 */ /* USER CODE BEGIN 9 */
recved_bytes = 0; // dummy code recved_bytes = 0; // dummy code
/* USER CODE END 9 */ /* USER CODE END 9 */
return recved_bytes; return recved_bytes;
} }
@ -205,9 +205,10 @@ u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len)
{ {
u32_t recved_bytes; u32_t recved_bytes;
/* USER CODE BEGIN 10 */ /* USER CODE BEGIN 10 */
recved_bytes = 0; // dummy code recved_bytes = 0; // dummy code
/* USER CODE END 10 */ /* USER CODE END 10 */
return recved_bytes; return recved_bytes;
} }
#endif /* MDK ARM Compiler */ #endif /* MDK ARM Compiler */

141
LWIP/Target/ethernetif.c
View File

@ -38,7 +38,7 @@
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* The time to block waiting for input. */ /* The time to block waiting for input. */
#define TIME_WAITING_FOR_INPUT (portMAX_DELAY) #define TIME_WAITING_FOR_INPUT ( portMAX_DELAY )
/* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */ /* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */
/* Stack size of the interface thread */ /* Stack size of the interface thread */
#define INTERFACE_THREAD_STACK_SIZE (350) #define INTERFACE_THREAD_STACK_SIZE (350)
@ -48,7 +48,7 @@
#define IFNAME1 't' #define IFNAME1 't'
/* ETH Setting */ /* ETH Setting */
#define ETH_DMA_TRANSMIT_TIMEOUT (20U) #define ETH_DMA_TRANSMIT_TIMEOUT ( 20U )
#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U) #define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
@ -113,9 +113,9 @@ ETH_HandleTypeDef heth;
ETH_TxPacketConfig TxConfig; ETH_TxPacketConfig TxConfig;
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
static void ethernetif_input(void const *argument); static void ethernetif_input(void const * argument);
int32_t ETH_PHY_IO_Init(void); int32_t ETH_PHY_IO_Init(void);
int32_t ETH_PHY_IO_DeInit(void); int32_t ETH_PHY_IO_DeInit (void);
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal); int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal); int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
int32_t ETH_PHY_IO_GetTick(void); int32_t ETH_PHY_IO_GetTick(void);
@ -159,7 +159,7 @@ void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
*/ */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth) void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{ {
if ((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS) if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
{ {
osSemaphoreRelease(RxPktSemaphore); osSemaphoreRelease(RxPktSemaphore);
} }
@ -187,7 +187,7 @@ static void low_level_init(struct netif *netif)
ETH_MACConfigTypeDef MACConf = {0}; ETH_MACConfigTypeDef MACConf = {0};
/* Start ETH HAL Init */ /* Start ETH HAL Init */
uint8_t MACAddr[6]; uint8_t MACAddr[6] ;
heth.Instance = ETH; heth.Instance = ETH;
MACAddr[0] = 0x00; MACAddr[0] = 0x00;
MACAddr[1] = 0x80; MACAddr[1] = 0x80;
@ -210,7 +210,7 @@ static void low_level_init(struct netif *netif)
hal_eth_init_status = HAL_ETH_Init(&heth); hal_eth_init_status = HAL_ETH_Init(&heth);
memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig)); memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
@ -236,13 +236,13 @@ static void low_level_init(struct netif *netif)
/* maximum transfer unit */ /* maximum transfer unit */
netif->mtu = ETH_MAX_PAYLOAD; netif->mtu = ETH_MAX_PAYLOAD;
/* Accept broadcast address and ARP traffic */ /* Accept broadcast address and ARP traffic */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
#if LWIP_ARP #if LWIP_ARP
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
#else #else
netif->flags |= NETIF_FLAG_BROADCAST; netif->flags |= NETIF_FLAG_BROADCAST;
#endif /* LWIP_ARP */ #endif /* LWIP_ARP */
/* create a binary semaphore used for informing ethernetif of frame reception */ /* create a binary semaphore used for informing ethernetif of frame reception */
RxPktSemaphore = xSemaphoreCreateBinary(); RxPktSemaphore = xSemaphoreCreateBinary();
@ -251,14 +251,14 @@ static void low_level_init(struct netif *netif)
TxPktSemaphore = xSemaphoreCreateBinary(); TxPktSemaphore = xSemaphoreCreateBinary();
/* create the task that handles the ETH_MAC */ /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE); osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE);
osThreadCreate(osThread(EthIf), netif); osThreadCreate(osThread(EthIf), netif);
/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
/* USER CODE BEGIN PHY_PRE_CONFIG */ /* USER CODE BEGIN PHY_PRE_CONFIG */
/* USER CODE END PHY_PRE_CONFIG */ /* USER CODE END PHY_PRE_CONFIG */
/* Set PHY IO functions */ /* Set PHY IO functions */
LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx); LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx);
@ -270,7 +270,7 @@ static void low_level_init(struct netif *netif)
PHYLinkState = LAN8742_GetLinkState(&LAN8742); PHYLinkState = LAN8742_GetLinkState(&LAN8742);
/* Get link state */ /* Get link state */
if (PHYLinkState <= LAN8742_STATUS_LINK_DOWN) if(PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
{ {
netif_set_link_down(netif); netif_set_link_down(netif);
netif_set_down(netif); netif_set_down(netif);
@ -311,10 +311,11 @@ static void low_level_init(struct netif *netif)
netif_set_up(netif); netif_set_up(netif);
netif_set_link_up(netif); netif_set_link_up(netif);
/* USER CODE BEGIN PHY_POST_CONFIG */ /* USER CODE BEGIN PHY_POST_CONFIG */
/* USER CODE END PHY_POST_CONFIG */ /* USER CODE END PHY_POST_CONFIG */
} }
} }
else else
{ {
@ -322,9 +323,9 @@ static void low_level_init(struct netif *netif)
} }
#endif /* LWIP_ARP || LWIP_ETHERNET */ #endif /* LWIP_ARP || LWIP_ETHERNET */
/* USER CODE BEGIN LOW_LEVEL_INIT */ /* USER CODE BEGIN LOW_LEVEL_INIT */
/* USER CODE END LOW_LEVEL_INIT */ /* USER CODE END LOW_LEVEL_INIT */
} }
/** /**
@ -350,22 +351,22 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
err_t errval = ERR_OK; err_t errval = ERR_OK;
ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0}; ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
memset(Txbuffer, 0, ETH_TX_DESC_CNT * sizeof(ETH_BufferTypeDef)); memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
for (q = p; q != NULL; q = q->next) for(q = p; q != NULL; q = q->next)
{ {
if (i >= ETH_TX_DESC_CNT) if(i >= ETH_TX_DESC_CNT)
return ERR_IF; return ERR_IF;
Txbuffer[i].buffer = q->payload; Txbuffer[i].buffer = q->payload;
Txbuffer[i].len = q->len; Txbuffer[i].len = q->len;
if (i > 0) if(i>0)
{ {
Txbuffer[i - 1].next = &Txbuffer[i]; Txbuffer[i-1].next = &Txbuffer[i];
} }
if (q->next == NULL) if(q->next == NULL)
{ {
Txbuffer[i].next = NULL; Txbuffer[i].next = NULL;
} }
@ -380,7 +381,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
pbuf_ref(p); pbuf_ref(p);
HAL_ETH_Transmit_IT(&heth, &TxConfig); HAL_ETH_Transmit_IT(&heth, &TxConfig);
while (osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT) != osOK) while(osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
{ {
} }
@ -398,11 +399,11 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
* @return a pbuf filled with the received packet (including MAC header) * @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error * NULL on memory error
*/ */
static struct pbuf *low_level_input(struct netif *netif) static struct pbuf * low_level_input(struct netif *netif)
{ {
struct pbuf *p = NULL; struct pbuf *p = NULL;
if (RxAllocStatus == RX_ALLOC_OK) if(RxAllocStatus == RX_ALLOC_OK)
{ {
HAL_ETH_ReadData(&heth, (void **)&p); HAL_ETH_ReadData(&heth, (void **)&p);
} }
@ -419,26 +420,26 @@ static struct pbuf *low_level_input(struct netif *netif)
* *
* @param netif the lwip network interface structure for this ethernetif * @param netif the lwip network interface structure for this ethernetif
*/ */
static void ethernetif_input(void const *argument) static void ethernetif_input(void const * argument)
{ {
struct pbuf *p = NULL; struct pbuf *p = NULL;
struct netif *netif = (struct netif *)argument; struct netif *netif = (struct netif *) argument;
for (;;) for( ;; )
{ {
if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK) if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
{ {
do do
{ {
p = low_level_input(netif); p = low_level_input( netif );
if (p != NULL) if (p != NULL)
{ {
if (netif->input(p, netif) != ERR_OK) if (netif->input( p, netif) != ERR_OK )
{ {
pbuf_free(p); pbuf_free(p);
} }
} }
} while (p != NULL); } while(p!=NULL);
} }
} }
} }
@ -455,11 +456,12 @@ static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const
err_t errval; err_t errval;
errval = ERR_OK; errval = ERR_OK;
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
/* USER CODE END 5 */ /* USER CODE END 5 */
return errval; return errval;
} }
#endif /* LWIP_ARP */ #endif /* LWIP_ARP */
@ -528,7 +530,7 @@ err_t ethernetif_init(struct netif *netif)
*/ */
void pbuf_free_custom(struct pbuf *p) void pbuf_free_custom(struct pbuf *p)
{ {
struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p; struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf); LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
@ -562,10 +564,10 @@ u32_t sys_now(void)
* @retval None * @retval None
*/ */
void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle) void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if (ethHandle->Instance == ETH) if(ethHandle->Instance==ETH)
{ {
/* USER CODE BEGIN ETH_MspInit 0 */ /* USER CODE BEGIN ETH_MspInit 0 */
@ -587,21 +589,21 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
PB12 ------> ETH_TXD0 PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1 PB13 ------> ETH_TXD1
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5; GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH; GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7; GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH; GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13; GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -617,9 +619,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
} }
} }
void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle) void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
{ {
if (ethHandle->Instance == ETH) if(ethHandle->Instance==ETH)
{ {
/* USER CODE BEGIN ETH_MspDeInit 0 */ /* USER CODE BEGIN ETH_MspDeInit 0 */
@ -638,11 +640,11 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
PB12 ------> ETH_TXD0 PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1 PB13 ------> ETH_TXD1
*/ */
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5); HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13); HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
/* Peripheral interrupt Deinit*/ /* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(ETH_IRQn); HAL_NVIC_DisableIRQ(ETH_IRQn);
@ -678,7 +680,7 @@ int32_t ETH_PHY_IO_Init(void)
* @param None * @param None
* @retval 0 if OK, -1 if ERROR * @retval 0 if OK, -1 if ERROR
*/ */
int32_t ETH_PHY_IO_DeInit(void) int32_t ETH_PHY_IO_DeInit (void)
{ {
return 0; return 0;
} }
@ -692,7 +694,7 @@ int32_t ETH_PHY_IO_DeInit(void)
*/ */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{ {
if (HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK) if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
{ {
return -1; return -1;
} }
@ -709,7 +711,7 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal
*/ */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{ {
if (HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK) if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
{ {
return -1; return -1;
} }
@ -731,28 +733,28 @@ int32_t ETH_PHY_IO_GetTick(void)
* @retval None * @retval None
*/ */
void ethernet_link_thread(void const *argument) void ethernet_link_thread(void const * argument)
{ {
ETH_MACConfigTypeDef MACConf = {0}; ETH_MACConfigTypeDef MACConf = {0};
int32_t PHYLinkState = 0; int32_t PHYLinkState = 0;
uint32_t linkchanged = 0U, speed = 0U, duplex = 0U; uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
struct netif *netif = (struct netif *)argument; struct netif *netif = (struct netif *) argument;
/* USER CODE BEGIN ETH link init */ /* USER CODE BEGIN ETH link init */
/* USER CODE END ETH link init */ /* USER CODE END ETH link init */
for (;;) for(;;)
{ {
PHYLinkState = LAN8742_GetLinkState(&LAN8742); PHYLinkState = LAN8742_GetLinkState(&LAN8742);
if (netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)) if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
{ {
HAL_ETH_Stop_IT(&heth); HAL_ETH_Stop_IT(&heth);
netif_set_down(netif); netif_set_down(netif);
netif_set_link_down(netif); netif_set_link_down(netif);
} }
else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN)) else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
{ {
switch (PHYLinkState) switch (PHYLinkState)
{ {
@ -780,7 +782,7 @@ void ethernet_link_thread(void const *argument)
break; break;
} }
if (linkchanged) if(linkchanged)
{ {
/* Get MAC Config MAC */ /* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf); HAL_ETH_GetMACConfig(&heth, &MACConf);
@ -793,9 +795,9 @@ void ethernet_link_thread(void const *argument)
} }
} }
/* USER CODE BEGIN ETH link Thread core code for User BSP */ /* USER CODE BEGIN ETH link Thread core code for User BSP */
/* USER CODE END ETH link Thread core code for User BSP */ /* USER CODE END ETH link Thread core code for User BSP */
osDelay(100); osDelay(100);
} }
@ -803,7 +805,7 @@ void ethernet_link_thread(void const *argument)
void HAL_ETH_RxAllocateCallback(uint8_t **buff) void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{ {
/* USER CODE BEGIN HAL ETH RxAllocateCallback */ /* USER CODE BEGIN HAL ETH RxAllocateCallback */
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL); struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
if (p) if (p)
{ {
@ -820,12 +822,12 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buff)
RxAllocStatus = RX_ALLOC_ERROR; RxAllocStatus = RX_ALLOC_ERROR;
*buff = NULL; *buff = NULL;
} }
/* USER CODE END HAL ETH RxAllocateCallback */ /* USER CODE END HAL ETH RxAllocateCallback */
} }
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length) void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{ {
/* USER CODE BEGIN HAL ETH RxLinkCallback */ /* USER CODE BEGIN HAL ETH RxLinkCallback */
struct pbuf **ppStart = (struct pbuf **)pStart; struct pbuf **ppStart = (struct pbuf **)pStart;
struct pbuf **ppEnd = (struct pbuf **)pEnd; struct pbuf **ppEnd = (struct pbuf **)pEnd;
@ -857,18 +859,19 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
p->tot_len += Length; p->tot_len += Length;
} }
/* USER CODE END HAL ETH RxLinkCallback */ /* USER CODE END HAL ETH RxLinkCallback */
} }
void HAL_ETH_TxFreeCallback(uint32_t *buff) void HAL_ETH_TxFreeCallback(uint32_t * buff)
{ {
/* USER CODE BEGIN HAL ETH TxFreeCallback */ /* USER CODE BEGIN HAL ETH TxFreeCallback */
pbuf_free((struct pbuf *)buff); pbuf_free((struct pbuf *)buff);
/* USER CODE END HAL ETH TxFreeCallback */ /* USER CODE END HAL ETH TxFreeCallback */
} }
/* USER CODE BEGIN 8 */ /* USER CODE BEGIN 8 */
/* USER CODE END 8 */ /* USER CODE END 8 */

33
MDK-ARM/semi-finished_product_testing.uvoptx
View File

@ -145,27 +145,10 @@
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key> <Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-US -O2254 -SF1800 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name> <Name>-UB -O2254 -SF1800 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
</SetRegEntry> </SetRegEntry>
</TargetDriverDllRegistry> </TargetDriverDllRegistry>
<Breakpoint> <Breakpoint/>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>208</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134254976</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../LWIP/Target/ethernetif.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../LWIP/Target/ethernetif.c\208</Expression>
</Bp>
</Breakpoint>
<WatchWindow1> <WatchWindow1>
<Ww> <Ww>
<count>0</count> <count>0</count>
@ -292,12 +275,22 @@
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>MACAddr</ItemText> <ItemText>MACAddr</ItemText>
</Ww> </Ww>
<Ww>
<count>25</count>
<WinNumber>1</WinNumber>
<ItemText>heth</ItemText>
</Ww>
<Ww>
<count>26</count>
<WinNumber>1</WinNumber>
<ItemText>gnetif,0x10</ItemText>
</Ww>
</WatchWindow1> </WatchWindow1>
<MemoryWindow1> <MemoryWindow1>
<Mm> <Mm>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<SubType>0</SubType> <SubType>0</SubType>
<ItemText>0x1fff7a10</ItemText> <ItemText>\\semi_finished_product_testing\../LWIP/Target/ethernetif.c\heth.Init.MACAddr</ItemText>
<AccSizeX>0</AccSizeX> <AccSizeX>0</AccSizeX>
</Mm> </Mm>
</MemoryWindow1> </MemoryWindow1>

57
MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm Normal file
View File

@ -0,0 +1,57 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.36.0.0
Copyright (C) 2021 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: aaa Administrator, aaa, LIC=6XJT4-F8J98-8YUVV-P833R-DBAKX-Y8EU6
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.36.0.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 7 (build 960)
Assembler: Armasm.exe V5.06 update 7 (build 960)
Linker/Locator: ArmLink.exe V5.06 update 7 (build 960)
Library Manager: ArmAr.exe V5.06 update 7 (build 960)
Hex Converter: FromElf.exe V5.06 update 7 (build 960)
CPU DLL: SARMCM3.DLL V5.36.0.0
Dialog DLL: DCM.DLL V1.17.3.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.9.0
Dialog DLL: TCM.DLL V1.53.0.0
<h2>Project:</h2>
D:\WORK\positioner_testing\Semi-finished product testing\MDK-ARM\semi-finished_product_testing.uvprojx
Project File Date: 03/03/2025
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 7 (build 960)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'semi-finished_product_testing'
"semi-finished_product_testing\semi-finished_product_testing.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.8.0.pack
ARM.CMSIS.5.8.0
CMSIS (Common Microcontroller Software Interface Standard)
* Component: CORE Version: 5.5.0
Package Vendor: Keil
https://www.keil.com/pack/Keil.STM32F4xx_DFP.2.17.1.pack
Keil.STM32F4xx_DFP.2.17.1
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_semi-finished_product_testing
C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.8.0\CMSIS\Core\Include
C:\Users\Administrator\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.17.1\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.5.0
Include file: CMSIS\Core\Include\tz_context.h
Build Time Elapsed: 00:00:01
</pre>
</body>
</html>

128
semi-finished_product_testing.ioc
View File

@ -190,69 +190,70 @@ Mcu.Package=LQFP100
Mcu.Pin0=PE2 Mcu.Pin0=PE2
Mcu.Pin1=PE3 Mcu.Pin1=PE3
Mcu.Pin10=PC5 Mcu.Pin10=PC5
Mcu.Pin11=PB1 Mcu.Pin11=PB0
Mcu.Pin12=PB2 Mcu.Pin12=PB1
Mcu.Pin13=PE7 Mcu.Pin13=PB2
Mcu.Pin14=PE8 Mcu.Pin14=PE7
Mcu.Pin15=PE9 Mcu.Pin15=PE8
Mcu.Pin16=PE11 Mcu.Pin16=PE9
Mcu.Pin17=PE12 Mcu.Pin17=PE11
Mcu.Pin18=PE13 Mcu.Pin18=PE12
Mcu.Pin19=PE14 Mcu.Pin19=PE13
Mcu.Pin2=PH0-OSC_IN Mcu.Pin2=PH0-OSC_IN
Mcu.Pin20=PB11 Mcu.Pin20=PE14
Mcu.Pin21=PB12 Mcu.Pin21=PB11
Mcu.Pin22=PB13 Mcu.Pin22=PB12
Mcu.Pin23=PD8 Mcu.Pin23=PB13
Mcu.Pin24=PD9 Mcu.Pin24=PD8
Mcu.Pin25=PD11 Mcu.Pin25=PD9
Mcu.Pin26=PD12 Mcu.Pin26=PD11
Mcu.Pin27=PD13 Mcu.Pin27=PD12
Mcu.Pin28=PD14 Mcu.Pin28=PD13
Mcu.Pin29=PD15 Mcu.Pin29=PD14
Mcu.Pin3=PH1-OSC_OUT Mcu.Pin3=PH1-OSC_OUT
Mcu.Pin30=PC6 Mcu.Pin30=PD15
Mcu.Pin31=PC7 Mcu.Pin31=PC6
Mcu.Pin32=PC8 Mcu.Pin32=PC7
Mcu.Pin33=PC9 Mcu.Pin33=PC8
Mcu.Pin34=PA8 Mcu.Pin34=PC9
Mcu.Pin35=PA9 Mcu.Pin35=PA8
Mcu.Pin36=PA10 Mcu.Pin36=PA9
Mcu.Pin37=PA11 Mcu.Pin37=PA10
Mcu.Pin38=PA12 Mcu.Pin38=PA11
Mcu.Pin39=PA13 Mcu.Pin39=PA12
Mcu.Pin4=PC0 Mcu.Pin4=PC0
Mcu.Pin40=PA14 Mcu.Pin40=PA13
Mcu.Pin41=PA15 Mcu.Pin41=PA14
Mcu.Pin42=PC10 Mcu.Pin42=PA15
Mcu.Pin43=PC11 Mcu.Pin43=PC10
Mcu.Pin44=PC12 Mcu.Pin44=PC11
Mcu.Pin45=PD0 Mcu.Pin45=PC12
Mcu.Pin46=PD1 Mcu.Pin46=PD0
Mcu.Pin47=PD2 Mcu.Pin47=PD1
Mcu.Pin48=PD3 Mcu.Pin48=PD2
Mcu.Pin49=PD4 Mcu.Pin49=PD3
Mcu.Pin5=PC1 Mcu.Pin5=PC1
Mcu.Pin50=PD5 Mcu.Pin50=PD4
Mcu.Pin51=PD6 Mcu.Pin51=PD5
Mcu.Pin52=PD7 Mcu.Pin52=PD6
Mcu.Pin53=PB3 Mcu.Pin53=PD7
Mcu.Pin54=PB4 Mcu.Pin54=PB3
Mcu.Pin55=PB5 Mcu.Pin55=PB4
Mcu.Pin56=PB6 Mcu.Pin56=PB5
Mcu.Pin57=PB7 Mcu.Pin57=PB6
Mcu.Pin58=PE0 Mcu.Pin58=PB7
Mcu.Pin59=PE1 Mcu.Pin59=PE0
Mcu.Pin6=PA1 Mcu.Pin6=PA1
Mcu.Pin60=VP_FREERTOS_VS_CMSIS_V1 Mcu.Pin60=PE1
Mcu.Pin61=VP_LWIP_VS_Enabled Mcu.Pin61=VP_FREERTOS_VS_CMSIS_V1
Mcu.Pin62=VP_SYS_VS_tim4 Mcu.Pin62=VP_LWIP_VS_Enabled
Mcu.Pin63=VP_TIM2_VS_ClockSourceINT Mcu.Pin63=VP_SYS_VS_tim4
Mcu.Pin64=VP_TIM3_VS_ClockSourceINT Mcu.Pin64=VP_TIM2_VS_ClockSourceINT
Mcu.Pin65=VP_TIM3_VS_ClockSourceINT
Mcu.Pin7=PA2 Mcu.Pin7=PA2
Mcu.Pin8=PA7 Mcu.Pin8=PA7
Mcu.Pin9=PC4 Mcu.Pin9=PC4
Mcu.PinsNb=65 Mcu.PinsNb=66
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32F407VGTx Mcu.UserName=STM32F407VGTx
@ -287,7 +288,6 @@ NVIC.SavedPendsvIrqHandlerGenerated=true
NVIC.SavedSvcallIrqHandlerGenerated=true NVIC.SavedSvcallIrqHandlerGenerated=true
NVIC.SavedSystickIrqHandlerGenerated=true NVIC.SavedSystickIrqHandlerGenerated=true
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false
NVIC.TIM3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.TIM4_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true NVIC.TIM4_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
NVIC.TimeBase=TIM4_IRQn NVIC.TimeBase=TIM4_IRQn
NVIC.TimeBaseIP=TIM4 NVIC.TimeBaseIP=TIM4
@ -338,6 +338,11 @@ PA9.GPIOParameters=GPIO_Label
PA9.GPIO_Label=USB_TX PA9.GPIO_Label=USB_TX
PA9.Mode=Asynchronous PA9.Mode=Asynchronous
PA9.Signal=USART1_TX PA9.Signal=USART1_TX
PB0.GPIOParameters=GPIO_Speed,GPIO_Label
PB0.GPIO_Label=T3_CH3_BUZZER
PB0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PB0.Locked=true
PB0.Signal=S_TIM3_CH3
PB1.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label PB1.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
PB1.GPIO_Label=LED3_R PB1.GPIO_Label=LED3_R
PB1.GPIO_PuPd=GPIO_PULLUP PB1.GPIO_PuPd=GPIO_PULLUP
@ -663,6 +668,8 @@ SH.S_TIM1_CH2.0=TIM1_CH2,Encoder_Interface
SH.S_TIM1_CH2.ConfNb=1 SH.S_TIM1_CH2.ConfNb=1
SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1 SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1
SH.S_TIM2_CH1_ETR.ConfNb=1 SH.S_TIM2_CH1_ETR.ConfNb=1
SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3
SH.S_TIM3_CH3.ConfNb=1
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_256 SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_256
SPI1.CLKPhase=SPI_PHASE_2EDGE SPI1.CLKPhase=SPI_PHASE_2EDGE
SPI1.CLKPolarity=SPI_POLARITY_HIGH SPI1.CLKPolarity=SPI_POLARITY_HIGH
@ -678,10 +685,11 @@ TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
TIM2.IPParameters=Channel-PWM Generation1 CH1,Period,Pulse-PWM Generation1 CH1 TIM2.IPParameters=Channel-PWM Generation1 CH1,Period,Pulse-PWM Generation1 CH1
TIM2.Period=119 TIM2.Period=119
TIM2.Pulse-PWM\ Generation1\ CH1=60 TIM2.Pulse-PWM\ Generation1\ CH1=60
TIM3.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
TIM3.IPParameters=Prescaler,Period,AutoReloadPreload TIM3.IPParameters=Channel-PWM Generation3 CH3,Prescaler,Period,Pulse-PWM Generation3 CH3
TIM3.Period=999 TIM3.Period=370
TIM3.Prescaler=55295 TIM3.Prescaler=54
TIM3.Pulse-PWM\ Generation3\ CH3=92
UART4.IPParameters=VirtualMode UART4.IPParameters=VirtualMode
UART4.VirtualMode=Asynchronous UART4.VirtualMode=Asynchronous
UART5.BaudRate=1200 UART5.BaudRate=1200