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选取芯片设备ID其中三位作为网口MAC地址后三位

This commit is contained in:
王绪洁 2025-03-03 10:10:52 +08:00
parent 2b5868bfff
commit 472ebda0a7
2 changed files with 250 additions and 228 deletions
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452
LWIP/Target/ethernetif.c
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@ -1,21 +1,21 @@
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : ethernetif.c * File Name : ethernetif.c
* Description : This file provides code for the configuration * @file ethernetif.c
* of the ethernetif.c MiddleWare. * of the ethernetif.c MiddleWare.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* Copyright (c) 2024 STMicroelectronics. * Copyright (c) 2024 STMicroelectronics.
* All rights reserved. * All rights reserved.
* *
* This software is licensed under terms that can be found in the LICENSE file * This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component. * in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS. * If no LICENSE file comes with this software, it is provided AS-IS.
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */ /* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -38,18 +38,18 @@
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* The time to block waiting for input. */ /* The time to block waiting for input. */
#define TIME_WAITING_FOR_INPUT ( portMAX_DELAY ) #define TIME_WAITING_FOR_INPUT (portMAX_DELAY)
/* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */ /* USER CODE BEGIN OS_THREAD_STACK_SIZE_WITH_RTOS */
/* Stack size of the interface thread */ /* Stack size of the interface thread */
#define INTERFACE_THREAD_STACK_SIZE ( 350 ) #define INTERFACE_THREAD_STACK_SIZE (350)
/* USER CODE END OS_THREAD_STACK_SIZE_WITH_RTOS */ /* USER CODE END OS_THREAD_STACK_SIZE_WITH_RTOS */
/* Network interface name */ /* Network interface name */
#define IFNAME0 's' #define IFNAME0 's'
#define IFNAME1 't' #define IFNAME1 't'
/* ETH Setting */ /* ETH Setting */
#define ETH_DMA_TRANSMIT_TIMEOUT ( 20U ) #define ETH_DMA_TRANSMIT_TIMEOUT (20U)
#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U) #define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
@ -81,8 +81,8 @@
/* Data Type Definitions */ /* Data Type Definitions */
typedef enum typedef enum
{ {
RX_ALLOC_OK = 0x00, RX_ALLOC_OK = 0x00,
RX_ALLOC_ERROR = 0x01 RX_ALLOC_ERROR = 0x01
} RxAllocStatusTypeDef; } RxAllocStatusTypeDef;
typedef struct typedef struct
@ -92,40 +92,40 @@ typedef struct
} RxBuff_t; } RxBuff_t;
/* Memory Pool Declaration */ /* Memory Pool Declaration */
#define ETH_RX_BUFFER_CNT 12U #define ETH_RX_BUFFER_CNT 12U
LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool"); LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool");
/* Variable Definitions */ /* Variable Definitions */
static uint8_t RxAllocStatus; static uint8_t RxAllocStatus;
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */ ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */ ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
/* USER CODE END 2 */ /* USER CODE END 2 */
osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */ osSemaphoreId RxPktSemaphore = NULL; /* Semaphore to signal incoming packets */
osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */ osSemaphoreId TxPktSemaphore = NULL; /* Semaphore to signal transmit packet complete */
/* Global Ethernet handle */ /* Global Ethernet handle */
ETH_HandleTypeDef heth; ETH_HandleTypeDef heth;
ETH_TxPacketConfig TxConfig; ETH_TxPacketConfig TxConfig;
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
static void ethernetif_input(void const * argument); static void ethernetif_input(void const *argument);
int32_t ETH_PHY_IO_Init(void); int32_t ETH_PHY_IO_Init(void);
int32_t ETH_PHY_IO_DeInit (void); int32_t ETH_PHY_IO_DeInit(void);
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal); int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal); int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
int32_t ETH_PHY_IO_GetTick(void); int32_t ETH_PHY_IO_GetTick(void);
lan8742_Object_t LAN8742; lan8742_Object_t LAN8742;
lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init, lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
ETH_PHY_IO_DeInit, ETH_PHY_IO_DeInit,
ETH_PHY_IO_WriteReg, ETH_PHY_IO_WriteReg,
ETH_PHY_IO_ReadReg, ETH_PHY_IO_ReadReg,
ETH_PHY_IO_GetTick}; ETH_PHY_IO_GetTick};
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
@ -135,33 +135,33 @@ lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
void pbuf_free_custom(struct pbuf *p); void pbuf_free_custom(struct pbuf *p);
/** /**
* @brief Ethernet Rx Transfer completed callback * @brief Ethernet Rx Transfer completed callback
* @param handlerEth: ETH handler * @param handlerEth: ETH handler
* @retval None * @retval None
*/ */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth) void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{ {
osSemaphoreRelease(RxPktSemaphore); osSemaphoreRelease(RxPktSemaphore);
} }
/** /**
* @brief Ethernet Tx Transfer completed callback * @brief Ethernet Tx Transfer completed callback
* @param handlerEth: ETH handler * @param handlerEth: ETH handler
* @retval None * @retval None
*/ */
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth) void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{ {
osSemaphoreRelease(TxPktSemaphore); osSemaphoreRelease(TxPktSemaphore);
} }
/** /**
* @brief Ethernet DMA transfer error callback * @brief Ethernet DMA transfer error callback
* @param handlerEth: ETH handler * @param handlerEth: ETH handler
* @retval None * @retval None
*/ */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth) void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{ {
if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS) if ((HAL_ETH_GetDMAError(handlerEth) & ETH_DMASR_RBUS) == ETH_DMASR_RBUS)
{ {
osSemaphoreRelease(RxPktSemaphore); osSemaphoreRelease(RxPktSemaphore);
} }
} }
@ -187,7 +187,7 @@ static void low_level_init(struct netif *netif)
ETH_MACConfigTypeDef MACConf = {0}; ETH_MACConfigTypeDef MACConf = {0};
/* Start ETH HAL Init */ /* Start ETH HAL Init */
uint8_t MACAddr[6] ; uint8_t MACAddr[6];
heth.Instance = ETH; heth.Instance = ETH;
MACAddr[0] = 0x00; MACAddr[0] = 0x00;
MACAddr[1] = 0x80; MACAddr[1] = 0x80;
@ -202,12 +202,15 @@ static void low_level_init(struct netif *netif)
heth.Init.RxBuffLen = 1536; heth.Init.RxBuffLen = 1536;
/* USER CODE BEGIN MACADDRESS */ /* USER CODE BEGIN MACADDRESS */
MACAddr[3] = (uint8_t)HAL_GetUIDw0();
MACAddr[4] = (uint8_t)HAL_GetUIDw1();
MACAddr[5] = (uint8_t)HAL_GetUIDw2();
heth.Init.MACAddr = &MACAddr[0];
/* USER CODE END MACADDRESS */ /* USER CODE END MACADDRESS */
hal_eth_init_status = HAL_ETH_Init(&heth); hal_eth_init_status = HAL_ETH_Init(&heth);
memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig)); memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig));
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
@ -223,23 +226,23 @@ static void low_level_init(struct netif *netif)
netif->hwaddr_len = ETH_HWADDR_LEN; netif->hwaddr_len = ETH_HWADDR_LEN;
/* set MAC hardware address */ /* set MAC hardware address */
netif->hwaddr[0] = heth.Init.MACAddr[0]; netif->hwaddr[0] = heth.Init.MACAddr[0];
netif->hwaddr[1] = heth.Init.MACAddr[1]; netif->hwaddr[1] = heth.Init.MACAddr[1];
netif->hwaddr[2] = heth.Init.MACAddr[2]; netif->hwaddr[2] = heth.Init.MACAddr[2];
netif->hwaddr[3] = heth.Init.MACAddr[3]; netif->hwaddr[3] = heth.Init.MACAddr[3];
netif->hwaddr[4] = heth.Init.MACAddr[4]; netif->hwaddr[4] = heth.Init.MACAddr[4];
netif->hwaddr[5] = heth.Init.MACAddr[5]; netif->hwaddr[5] = heth.Init.MACAddr[5];
/* maximum transfer unit */ /* maximum transfer unit */
netif->mtu = ETH_MAX_PAYLOAD; netif->mtu = ETH_MAX_PAYLOAD;
/* Accept broadcast address and ARP traffic */ /* Accept broadcast address and ARP traffic */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
#if LWIP_ARP #if LWIP_ARP
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
#else #else
netif->flags |= NETIF_FLAG_BROADCAST; netif->flags |= NETIF_FLAG_BROADCAST;
#endif /* LWIP_ARP */ #endif /* LWIP_ARP */
/* create a binary semaphore used for informing ethernetif of frame reception */ /* create a binary semaphore used for informing ethernetif of frame reception */
RxPktSemaphore = xSemaphoreCreateBinary(); RxPktSemaphore = xSemaphoreCreateBinary();
@ -248,14 +251,14 @@ static void low_level_init(struct netif *netif)
TxPktSemaphore = xSemaphoreCreateBinary(); TxPktSemaphore = xSemaphoreCreateBinary();
/* create the task that handles the ETH_MAC */ /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE); osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE);
osThreadCreate (osThread(EthIf), netif); osThreadCreate(osThread(EthIf), netif);
/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */ /* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
/* USER CODE BEGIN PHY_PRE_CONFIG */ /* USER CODE BEGIN PHY_PRE_CONFIG */
/* USER CODE END PHY_PRE_CONFIG */ /* USER CODE END PHY_PRE_CONFIG */
/* Set PHY IO functions */ /* Set PHY IO functions */
LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx); LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx);
@ -267,7 +270,7 @@ static void low_level_init(struct netif *netif)
PHYLinkState = LAN8742_GetLinkState(&LAN8742); PHYLinkState = LAN8742_GetLinkState(&LAN8742);
/* Get link state */ /* Get link state */
if(PHYLinkState <= LAN8742_STATUS_LINK_DOWN) if (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)
{ {
netif_set_link_down(netif); netif_set_link_down(netif);
netif_set_down(netif); netif_set_down(netif);
@ -298,21 +301,20 @@ static void low_level_init(struct netif *netif)
break; break;
} }
/* Get MAC Config MAC */ /* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf); HAL_ETH_GetMACConfig(&heth, &MACConf);
MACConf.DuplexMode = duplex; MACConf.DuplexMode = duplex;
MACConf.Speed = speed; MACConf.Speed = speed;
HAL_ETH_SetMACConfig(&heth, &MACConf); HAL_ETH_SetMACConfig(&heth, &MACConf);
HAL_ETH_Start_IT(&heth); HAL_ETH_Start_IT(&heth);
netif_set_up(netif); netif_set_up(netif);
netif_set_link_up(netif); netif_set_link_up(netif);
/* USER CODE BEGIN PHY_POST_CONFIG */ /* USER CODE BEGIN PHY_POST_CONFIG */
/* USER CODE END PHY_POST_CONFIG */ /* USER CODE END PHY_POST_CONFIG */
} }
} }
else else
{ {
@ -320,9 +322,9 @@ static void low_level_init(struct netif *netif)
} }
#endif /* LWIP_ARP || LWIP_ETHERNET */ #endif /* LWIP_ARP || LWIP_ETHERNET */
/* USER CODE BEGIN LOW_LEVEL_INIT */ /* USER CODE BEGIN LOW_LEVEL_INIT */
/* USER CODE END LOW_LEVEL_INIT */ /* USER CODE END LOW_LEVEL_INIT */
} }
/** /**
@ -348,22 +350,22 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
err_t errval = ERR_OK; err_t errval = ERR_OK;
ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0}; ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef)); memset(Txbuffer, 0, ETH_TX_DESC_CNT * sizeof(ETH_BufferTypeDef));
for(q = p; q != NULL; q = q->next) for (q = p; q != NULL; q = q->next)
{ {
if(i >= ETH_TX_DESC_CNT) if (i >= ETH_TX_DESC_CNT)
return ERR_IF; return ERR_IF;
Txbuffer[i].buffer = q->payload; Txbuffer[i].buffer = q->payload;
Txbuffer[i].len = q->len; Txbuffer[i].len = q->len;
if(i>0) if (i > 0)
{ {
Txbuffer[i-1].next = &Txbuffer[i]; Txbuffer[i - 1].next = &Txbuffer[i];
} }
if(q->next == NULL) if (q->next == NULL)
{ {
Txbuffer[i].next = NULL; Txbuffer[i].next = NULL;
} }
@ -378,7 +380,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
pbuf_ref(p); pbuf_ref(p);
HAL_ETH_Transmit_IT(&heth, &TxConfig); HAL_ETH_Transmit_IT(&heth, &TxConfig);
while(osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK) while (osSemaphoreWait(TxPktSemaphore, TIME_WAITING_FOR_INPUT) != osOK)
{ {
} }
@ -395,12 +397,12 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p)
* @param netif the lwip network interface structure for this ethernetif * @param netif the lwip network interface structure for this ethernetif
* @return a pbuf filled with the received packet (including MAC header) * @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error * NULL on memory error
*/ */
static struct pbuf * low_level_input(struct netif *netif) static struct pbuf *low_level_input(struct netif *netif)
{ {
struct pbuf *p = NULL; struct pbuf *p = NULL;
if(RxAllocStatus == RX_ALLOC_OK) if (RxAllocStatus == RX_ALLOC_OK)
{ {
HAL_ETH_ReadData(&heth, (void **)&p); HAL_ETH_ReadData(&heth, (void **)&p);
} }
@ -417,26 +419,26 @@ static struct pbuf * low_level_input(struct netif *netif)
* *
* @param netif the lwip network interface structure for this ethernetif * @param netif the lwip network interface structure for this ethernetif
*/ */
static void ethernetif_input(void const * argument) static void ethernetif_input(void const *argument)
{ {
struct pbuf *p = NULL; struct pbuf *p = NULL;
struct netif *netif = (struct netif *) argument; struct netif *netif = (struct netif *)argument;
for( ;; ) for (;;)
{ {
if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK) if (osSemaphoreWait(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
{ {
do do
{ {
p = low_level_input( netif ); p = low_level_input(netif);
if (p != NULL) if (p != NULL)
{ {
if (netif->input( p, netif) != ERR_OK ) if (netif->input(p, netif) != ERR_OK)
{ {
pbuf_free(p); pbuf_free(p);
} }
} }
} while(p!=NULL); } while (p != NULL);
} }
} }
} }
@ -453,12 +455,11 @@ static err_t low_level_output_arp_off(struct netif *netif, struct pbuf *q, const
err_t errval; err_t errval;
errval = ERR_OK; errval = ERR_OK;
/* USER CODE BEGIN 5 */ /* USER CODE BEGIN 5 */
/* USER CODE END 5 */ /* USER CODE END 5 */
return errval; return errval;
} }
#endif /* LWIP_ARP */ #endif /* LWIP_ARP */
@ -521,13 +522,13 @@ err_t ethernetif_init(struct netif *netif)
} }
/** /**
* @brief Custom Rx pbuf free callback * @brief Custom Rx pbuf free callback
* @param pbuf: pbuf to be freed * @param pbuf: pbuf to be freed
* @retval None * @retval None
*/ */
void pbuf_free_custom(struct pbuf *p) void pbuf_free_custom(struct pbuf *p)
{ {
struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p; struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p;
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf); LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
@ -543,11 +544,11 @@ void pbuf_free_custom(struct pbuf *p)
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
/** /**
* @brief Returns the current time in milliseconds * @brief Returns the current time in milliseconds
* when LWIP_TIMERS == 1 and NO_SYS == 1 * when LWIP_TIMERS == 1 and NO_SYS == 1
* @param None * @param None
* @retval Current Time value * @retval Current Time value
*/ */
u32_t sys_now(void) u32_t sys_now(void)
{ {
return HAL_GetTick(); return HAL_GetTick();
@ -556,19 +557,19 @@ u32_t sys_now(void)
/* USER CODE END 6 */ /* USER CODE END 6 */
/** /**
* @brief Initializes the ETH MSP. * @brief Initializes the ETH MSP.
* @param ethHandle: ETH handle * @param ethHandle: ETH handle
* @retval None * @retval None
*/ */
void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle) void HAL_ETH_MspInit(ETH_HandleTypeDef *ethHandle)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(ethHandle->Instance==ETH) if (ethHandle->Instance == ETH)
{ {
/* USER CODE BEGIN ETH_MspInit 0 */ /* USER CODE BEGIN ETH_MspInit 0 */
/* USER CODE END ETH_MspInit 0 */ /* USER CODE END ETH_MspInit 0 */
/* Enable Peripheral clock */ /* Enable Peripheral clock */
__HAL_RCC_ETH_CLK_ENABLE(); __HAL_RCC_ETH_CLK_ENABLE();
@ -586,21 +587,21 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
PB12 ------> ETH_TXD0 PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1 PB13 ------> ETH_TXD1
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5; GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH; GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7; GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH; GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13; GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -610,19 +611,19 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
/* Peripheral interrupt init */ /* Peripheral interrupt init */
HAL_NVIC_SetPriority(ETH_IRQn, 5, 0); HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(ETH_IRQn); HAL_NVIC_EnableIRQ(ETH_IRQn);
/* USER CODE BEGIN ETH_MspInit 1 */ /* USER CODE BEGIN ETH_MspInit 1 */
/* USER CODE END ETH_MspInit 1 */ /* USER CODE END ETH_MspInit 1 */
} }
} }
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle) void HAL_ETH_MspDeInit(ETH_HandleTypeDef *ethHandle)
{ {
if(ethHandle->Instance==ETH) if (ethHandle->Instance == ETH)
{ {
/* USER CODE BEGIN ETH_MspDeInit 0 */ /* USER CODE BEGIN ETH_MspDeInit 0 */
/* USER CODE END ETH_MspDeInit 0 */ /* USER CODE END ETH_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_ETH_CLK_DISABLE(); __HAL_RCC_ETH_CLK_DISABLE();
@ -637,18 +638,18 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
PB12 ------> ETH_TXD0 PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1 PB13 ------> ETH_TXD1
*/ */
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5); HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13); HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
/* Peripheral interrupt Deinit*/ /* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(ETH_IRQn); HAL_NVIC_DisableIRQ(ETH_IRQn);
/* USER CODE BEGIN ETH_MspDeInit 1 */ /* USER CODE BEGIN ETH_MspDeInit 1 */
/* USER CODE END ETH_MspDeInit 1 */ /* USER CODE END ETH_MspDeInit 1 */
} }
} }
@ -656,10 +657,10 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
PHI IO Functions PHI IO Functions
*******************************************************************************/ *******************************************************************************/
/** /**
* @brief Initializes the MDIO interface GPIO and clocks. * @brief Initializes the MDIO interface GPIO and clocks.
* @param None * @param None
* @retval 0 if OK, -1 if ERROR * @retval 0 if OK, -1 if ERROR
*/ */
int32_t ETH_PHY_IO_Init(void) int32_t ETH_PHY_IO_Init(void)
{ {
/* We assume that MDIO GPIO configuration is already done /* We assume that MDIO GPIO configuration is already done
@ -673,25 +674,25 @@ int32_t ETH_PHY_IO_Init(void)
} }
/** /**
* @brief De-Initializes the MDIO interface . * @brief De-Initializes the MDIO interface .
* @param None * @param None
* @retval 0 if OK, -1 if ERROR * @retval 0 if OK, -1 if ERROR
*/ */
int32_t ETH_PHY_IO_DeInit (void) int32_t ETH_PHY_IO_DeInit(void)
{ {
return 0; return 0;
} }
/** /**
* @brief Read a PHY register through the MDIO interface. * @brief Read a PHY register through the MDIO interface.
* @param DevAddr: PHY port address * @param DevAddr: PHY port address
* @param RegAddr: PHY register address * @param RegAddr: PHY register address
* @param pRegVal: pointer to hold the register value * @param pRegVal: pointer to hold the register value
* @retval 0 if OK -1 if Error * @retval 0 if OK -1 if Error
*/ */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{ {
if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK) if (HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
{ {
return -1; return -1;
} }
@ -700,15 +701,15 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal
} }
/** /**
* @brief Write a value to a PHY register through the MDIO interface. * @brief Write a value to a PHY register through the MDIO interface.
* @param DevAddr: PHY port address * @param DevAddr: PHY port address
* @param RegAddr: PHY register address * @param RegAddr: PHY register address
* @param RegVal: Value to be written * @param RegVal: Value to be written
* @retval 0 if OK -1 if Error * @retval 0 if OK -1 if Error
*/ */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{ {
if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK) if (HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
{ {
return -1; return -1;
} }
@ -717,84 +718,84 @@ int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
} }
/** /**
* @brief Get the time in millisecons used for internal PHY driver process. * @brief Get the time in millisecons used for internal PHY driver process.
* @retval Time value * @retval Time value
*/ */
int32_t ETH_PHY_IO_GetTick(void) int32_t ETH_PHY_IO_GetTick(void)
{ {
return HAL_GetTick(); return HAL_GetTick();
} }
/** /**
* @brief Check the ETH link state then update ETH driver and netif link accordingly. * @brief Check the ETH link state then update ETH driver and netif link accordingly.
* @retval None * @retval None
*/ */
void ethernet_link_thread(void const * argument) void ethernet_link_thread(void const *argument)
{ {
ETH_MACConfigTypeDef MACConf = {0}; ETH_MACConfigTypeDef MACConf = {0};
int32_t PHYLinkState = 0; int32_t PHYLinkState = 0;
uint32_t linkchanged = 0U, speed = 0U, duplex = 0U; uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
struct netif *netif = (struct netif *) argument; struct netif *netif = (struct netif *)argument;
/* USER CODE BEGIN ETH link init */ /* USER CODE BEGIN ETH link init */
/* USER CODE END ETH link init */ /* USER CODE END ETH link init */
for(;;) for (;;)
{ {
PHYLinkState = LAN8742_GetLinkState(&LAN8742); PHYLinkState = LAN8742_GetLinkState(&LAN8742);
if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)) if (netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
{
HAL_ETH_Stop_IT(&heth);
netif_set_down(netif);
netif_set_link_down(netif);
}
else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
{
switch (PHYLinkState)
{ {
case LAN8742_STATUS_100MBITS_FULLDUPLEX: HAL_ETH_Stop_IT(&heth);
duplex = ETH_FULLDUPLEX_MODE; netif_set_down(netif);
speed = ETH_SPEED_100M; netif_set_link_down(netif);
linkchanged = 1; }
break; else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
case LAN8742_STATUS_100MBITS_HALFDUPLEX: {
duplex = ETH_HALFDUPLEX_MODE; switch (PHYLinkState)
speed = ETH_SPEED_100M; {
linkchanged = 1; case LAN8742_STATUS_100MBITS_FULLDUPLEX:
break; duplex = ETH_FULLDUPLEX_MODE;
case LAN8742_STATUS_10MBITS_FULLDUPLEX: speed = ETH_SPEED_100M;
duplex = ETH_FULLDUPLEX_MODE; linkchanged = 1;
speed = ETH_SPEED_10M; break;
linkchanged = 1; case LAN8742_STATUS_100MBITS_HALFDUPLEX:
break; duplex = ETH_HALFDUPLEX_MODE;
case LAN8742_STATUS_10MBITS_HALFDUPLEX: speed = ETH_SPEED_100M;
duplex = ETH_HALFDUPLEX_MODE; linkchanged = 1;
speed = ETH_SPEED_10M; break;
linkchanged = 1; case LAN8742_STATUS_10MBITS_FULLDUPLEX:
break; duplex = ETH_FULLDUPLEX_MODE;
default: speed = ETH_SPEED_10M;
break; linkchanged = 1;
break;
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
duplex = ETH_HALFDUPLEX_MODE;
speed = ETH_SPEED_10M;
linkchanged = 1;
break;
default:
break;
}
if (linkchanged)
{
/* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf);
MACConf.DuplexMode = duplex;
MACConf.Speed = speed;
HAL_ETH_SetMACConfig(&heth, &MACConf);
HAL_ETH_Start_IT(&heth);
netif_set_up(netif);
netif_set_link_up(netif);
}
} }
if(linkchanged) /* USER CODE BEGIN ETH link Thread core code for User BSP */
{
/* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf);
MACConf.DuplexMode = duplex;
MACConf.Speed = speed;
HAL_ETH_SetMACConfig(&heth, &MACConf);
HAL_ETH_Start_IT(&heth);
netif_set_up(netif);
netif_set_link_up(netif);
}
}
/* USER CODE BEGIN ETH link Thread core code for User BSP */ /* USER CODE END ETH link Thread core code for User BSP */
/* USER CODE END ETH link Thread core code for User BSP */
osDelay(100); osDelay(100);
} }
@ -802,7 +803,7 @@ void ethernet_link_thread(void const * argument)
void HAL_ETH_RxAllocateCallback(uint8_t **buff) void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{ {
/* USER CODE BEGIN HAL ETH RxAllocateCallback */ /* USER CODE BEGIN HAL ETH RxAllocateCallback */
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL); struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
if (p) if (p)
{ {
@ -810,8 +811,8 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buff)
*buff = (uint8_t *)p + offsetof(RxBuff_t, buff); *buff = (uint8_t *)p + offsetof(RxBuff_t, buff);
p->custom_free_function = pbuf_free_custom; p->custom_free_function = pbuf_free_custom;
/* Initialize the struct pbuf. /* Initialize the struct pbuf.
* This must be performed whenever a buffer's allocated because it may be * This must be performed whenever a buffer's allocated because it may be
* changed by lwIP or the app, e.g., pbuf_free decrements ref. */ * changed by lwIP or the app, e.g., pbuf_free decrements ref. */
pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUF_SIZE); pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUF_SIZE);
} }
else else
@ -819,12 +820,12 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buff)
RxAllocStatus = RX_ALLOC_ERROR; RxAllocStatus = RX_ALLOC_ERROR;
*buff = NULL; *buff = NULL;
} }
/* USER CODE END HAL ETH RxAllocateCallback */ /* USER CODE END HAL ETH RxAllocateCallback */
} }
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length) void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{ {
/* USER CODE BEGIN HAL ETH RxLinkCallback */ /* USER CODE BEGIN HAL ETH RxLinkCallback */
struct pbuf **ppStart = (struct pbuf **)pStart; struct pbuf **ppStart = (struct pbuf **)pStart;
struct pbuf **ppEnd = (struct pbuf **)pEnd; struct pbuf **ppEnd = (struct pbuf **)pEnd;
@ -847,7 +848,7 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
/* Chain the buffer to the end of the packet. */ /* Chain the buffer to the end of the packet. */
(*ppEnd)->next = p; (*ppEnd)->next = p;
} }
*ppEnd = p; *ppEnd = p;
/* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len
* set to its own length, plus the length of all the following pbufs in the chain. */ * set to its own length, plus the length of all the following pbufs in the chain. */
@ -856,19 +857,18 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
p->tot_len += Length; p->tot_len += Length;
} }
/* USER CODE END HAL ETH RxLinkCallback */ /* USER CODE END HAL ETH RxLinkCallback */
} }
void HAL_ETH_TxFreeCallback(uint32_t * buff) void HAL_ETH_TxFreeCallback(uint32_t *buff)
{ {
/* USER CODE BEGIN HAL ETH TxFreeCallback */ /* USER CODE BEGIN HAL ETH TxFreeCallback */
pbuf_free((struct pbuf *)buff); pbuf_free((struct pbuf *)buff);
/* USER CODE END HAL ETH TxFreeCallback */ /* USER CODE END HAL ETH TxFreeCallback */
} }
/* USER CODE BEGIN 8 */ /* USER CODE BEGIN 8 */
/* USER CODE END 8 */ /* USER CODE END 8 */

26
MDK-ARM/semi-finished_product_testing.uvoptx
View File

@ -148,7 +148,24 @@
<Name>-US -O2254 -SF1800 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name> <Name>-US -O2254 -SF1800 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
</SetRegEntry> </SetRegEntry>
</TargetDriverDllRegistry> </TargetDriverDllRegistry>
<Breakpoint/> <Breakpoint>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>208</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134254976</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../LWIP/Target/ethernetif.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../LWIP/Target/ethernetif.c\208</Expression>
</Bp>
</Breakpoint>
<WatchWindow1> <WatchWindow1>
<Ww> <Ww>
<count>0</count> <count>0</count>
@ -270,12 +287,17 @@
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<ItemText>tcp_rx_data</ItemText> <ItemText>tcp_rx_data</ItemText>
</Ww> </Ww>
<Ww>
<count>24</count>
<WinNumber>1</WinNumber>
<ItemText>MACAddr</ItemText>
</Ww>
</WatchWindow1> </WatchWindow1>
<MemoryWindow1> <MemoryWindow1>
<Mm> <Mm>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<SubType>0</SubType> <SubType>0</SubType>
<ItemText>\\semi_finished_product_testing\../LWIP/Target/ethernetif.c\heth.Init.MACAddr</ItemText> <ItemText>0x1fff7a10</ItemText>
<AccSizeX>0</AccSizeX> <AccSizeX>0</AccSizeX>
</Mm> </Mm>
</MemoryWindow1> </MemoryWindow1>