diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index dba87ae..f143d8f 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -40,24 +40,24 @@ extern "C" {
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
- extern uint8_t tcp_echo_flags_hart1; // 标志位，连接成功?1
- extern uint8_t tcp_echo_flags_hart2; // 标志位，连接成功?1
- extern uint8_t tcp_echo_flags_ble1;
- extern uint8_t tcp_echo_flags_ble2;
+extern uint8_t tcp_echo_flags_hart1; // 标志位，连接成功?1
+extern uint8_t tcp_echo_flags_hart2; // 标志位，连接成功?1
+extern uint8_t tcp_echo_flags_ble1;
+extern uint8_t tcp_echo_flags_ble2;
#define ARRAY_LEN(arr) (sizeof(arr)) / (sizeof(arr[0]))
- typedef struct
- {
- uint16_t rx_num; // 接收到数据个?
- uint8_t rx_data[512]; // 接收到数据区
- uint8_t rx_data_temp[512]; // 接收到数据缓冲区
- uint8_t tx_data[512]; // 发?数据区
- } uart_t;
+typedef struct
+{
+ uint16_t rx_num; // 接收到数据个?
+ uint8_t rx_data[512]; // 接收到数据区
+ uint8_t rx_data_temp[512]; // 接收到数据缓冲区
+ uint8_t tx_data[512]; // 发?数据区
+} uart_t;
- extern uart_t lcd_uart4;
- extern uart_t ble2_uart3;
- extern uart_t ble1_uart6;
- extern uart_t hart1_uart5;
- extern uart_t hart2_uart2;
+extern uart_t lcd_uart4;
+extern uart_t ble2_uart3;
+extern uart_t ble1_uart6;
+extern uart_t hart1_uart5;
+extern uart_t hart2_uart2;
#define DEST_IP_ADDR0 192
#define DEST_IP_ADDR1 168
#define DEST_IP_ADDR2 1
diff --git a/Core/Inc/stm32f4xx_it.h b/Core/Inc/stm32f4xx_it.h
index af28d4f..0be3aeb 100644
--- a/Core/Inc/stm32f4xx_it.h
+++ b/Core/Inc/stm32f4xx_it.h
@@ -54,6 +54,7 @@ void UsageFault_Handler(void);
void DebugMon_Handler(void);
void EXTI1_IRQHandler(void);
void EXTI3_IRQHandler(void);
+void DMA1_Stream0_IRQHandler(void);
void DMA1_Stream1_IRQHandler(void);
void DMA1_Stream2_IRQHandler(void);
void DMA1_Stream3_IRQHandler(void);
@@ -62,6 +63,7 @@ void TIM1_UP_TIM10_IRQHandler(void);
void TIM3_IRQHandler(void);
void USART2_IRQHandler(void);
void USART3_IRQHandler(void);
+void DMA1_Stream7_IRQHandler(void);
void UART4_IRQHandler(void);
void UART5_IRQHandler(void);
void DMA2_Stream1_IRQHandler(void);
diff --git a/Core/Src/dma.c b/Core/Src/dma.c
index 65c89e0..de2499f 100644
--- a/Core/Src/dma.c
+++ b/Core/Src/dma.c
@@ -44,6 +44,9 @@ void MX_DMA_Init(void)
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
+ /* DMA1_Stream0_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
/* DMA1_Stream1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
@@ -56,6 +59,9 @@ void MX_DMA_Init(void)
/* DMA1_Stream4_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
+ /* DMA1_Stream7_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 5, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
/* DMA2_Stream1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
diff --git a/Core/Src/freertos.c b/Core/Src/freertos.c
index 3f273af..2d613b5 100644
--- a/Core/Src/freertos.c
+++ b/Core/Src/freertos.c
@@ -188,7 +188,7 @@ void start_dac_task(void const *argument)
{
dac161s997_output(DAC161S997_1, 12.0f);
dac161s997_output(DAC161S997_2, 12.0f);
- vTaskDelay(300);
+ vTaskDelay(200);
}
/* USER CODE END start_dac_task */
}
diff --git a/Core/Src/main.c b/Core/Src/main.c
index 0f07a1d..6990a64 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -78,9 +78,9 @@ uint8_t tcp_echo_flags_ble2 = 0;
/* USER CODE END 0 */
/**
- * @brief The application entry point.
- * @retval int
- */
+ * @brief The application entry point.
+ * @retval int
+ */
int main(void)
{
/* USER CODE BEGIN 1 */
@@ -120,6 +120,7 @@ int main(void)
HAL_UARTEx_ReceiveToIdle_DMA(&huart4, lcd_uart4.rx_data_temp, ARRAY_LEN(lcd_uart4.rx_data_temp));
HAL_UARTEx_ReceiveToIdle_DMA(&huart6, ble1_uart6.rx_data_temp, ARRAY_LEN(ble1_uart6.rx_data_temp));
HAL_UARTEx_ReceiveToIdle_DMA(&huart3, ble2_uart3.rx_data_temp, ARRAY_LEN(ble2_uart3.rx_data_temp));
+ HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp));
hart_ht1200m_reset(); // 夝佝HT1200M模块
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); // 坯动PWM输出，用于驱动HT1200M模块
/* USER CODE END 2 */
@@ -143,22 +144,22 @@ int main(void)
}
/**
- * @brief System Clock Configuration
- * @retval None
- */
+ * @brief System Clock Configuration
+ * @retval None
+ */
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
- */
+ */
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
+ * in the RCC_OscInitTypeDef structure.
+ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -173,9 +174,8 @@ void SystemClock_Config(void)
}
/** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
@@ -215,24 +215,41 @@ void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
}
HAL_UARTEx_ReceiveToIdle_DMA(&huart3, ble2_uart3.rx_data_temp, ARRAY_LEN(ble2_uart3.rx_data_temp));
}
+ if (huart == &huart5)
+ {
+ __HAL_UNLOCK(huart);
+ hart1_uart5.rx_num = Size;
+ memset(hart1_uart5.rx_data, 0, ARRAY_LEN(hart1_uart5.rx_data));
+ memcpy(hart1_uart5.rx_data, hart1_uart5.rx_data_temp, Size);
+ if (tcp_echo_flags_hart1 == 1)
+ {
+ user_send_data_hart1(hart1_uart5.rx_data, Size);
+ }
+ HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp));
+ }
}
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+ HART1_RTS_RECEIVE;
+}
/* USER CODE END 4 */
/**
- * @brief Period elapsed callback in non blocking mode
- * @note This function is called when TIM1 interrupt took place, inside
- * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
- * a global variable "uwTick" used as application time base.
- * @param htim : TIM handle
- * @retval None
- */
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM1 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
/* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */
- if (htim->Instance == TIM1) {
+ if (htim->Instance == TIM1)
+ {
HAL_IncTick();
}
/* USER CODE BEGIN Callback 1 */
@@ -241,9 +258,9 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
}
/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
@@ -255,14 +272,14 @@ void Error_Handler(void)
/* USER CODE END Error_Handler_Debug */
}
-#ifdef USE_FULL_ASSERT
+#ifdef USE_FULL_ASSERT
/**
- * @brief Reports the name of the source file and the source line number
- * where the assert_param error has occurred.
- * @param file: pointer to the source file name
- * @param line: assert_param error line source number
- * @retval None
- */
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c
index a5e8551..5bac172 100644
--- a/Core/Src/stm32f4xx_it.c
+++ b/Core/Src/stm32f4xx_it.c
@@ -25,6 +25,7 @@
#include "tim.h"
#include "usart.h"
#include "tcpserverc.h"
+#include "ht1200m.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@@ -64,6 +65,8 @@ extern ETH_HandleTypeDef heth;
extern TIM_HandleTypeDef htim3;
extern DMA_HandleTypeDef hdma_uart4_rx;
extern DMA_HandleTypeDef hdma_uart4_tx;
+extern DMA_HandleTypeDef hdma_uart5_tx;
+extern DMA_HandleTypeDef hdma_uart5_rx;
extern DMA_HandleTypeDef hdma_usart3_rx;
extern DMA_HandleTypeDef hdma_usart3_tx;
extern DMA_HandleTypeDef hdma_usart6_rx;
@@ -83,8 +86,8 @@ extern TIM_HandleTypeDef htim1;
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
- * @brief This function handles Non maskable interrupt.
- */
+ * @brief This function handles Non maskable interrupt.
+ */
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
@@ -98,8 +101,8 @@ void NMI_Handler(void)
}
/**
- * @brief This function handles Hard fault interrupt.
- */
+ * @brief This function handles Hard fault interrupt.
+ */
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
@@ -113,8 +116,8 @@ void HardFault_Handler(void)
}
/**
- * @brief This function handles Memory management fault.
- */
+ * @brief This function handles Memory management fault.
+ */
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
@@ -128,8 +131,8 @@ void MemManage_Handler(void)
}
/**
- * @brief This function handles Pre-fetch fault, memory access fault.
- */
+ * @brief This function handles Pre-fetch fault, memory access fault.
+ */
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
@@ -143,8 +146,8 @@ void BusFault_Handler(void)
}
/**
- * @brief This function handles Undefined instruction or illegal state.
- */
+ * @brief This function handles Undefined instruction or illegal state.
+ */
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
@@ -158,8 +161,8 @@ void UsageFault_Handler(void)
}
/**
- * @brief This function handles Debug monitor.
- */
+ * @brief This function handles Debug monitor.
+ */
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
@@ -178,8 +181,8 @@ void DebugMon_Handler(void)
/******************************************************************************/
/**
- * @brief This function handles EXTI line1 interrupt.
- */
+ * @brief This function handles EXTI line1 interrupt.
+ */
void EXTI1_IRQHandler(void)
{
/* USER CODE BEGIN EXTI1_IRQn 0 */
@@ -192,8 +195,8 @@ void EXTI1_IRQHandler(void)
}
/**
- * @brief This function handles EXTI line3 interrupt.
- */
+ * @brief This function handles EXTI line3 interrupt.
+ */
void EXTI3_IRQHandler(void)
{
/* USER CODE BEGIN EXTI3_IRQn 0 */
@@ -206,8 +209,22 @@ void EXTI3_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream1 global interrupt.
- */
+ * @brief This function handles DMA1 stream0 global interrupt.
+ */
+void DMA1_Stream0_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
+
+ /* USER CODE END DMA1_Stream0_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_uart5_rx);
+ /* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
+
+ /* USER CODE END DMA1_Stream0_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA1 stream1 global interrupt.
+ */
void DMA1_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
@@ -220,8 +237,8 @@ void DMA1_Stream1_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream2 global interrupt.
- */
+ * @brief This function handles DMA1 stream2 global interrupt.
+ */
void DMA1_Stream2_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
@@ -234,8 +251,8 @@ void DMA1_Stream2_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream3 global interrupt.
- */
+ * @brief This function handles DMA1 stream3 global interrupt.
+ */
void DMA1_Stream3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
@@ -248,8 +265,8 @@ void DMA1_Stream3_IRQHandler(void)
}
/**
- * @brief This function handles DMA1 stream4 global interrupt.
- */
+ * @brief This function handles DMA1 stream4 global interrupt.
+ */
void DMA1_Stream4_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
@@ -262,8 +279,8 @@ void DMA1_Stream4_IRQHandler(void)
}
/**
- * @brief This function handles TIM1 update interrupt and TIM10 global interrupt.
- */
+ * @brief This function handles TIM1 update interrupt and TIM10 global interrupt.
+ */
void TIM1_UP_TIM10_IRQHandler(void)
{
/* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
@@ -276,8 +293,8 @@ void TIM1_UP_TIM10_IRQHandler(void)
}
/**
- * @brief This function handles TIM3 global interrupt.
- */
+ * @brief This function handles TIM3 global interrupt.
+ */
void TIM3_IRQHandler(void)
{
/* USER CODE BEGIN TIM3_IRQn 0 */
@@ -290,8 +307,8 @@ void TIM3_IRQHandler(void)
}
/**
- * @brief This function handles USART2 global interrupt.
- */
+ * @brief This function handles USART2 global interrupt.
+ */
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
@@ -321,8 +338,8 @@ void USART2_IRQHandler(void)
}
/**
- * @brief This function handles USART3 global interrupt.
- */
+ * @brief This function handles USART3 global interrupt.
+ */
void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
@@ -335,8 +352,30 @@ void USART3_IRQHandler(void)
}
/**
- * @brief This function handles UART4 global interrupt.
- */
+ * @brief This function handles DMA1 stream7 global interrupt.
+ */
+void DMA1_Stream7_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
+ // if (__HAL_DMA_GET_FLAG(&hdma_uart5_tx, DMA_FLAG_TCIF3_7) != RESET)
+ // {
+ // uint8_t i = 0;
+ // for (i = 0; i < 200; i++)
+ // {
+ // HART1_RTS_SEND;
+ // }
+ // HART1_RTS_RECEIVE;
+ // }
+ /* USER CODE END DMA1_Stream7_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_uart5_tx);
+ /* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
+
+ /* USER CODE END DMA1_Stream7_IRQn 1 */
+}
+
+/**
+ * @brief This function handles UART4 global interrupt.
+ */
void UART4_IRQHandler(void)
{
/* USER CODE BEGIN UART4_IRQn 0 */
@@ -348,29 +387,29 @@ void UART4_IRQHandler(void)
}
/**
- * @brief This function handles UART5 global interrupt.
- */
+ * @brief This function handles UART5 global interrupt.
+ */
void UART5_IRQHandler(void)
{
/* USER CODE BEGIN UART5_IRQn 0 */
- uint8_t receive_data = 0;
- if (__HAL_UART_GET_FLAG(&huart5, UART_FLAG_RXNE) != RESET)
- {
- HAL_UART_Receive(&huart5, &receive_data, 1, 1);
- hart1_uart5.rx_data[hart1_uart5.rx_num] = receive_data;
- hart1_uart5.rx_num++;
- __HAL_UART_CLEAR_IDLEFLAG(&huart5);
- }
- // 空闲中断
- if (__HAL_UART_GET_FLAG(&huart5, UART_FLAG_IDLE) != RESET)
- {
- if (tcp_echo_flags_hart1 == 1)
- {
- user_send_data_hart1(hart1_uart5.rx_data, hart1_uart5.rx_num);
- }
- hart1_uart5.rx_num = 0;
- __HAL_UART_CLEAR_IDLEFLAG(&huart5);
- }
+ // uint8_t receive_data = 0;
+ // if (__HAL_UART_GET_FLAG(&huart5, UART_FLAG_RXNE) != RESET)
+ // {
+ // HAL_UART_Receive(&huart5, &receive_data, 1, 1);
+ // hart1_uart5.rx_data[hart1_uart5.rx_num] = receive_data;
+ // hart1_uart5.rx_num++;
+ // __HAL_UART_CLEAR_IDLEFLAG(&huart5);
+ // }
+ // // 空闲中断
+ // if (__HAL_UART_GET_FLAG(&huart5, UART_FLAG_IDLE) != RESET)
+ // {
+ // if (tcp_echo_flags_hart1 == 1)
+ // {
+ // user_send_data_hart1(hart1_uart5.rx_data, hart1_uart5.rx_num);
+ // }
+ // hart1_uart5.rx_num = 0;
+ // __HAL_UART_CLEAR_IDLEFLAG(&huart5);
+ // }
/* USER CODE END UART5_IRQn 0 */
HAL_UART_IRQHandler(&huart5);
/* USER CODE BEGIN UART5_IRQn 1 */
@@ -378,8 +417,8 @@ void UART5_IRQHandler(void)
}
/**
- * @brief This function handles DMA2 stream1 global interrupt.
- */
+ * @brief This function handles DMA2 stream1 global interrupt.
+ */
void DMA2_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
@@ -392,8 +431,8 @@ void DMA2_Stream1_IRQHandler(void)
}
/**
- * @brief This function handles Ethernet global interrupt.
- */
+ * @brief This function handles Ethernet global interrupt.
+ */
void ETH_IRQHandler(void)
{
/* USER CODE BEGIN ETH_IRQn 0 */
@@ -406,8 +445,8 @@ void ETH_IRQHandler(void)
}
/**
- * @brief This function handles DMA2 stream6 global interrupt.
- */
+ * @brief This function handles DMA2 stream6 global interrupt.
+ */
void DMA2_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
@@ -420,8 +459,8 @@ void DMA2_Stream6_IRQHandler(void)
}
/**
- * @brief This function handles USART6 global interrupt.
- */
+ * @brief This function handles USART6 global interrupt.
+ */
void USART6_IRQHandler(void)
{
/* USER CODE BEGIN USART6_IRQn 0 */
diff --git a/Core/Src/usart.c b/Core/Src/usart.c
index 4546d20..d607fa4 100644
--- a/Core/Src/usart.c
+++ b/Core/Src/usart.c
@@ -31,6 +31,8 @@ UART_HandleTypeDef huart3;
UART_HandleTypeDef huart6;
DMA_HandleTypeDef hdma_uart4_rx;
DMA_HandleTypeDef hdma_uart4_tx;
+DMA_HandleTypeDef hdma_uart5_tx;
+DMA_HandleTypeDef hdma_uart5_rx;
DMA_HandleTypeDef hdma_usart3_rx;
DMA_HandleTypeDef hdma_usart3_tx;
DMA_HandleTypeDef hdma_usart6_rx;
@@ -278,6 +280,43 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
HAL_GPIO_Init(HART1_RX_GPIO_Port, &GPIO_InitStruct);
+ /* UART5 DMA Init */
+ /* UART5_TX Init */
+ hdma_uart5_tx.Instance = DMA1_Stream7;
+ hdma_uart5_tx.Init.Channel = DMA_CHANNEL_4;
+ hdma_uart5_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_uart5_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_uart5_tx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_uart5_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_uart5_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_uart5_tx.Init.Mode = DMA_NORMAL;
+ hdma_uart5_tx.Init.Priority = DMA_PRIORITY_LOW;
+ hdma_uart5_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+ if (HAL_DMA_Init(&hdma_uart5_tx) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart5_tx);
+
+ /* UART5_RX Init */
+ hdma_uart5_rx.Instance = DMA1_Stream0;
+ hdma_uart5_rx.Init.Channel = DMA_CHANNEL_4;
+ hdma_uart5_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
+ hdma_uart5_rx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_uart5_rx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_uart5_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_uart5_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_uart5_rx.Init.Mode = DMA_NORMAL;
+ hdma_uart5_rx.Init.Priority = DMA_PRIORITY_LOW;
+ hdma_uart5_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+ if (HAL_DMA_Init(&hdma_uart5_rx) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(uartHandle,hdmarx,hdma_uart5_rx);
+
/* UART5 interrupt Init */
HAL_NVIC_SetPriority(UART5_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(UART5_IRQn);
@@ -485,6 +524,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
HAL_GPIO_DeInit(HART1_RX_GPIO_Port, HART1_RX_Pin);
+ /* UART5 DMA DeInit */
+ HAL_DMA_DeInit(uartHandle->hdmatx);
+ HAL_DMA_DeInit(uartHandle->hdmarx);
+
/* UART5 interrupt Deinit */
HAL_NVIC_DisableIRQ(UART5_IRQn);
/* USER CODE BEGIN UART5_MspDeInit 1 */
diff --git a/MDK-ARM/TEST2.uvoptx b/MDK-ARM/TEST2.uvoptx
index 57d481d..902b41f 100644
--- a/MDK-ARM/TEST2.uvoptx
+++ b/MDK-ARM/TEST2.uvoptx
@@ -148,24 +148,7 @@
-UB -O2254 -SF1800 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)
-
-
- 0
- 0
- 289
- 1
- 134219030
- 0
- 0
- 0
- 0
- 0
- 1
- ../Core/Src/stm32f4xx_it.c
-
- \\TEST2\../Core/Src/stm32f4xx_it.c\289
-
-
+
0
diff --git a/TEST2.ioc b/TEST2.ioc
index 0364d14..9d11aeb 100644
--- a/TEST2.ioc
+++ b/TEST2.ioc
@@ -8,7 +8,9 @@ Dma.Request2=UART4_RX
Dma.Request3=UART4_TX
Dma.Request4=USART3_RX
Dma.Request5=USART3_TX
-Dma.RequestsNb=6
+Dma.Request6=UART5_TX
+Dma.Request7=UART5_RX
+Dma.RequestsNb=8
Dma.UART4_RX.2.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART4_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART4_RX.2.Instance=DMA1_Stream2
@@ -29,6 +31,26 @@ Dma.UART4_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART4_TX.3.PeriphInc=DMA_PINC_DISABLE
Dma.UART4_TX.3.Priority=DMA_PRIORITY_VERY_HIGH
Dma.UART4_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.UART5_RX.7.Direction=DMA_PERIPH_TO_MEMORY
+Dma.UART5_RX.7.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.UART5_RX.7.Instance=DMA1_Stream0
+Dma.UART5_RX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART5_RX.7.MemInc=DMA_MINC_ENABLE
+Dma.UART5_RX.7.Mode=DMA_NORMAL
+Dma.UART5_RX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART5_RX.7.PeriphInc=DMA_PINC_DISABLE
+Dma.UART5_RX.7.Priority=DMA_PRIORITY_LOW
+Dma.UART5_RX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.UART5_TX.6.Direction=DMA_MEMORY_TO_PERIPH
+Dma.UART5_TX.6.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.UART5_TX.6.Instance=DMA1_Stream7
+Dma.UART5_TX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART5_TX.6.MemInc=DMA_MINC_ENABLE
+Dma.UART5_TX.6.Mode=DMA_NORMAL
+Dma.UART5_TX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART5_TX.6.PeriphInc=DMA_PINC_DISABLE
+Dma.UART5_TX.6.Priority=DMA_PRIORITY_LOW
+Dma.UART5_TX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_RX.4.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.4.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_RX.4.Instance=DMA1_Stream1
@@ -184,10 +206,12 @@ Mcu.UserName=STM32F407VGTx
MxCube.Version=6.8.0
MxDb.Version=DB.6.0.80
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
diff --git a/User/application/src/tcpserverc.c b/User/application/src/tcpserverc.c
index 2c2c9a6..bd878b3 100644
--- a/User/application/src/tcpserverc.c
+++ b/User/application/src/tcpserverc.c
@@ -37,8 +37,8 @@ static err_t tcpecho_recv_hart1(void *arg, struct tcp_pcb *tpcb, struct pbuf *p,
#if 1
memcpy(hart1_uart5.tx_data, (int *)p->payload, p->tot_len);
HART1_RTS_SEND;
- HAL_UART_Transmit(&huart5, hart1_uart5.tx_data, p->tot_len, 500);
- HART1_RTS_RECEIVE;
+ dma_usart_send(&huart5, hart1_uart5.tx_data, p->tot_len);
+ // HART1_RTS_RECEIVE;
#endif
#if 0
memcpy(ble1_uart6.tx_data, (int *)p->payload, p->tot_len);