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signal_generator
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删除多余部分代码

This commit is contained in:
王绪洁 2025-07-28 16:50:30 +08:00
parent 78e0073116
commit 9bf76112e0
6 changed files with 6417 additions and 2771 deletions
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41
Core/Src/freertos.c
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@ -249,15 +249,6 @@ void start_adc_task(void const *argument)
{
ad7124_get_analog(ch);
}
// HAL_GPIO_TogglePin(LED2_Y_GPIO_Port, LED2_Y_Pin);
if (huart5.RxState == HAL_UART_STATE_READY)
{
HAL_UARTEx_ReceiveToIdle_DMA(&huart5, hart1_uart5.rx_data_temp, ARRAY_LEN(hart1_uart5.rx_data_temp));
}
if (huart2.RxState == HAL_UART_STATE_READY)
{
HAL_UARTEx_ReceiveToIdle_DMA(&huart2, hart2_uart2.rx_data_temp, ARRAY_LEN(hart2_uart2.rx_data_temp));
}
osThreadResume(dac_taskHandle);
vTaskDelay(10);
}
@ -277,37 +268,7 @@ void start_gpio_di_do_task(void const *argument)
/* Infinite loop */
for (;;)
{
uint8_t di_ch = 0;
uint8_t tx_data_len = 7 + DI_MAX;
uint8_t tx_data[32] = {0};
tx_data[0] = FRAME_HEAD; // 帧头
tx_data[1] = COM_OK; // 状<>?<3F>码
tx_data[2] = DEVICE_NUM; // 设备<E8AEBE>??
tx_data[3] = SEND_STATE_CMD; // 命令<E591BD>??
tx_data[4] = DI_MAX; // 数据长度
for (di_ch = 0; di_ch < DI_MAX; di_ch++)
{
di_state_now[di_ch] = gpio_di_test(di_ch);
if (di_state_last[di_ch] != di_state_now[di_ch])
{
di_state_last[di_ch] = di_state_now[di_ch];
send_data_flag_cmd = 1;
}
tx_data[5 + di_ch] = di_state_now[di_ch];
}
if ((send_data_flag_cmd != 0) && (1 == tcp_echo_flags_control))
{
tx_data[5 + DI_MAX] = xor_compute(tx_data + 1, tx_data_len - 3); // 异或校验
tx_data[6 + DI_MAX] = FRAME_TAIL; // 帧尾
user_send_data_control(tx_data, tx_data_len);
send_data_flag_cmd++;
if (send_data_flag_cmd > 3) // 连续三次上位机没有回应，则停止发送数据包
{
send_data_flag_cmd = 0;
}
}
vTaskDelay(100);
osThreadTerminate(NULL);
}
/* USER CODE END start_gpio_di_do_task */
}

48
MDK-ARM/DebugConfig/signal_generator_STM32F407VGTx.dbgconf Normal file
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@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

3646
MDK-ARM/signal_generator.uvguix.Wangxujie Normal file
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5
MDK-ARM/signal_generator.uvoptx
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@ -187,6 +187,11 @@
<WinNumber>1</WinNumber>
<ItemText>current_buff</ItemText>
</Ww>
<Ww>
<count>4</count>
<WinNumber>1</WinNumber>
<ItemText>ad7124_analog</ItemText>
</Ww>
</WatchWindow1>
<Tracepoint>
<THDelay>0</THDelay>

2
MDK-ARM/signal_generator/ExtDll.iex Normal file
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@ -0,0 +1,2 @@
[EXTDLL]
Count=0

5446
MDK-ARM/signal_generator/signal_generator.hex
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