diff --git a/Core/Src/freertos.c b/Core/Src/freertos.c index c05f5f1..d47cb2e 100644 --- a/Core/Src/freertos.c +++ b/Core/Src/freertos.c @@ -186,7 +186,7 @@ void start_led_toggle_task(void const *argument) /* Infinite loop */ for (;;) { - // HAL_GPIO_TogglePin(LED2_G_GPIO_Port, LED2_G_Pin); + HAL_GPIO_TogglePin(LED2_G_GPIO_Port, LED2_G_Pin); vTaskDelay(500); } /* USER CODE END start_led_toggle_task */ @@ -228,11 +228,13 @@ void start_adc_task(void const *argument) /* Infinite loop */ for (;;) { - uint8_t ch = 0; - for (ch = STOP_NC_ADC; ch < AD7124_CHANNEL_EN_MAX; ch++) - { - ad7124_get_analog(ch); - } + // uint8_t ch = 0; + // for (ch = STOP_NC_ADC; ch < AD7124_CHANNEL_EN_MAX; ch++) + // { + ad7124_get_analog(STOP_NC_ADC); + ad7124_get_analog(AI_IN2_ADC); + ad7124_get_analog(P2_AI_ADC); + // } HAL_GPIO_TogglePin(LED2_G_GPIO_Port, LED2_G_Pin); if (huart5.RxState == HAL_UART_STATE_READY) { @@ -242,6 +244,7 @@ void start_adc_task(void const *argument) { HAL_UARTEx_ReceiveToIdle_DMA(&huart2, hart2_uart2.rx_data_temp, ARRAY_LEN(hart2_uart2.rx_data_temp)); } + vTaskDelay(100); } /* USER CODE END start_adc_task */ } diff --git a/MDK-ARM/DebugConfig/semi-finished_product_testing_STM32F407VGTx.dbgconf b/MDK-ARM/DebugConfig/semi-finished_product_testing_STM32F407VGTx.dbgconf new file mode 100644 index 0000000..1df0a1b --- /dev/null +++ b/MDK-ARM/DebugConfig/semi-finished_product_testing_STM32F407VGTx.dbgconf @@ -0,0 +1,48 @@ +// File: STM32F405_415_407_417_427_437_429_439.dbgconf +// Version: 1.0.0 +// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090) +// refer to STM32F40x STM32F41x datasheets +// refer to STM32F42x STM32F43x datasheets + +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug MCU configuration register (DBGMCU_CR) +// DBG_STANDBY Debug Standby Mode +// DBG_STOP Debug Stop Mode +// DBG_SLEEP Debug Sleep Mode +// +DbgMCU_CR = 0x00000007; + +// Debug MCU APB1 freeze register (DBGMCU_APB1_FZ) +// Reserved bits must be kept at reset value +// DBG_CAN2_STOP CAN2 stopped when core is halted +// DBG_CAN1_STOP CAN2 stopped when core is halted +// DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS timeout mode stopped when core is halted +// DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS timeout mode stopped when core is halted +// DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS timeout mode stopped when core is halted +// DBG_IWDG_STOP Independent watchdog stopped when core is halted +// DBG_WWDG_STOP Window watchdog stopped when core is halted +// DBG_RTC_STOP RTC stopped when core is halted +// DBG_TIM14_STOP TIM14 counter stopped when core is halted +// DBG_TIM13_STOP TIM13 counter stopped when core is halted +// DBG_TIM12_STOP TIM12 counter stopped when core is halted +// DBG_TIM7_STOP TIM7 counter stopped when core is halted +// DBG_TIM6_STOP TIM6 counter stopped when core is halted +// DBG_TIM5_STOP TIM5 counter stopped when core is halted +// DBG_TIM4_STOP TIM4 counter stopped when core is halted +// DBG_TIM3_STOP TIM3 counter stopped when core is halted +// DBG_TIM2_STOP TIM2 counter stopped when core is halted +// +DbgMCU_APB1_Fz = 0x00000000; + +// Debug MCU APB2 freeze register (DBGMCU_APB2_FZ) +// Reserved bits must be kept at reset value +// DBG_TIM11_STOP TIM11 counter stopped when core is halted +// DBG_TIM10_STOP TIM10 counter stopped when core is halted +// DBG_TIM9_STOP TIM9 counter stopped when core is halted +// DBG_TIM8_STOP TIM8 counter stopped when core is halted +// DBG_TIM1_STOP TIM1 counter stopped when core is halted +// +DbgMCU_APB2_Fz = 0x00000000; + +// <<< end of configuration section >>> \ No newline at end of file diff --git a/MDK-ARM/semi-finished_product_testing.uvoptx b/MDK-ARM/semi-finished_product_testing.uvoptx index e401293..74362a2 100644 --- a/MDK-ARM/semi-finished_product_testing.uvoptx +++ b/MDK-ARM/semi-finished_product_testing.uvoptx @@ -149,6 +149,18 @@ + + + 0 + 1 + current_buff + + + 1 + 1 + ad7124_analog + + 0 diff --git a/MDK-ARM/semi-finished_product_testing.uvprojx b/MDK-ARM/semi-finished_product_testing.uvprojx index 6e67e4a..ca0cf9d 100644 --- a/MDK-ARM/semi-finished_product_testing.uvprojx +++ b/MDK-ARM/semi-finished_product_testing.uvprojx @@ -16,8 +16,8 @@ STM32F407VGTx STMicroelectronics - Keil.STM32F4xx_DFP.2.12.0 - http://www.keil.com/pack + Keil.STM32F4xx_DFP.2.17.1 + https://www.keil.com/pack/ IRAM(0x20000000-0x2001BFFF) IRAM2(0x2001C000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4") TZ