This commit is contained in:
王绪洁 2025-03-11 18:58:20 +08:00
parent 38d45a2b15
commit 4666615d9f
3 changed files with 12 additions and 10 deletions

View File

@ -21,15 +21,6 @@ const uint8_t Interruptnum[] = {
0x40,
0x80,
}; /* SSR寄存器中断号对应值 */
// static uint32_t address = 0x68000000;
// uint32_t data = 0;
// uint32_t data1 = 0;
// for(int i = 0;i < 1024;i++,data++)
// {
// HAL_SRAM_Write_32b(&hsram1,&address ,&data,4);
// HAL_SRAM_Read_32b(&hsram1,&address ,&data1,4);
// address = 4*i;
// }
void ch438_write_reg(uint8_t addr, uint8_t data, uint8_t size)
{

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@ -20,6 +20,16 @@
/* CH438内部串口0~7 专用状态寄存器 */
#define REG_SSR_ADDR 0x4F /* 专用状态寄存器地址 */
/* IER寄存器的位 */
#define BIT_IER_RESET 0x80 /* 该位置为1则复位该串口 */
#define BIT_IER_LOWPOWER 0x40 /* 该位置为1则关闭该串口的内部基准时钟 */
#define BIT_IER_SLP 0x20 /* 串口0是SLP为1则关闭时钟振荡器 */
#define BIT_IER1_CK2X 0x20 /* 串口1-7是CK2X,为1则强制将外部时钟信号2倍频后作为内部基准时钟 */
#define BIT_IER_IEMODEM 0x08 /* 该位为1允许MODEM输入状态变化中断 */
#define BIT_IER_IELINES 0x04 /* 该位为1允许接收线路状态中断 */
#define BIT_IER_IETHRE 0x02 /* 该位为1允许发送保持寄存器空中断 */
#define BIT_IER_IERECV 0x01 /* 该位为1允许接收到数据中断 */
/* IIR寄存器的位 */
#define BIT_IIR_FIFOENS1 0x80

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@ -13,10 +13,11 @@ FREERTOS.Tasks01=lwip_task,0,512,start_lwip_task,Default,NULL,Dynamic,NULL,NULL;
FREERTOS.configENABLE_FPU=1
FREERTOS.configMAX_PRIORITIES=32
FREERTOS.configMAX_TASK_NAME_LEN=24
FSMC.AddressSetupTime1=10
FSMC.DataSetupTime1=10
FSMC.DataSetupTime2=10
FSMC.ExtendedMode1=FSMC_EXTENDED_MODE_DISABLE
FSMC.IPParameters=ExtendedMode1,DataSetupTime2,DataSetupTime1,WriteOperation1,WriteOperation2
FSMC.IPParameters=ExtendedMode1,DataSetupTime2,DataSetupTime1,WriteOperation1,WriteOperation2,AddressSetupTime1
FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
FSMC.WriteOperation2=FSMC_WRITE_OPERATION_ENABLE
File.Version=6