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valve_debugging
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单通道收发测试最大收发数据50字节左右

This commit is contained in:
王绪洁 2025-03-20 08:48:05 +08:00
parent 445152194f
commit 6fc09e9371
8 changed files with 7793 additions and 4058 deletions
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6
Core/Src/freertos.c
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@ -183,9 +183,9 @@ void start_ch438_task(void const *argument)
ch438_init();
for (;;)
{
// uint8_t data[9] = {0xFF, 0xff, 0xff, 0xff, 0xff, 0x34, 0x56, 0x78, 0x9a};
// ch438_send_data(CH438_UART0, data, 9);
// vTaskDelay(10000);
uint8_t data[9] = {0xFF, 0xff, 0xff, 0xff, 0xff, 0x34, 0x56, 0x78, 0x9a};
ch438_send_data(CH438_UART2, data, 9);
vTaskDelay(500);
}
/* USER CODE END start_ch438_task */
}

9
Core/Src/main.c
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@ -167,6 +167,7 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
if (CH438_INT_Pin == GPIO_Pin)
{
ch438_interrupt_handler_ch438_chip_1();
ch438_interrupt_handler_ch438_chip_2();
}
}
/* USER CODE END 4 */
@ -201,10 +202,10 @@ void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
// __disable_irq();
// while (1)
// {
// }
/* USER CODE END Error_Handler_Debug */
}

48
MDK-ARM/DebugConfig/valve_debugging_STM32F407ZGTx.dbgconf Normal file
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@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

3664
MDK-ARM/valve_debugging.uvguix.Administrator Normal file
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File diff suppressed because one or more lines are too long

2
MDK-ARM/valve_debugging.uvoptx
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@ -163,7 +163,7 @@
<Ww>
<count>2</count>
<WinNumber>1</WinNumber>
<ItemText>ch438_uart_data</ItemText>
<ItemText>ch438_uart_data,0x0A</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>

2
MDK-ARM/valve_debugging/ExtDll.iex Normal file
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@ -0,0 +1,2 @@
[EXTDLL]
Count=0

8118
MDK-ARM/valve_debugging/valve_debugging.hex
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File diff suppressed because it is too large Load Diff

2
User/driver/ch438q.h
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@ -128,7 +128,7 @@ typedef enum
typedef struct
{
uint8_t receive_data_buff[256];
uint8_t receive_data_buff[128];
uint8_t receive_data_length;
} ch438_uart_data_t;