274 lines
7.6 KiB
C
274 lines
7.6 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* File Name : FSMC.c
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* @file fsmc.c
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* of the FSMC peripheral.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "fsmc.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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SRAM_HandleTypeDef hsram1;
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SRAM_HandleTypeDef hsram2;
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/* FSMC initialization function */
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void MX_FSMC_Init(void)
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{
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/* USER CODE BEGIN FSMC_Init 0 */
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/* USER CODE END FSMC_Init 0 */
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FSMC_NORSRAM_TimingTypeDef Timing = {0};
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/* USER CODE BEGIN FSMC_Init 1 */
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/* USER CODE END FSMC_Init 1 */
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/** Perform the SRAM1 memory initialization sequence
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*/
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hsram1.Instance = FSMC_NORSRAM_DEVICE;
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hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
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/* hsram1.Init */
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hsram1.Init.NSBank = FSMC_NORSRAM_BANK1;
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hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
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hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
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hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
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hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
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hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
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hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
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hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
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hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
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hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
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hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
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hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
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hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
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hsram1.Init.PageSize = FSMC_PAGE_SIZE_NONE;
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/* Timing */
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Timing.AddressSetupTime = 15;
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Timing.AddressHoldTime = 15;
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Timing.DataSetupTime = 10;
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Timing.BusTurnAroundDuration = 15;
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Timing.CLKDivision = 16;
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Timing.DataLatency = 17;
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Timing.AccessMode = FSMC_ACCESS_MODE_A;
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/* ExtTiming */
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if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
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{
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Error_Handler();
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}
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/** Perform the SRAM2 memory initialization sequence
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*/
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hsram2.Instance = FSMC_NORSRAM_DEVICE;
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hsram2.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
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/* hsram2.Init */
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hsram2.Init.NSBank = FSMC_NORSRAM_BANK2;
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hsram2.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
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hsram2.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
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hsram2.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
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hsram2.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
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hsram2.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
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hsram2.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
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hsram2.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
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hsram2.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
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hsram2.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
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hsram2.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
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hsram2.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
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hsram2.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
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hsram2.Init.PageSize = FSMC_PAGE_SIZE_NONE;
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/* Timing */
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Timing.AddressSetupTime = 15;
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Timing.AddressHoldTime = 15;
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Timing.DataSetupTime = 10;
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Timing.BusTurnAroundDuration = 15;
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Timing.CLKDivision = 16;
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Timing.DataLatency = 17;
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Timing.AccessMode = FSMC_ACCESS_MODE_A;
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/* ExtTiming */
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if (HAL_SRAM_Init(&hsram2, &Timing, NULL) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN FSMC_Init 2 */
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/* USER CODE END FSMC_Init 2 */
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}
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static uint32_t FSMC_Initialized = 0;
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static void HAL_FSMC_MspInit(void)
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{
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/* USER CODE BEGIN FSMC_MspInit 0 */
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/* USER CODE END FSMC_MspInit 0 */
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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if (FSMC_Initialized)
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{
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return;
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}
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FSMC_Initialized = 1;
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/* Peripheral clock enable */
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__HAL_RCC_FSMC_CLK_ENABLE();
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/** FSMC GPIO Configuration
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PF0 ------> FSMC_A0
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PF1 ------> FSMC_A1
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PF2 ------> FSMC_A2
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PF3 ------> FSMC_A3
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PF4 ------> FSMC_A4
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PF5 ------> FSMC_A5
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PF12 ------> FSMC_A6
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PE7 ------> FSMC_D4
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PE8 ------> FSMC_D5
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PE9 ------> FSMC_D6
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PE10 ------> FSMC_D7
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PD14 ------> FSMC_D0
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PD15 ------> FSMC_D1
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PD0 ------> FSMC_D2
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PD1 ------> FSMC_D3
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PD4 ------> FSMC_NOE
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PD5 ------> FSMC_NWE
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PD7 ------> FSMC_NE1
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PG9 ------> FSMC_NE2
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*/
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_12;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
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HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
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HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_14 | GPIO_PIN_15 | GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_7;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_9;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
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HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
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/* USER CODE BEGIN FSMC_MspInit 1 */
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/* USER CODE END FSMC_MspInit 1 */
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}
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void HAL_SRAM_MspInit(SRAM_HandleTypeDef *sramHandle)
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{
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/* USER CODE BEGIN SRAM_MspInit 0 */
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/* USER CODE END SRAM_MspInit 0 */
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HAL_FSMC_MspInit();
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/* USER CODE BEGIN SRAM_MspInit 1 */
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/* USER CODE END SRAM_MspInit 1 */
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}
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static uint32_t FSMC_DeInitialized = 0;
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static void HAL_FSMC_MspDeInit(void)
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{
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/* USER CODE BEGIN FSMC_MspDeInit 0 */
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/* USER CODE END FSMC_MspDeInit 0 */
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if (FSMC_DeInitialized)
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{
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return;
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}
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FSMC_DeInitialized = 1;
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/* Peripheral clock enable */
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__HAL_RCC_FSMC_CLK_DISABLE();
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/** FSMC GPIO Configuration
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PF0 ------> FSMC_A0
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PF1 ------> FSMC_A1
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PF2 ------> FSMC_A2
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PF3 ------> FSMC_A3
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PF4 ------> FSMC_A4
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PF5 ------> FSMC_A5
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PF12 ------> FSMC_A6
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PE7 ------> FSMC_D4
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PE8 ------> FSMC_D5
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PE9 ------> FSMC_D6
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PE10 ------> FSMC_D7
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PD14 ------> FSMC_D0
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PD15 ------> FSMC_D1
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PD0 ------> FSMC_D2
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PD1 ------> FSMC_D3
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PD4 ------> FSMC_NOE
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PD5 ------> FSMC_NWE
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PD7 ------> FSMC_NE1
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PG9 ------> FSMC_NE2
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*/
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HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_12);
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HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10);
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_14 | GPIO_PIN_15 | GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_7);
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HAL_GPIO_DeInit(GPIOG, GPIO_PIN_9);
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/* USER CODE BEGIN FSMC_MspDeInit 1 */
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/* USER CODE END FSMC_MspDeInit 1 */
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}
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void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *sramHandle)
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{
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/* USER CODE BEGIN SRAM_MspDeInit 0 */
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/* USER CODE END SRAM_MspDeInit 0 */
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HAL_FSMC_MspDeInit();
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/* USER CODE BEGIN SRAM_MspDeInit 1 */
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/* USER CODE END SRAM_MspDeInit 1 */
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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