GPS3000暂存
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e0b6462ab6
commit
7d7af4febb
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@ -72,9 +72,9 @@ void PeriphCommonClock_Config(void);
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/* USER CODE END 0 */
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/* USER CODE END 0 */
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/**
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/**
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* @brief The application entry point.
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* @brief The application entry point.
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* @retval int
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* @retval int
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*/
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*/
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int main(void)
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int main(void)
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{
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{
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/* USER CODE BEGIN 1 */
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/* USER CODE BEGIN 1 */
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@ -91,7 +91,7 @@ int main(void)
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NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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/* SysTick_IRQn interrupt configuration */
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/* SysTick_IRQn interrupt configuration */
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NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 15, 0));
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NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),15, 0));
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/* USER CODE BEGIN Init */
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* USER CODE END Init */
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@ -99,7 +99,7 @@ int main(void)
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/* Configure the system clock */
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/* Configure the system clock */
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SystemClock_Config();
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SystemClock_Config();
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/* Configure the peripherals common clocks */
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/* Configure the peripherals common clocks */
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PeriphCommonClock_Config();
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PeriphCommonClock_Config();
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/* USER CODE BEGIN SysInit */
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/* USER CODE BEGIN SysInit */
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@ -147,13 +147,13 @@ int main(void)
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}
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}
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/**
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/**
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* @brief System Clock Configuration
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* @brief System Clock Configuration
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* @retval None
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* @retval None
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*/
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*/
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void SystemClock_Config(void)
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void SystemClock_Config(void)
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{
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{
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
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while (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_0)
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while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_0)
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{
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{
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}
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}
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LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
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LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
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@ -162,23 +162,26 @@ void SystemClock_Config(void)
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}
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}
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LL_RCC_HSE_Enable();
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LL_RCC_HSE_Enable();
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/* Wait till HSE is ready */
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/* Wait till HSE is ready */
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while (LL_RCC_HSE_IsReady() != 1)
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while(LL_RCC_HSE_IsReady() != 1)
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{
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{
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}
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}
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_1, 8, LL_RCC_PLLR_DIV_2);
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_1, 8, LL_RCC_PLLR_DIV_2);
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LL_RCC_PLL_EnableDomain_SYS();
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LL_RCC_PLL_EnableDomain_SYS();
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LL_RCC_PLL_Enable();
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LL_RCC_PLL_Enable();
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/* Wait till PLL is ready */
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/* Wait till PLL is ready */
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while (LL_RCC_PLL_IsReady() != 1)
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while(LL_RCC_PLL_IsReady() != 1)
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{
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{
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}
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}
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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/* Wait till System clock is ready */
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/* Wait till System clock is ready */
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while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
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{
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{
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}
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}
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_8);
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_8);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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@ -190,18 +193,19 @@ void SystemClock_Config(void)
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}
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}
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/**
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/**
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* @brief Peripherals Common Clock Configuration
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* @brief Peripherals Common Clock Configuration
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* @retval None
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* @retval None
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*/
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*/
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void PeriphCommonClock_Config(void)
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void PeriphCommonClock_Config(void)
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{
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{
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LL_RCC_PLLSAI1_ConfigDomain_ADC(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_1, 8, LL_RCC_PLLSAI1R_DIV_2);
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LL_RCC_PLLSAI1_ConfigDomain_ADC(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_1, 8, LL_RCC_PLLSAI1R_DIV_2);
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LL_RCC_PLLSAI1_EnableDomain_ADC();
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LL_RCC_PLLSAI1_EnableDomain_ADC();
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LL_RCC_PLLSAI1_Enable();
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LL_RCC_PLLSAI1_Enable();
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/* Wait till PLLSAI1 is ready */
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/* Wait till PLLSAI1 is ready */
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while (LL_RCC_PLLSAI1_IsReady() != 1)
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while(LL_RCC_PLLSAI1_IsReady() != 1)
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{
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{
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}
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}
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}
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}
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@ -210,9 +214,9 @@ void PeriphCommonClock_Config(void)
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/* USER CODE END 4 */
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/* USER CODE END 4 */
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/**
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/**
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* @brief This function is executed in case of error occurrence.
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* @brief This function is executed in case of error occurrence.
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* @retval None
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* @retval None
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*/
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*/
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void Error_Handler(void)
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void Error_Handler(void)
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{
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{
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/* USER CODE BEGIN Error_Handler_Debug */
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/* USER CODE BEGIN Error_Handler_Debug */
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@ -224,14 +228,14 @@ void Error_Handler(void)
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/* USER CODE END Error_Handler_Debug */
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/* USER CODE END Error_Handler_Debug */
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}
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}
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#ifdef USE_FULL_ASSERT
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#ifdef USE_FULL_ASSERT
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/**
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/**
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* @brief Reports the name of the source file and the source line number
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @param line: assert_param error line source number
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* @retval None
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* @retval None
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*/
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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void assert_failed(uint8_t *file, uint32_t line)
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{
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{
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/* USER CODE BEGIN 6 */
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/* USER CODE BEGIN 6 */
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@ -186,7 +186,7 @@ void MX_TIM7_Init(void)
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/* USER CODE END TIM7_Init 1 */
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/* USER CODE END TIM7_Init 1 */
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TIM_InitStruct.Prescaler = 399;
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TIM_InitStruct.Prescaler = 399;
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TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
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TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
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TIM_InitStruct.Autoreload = 99;
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TIM_InitStruct.Autoreload = 499;
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LL_TIM_Init(TIM7, &TIM_InitStruct);
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LL_TIM_Init(TIM7, &TIM_InitStruct);
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LL_TIM_EnableARRPreload(TIM7);
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LL_TIM_EnableARRPreload(TIM7);
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LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_RESET);
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LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_RESET);
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@ -1500,6 +1500,14 @@
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</File>
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</File>
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</Group>
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</Group>
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<Group>
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<GroupName>::CMSIS</GroupName>
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<tvExp>0</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<cbSel>0</cbSel>
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<RteFlg>1</RteFlg>
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</Group>
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<Group>
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<Group>
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<GroupName>Middlewares/Library/DSP Library/DSP Library</GroupName>
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<GroupName>Middlewares/Library/DSP Library/DSP Library</GroupName>
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<tvExp>0</tvExp>
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<tvExp>0</tvExp>
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@ -1507,7 +1515,7 @@
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<cbSel>0</cbSel>
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<cbSel>0</cbSel>
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<RteFlg>0</RteFlg>
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<RteFlg>0</RteFlg>
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<File>
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<File>
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<GroupNumber>16</GroupNumber>
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<GroupNumber>17</GroupNumber>
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<FileNumber>91</FileNumber>
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<FileNumber>91</FileNumber>
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<FileType>4</FileType>
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<FileType>4</FileType>
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<tvExp>0</tvExp>
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<tvExp>0</tvExp>
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@ -1520,12 +1528,4 @@
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</File>
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</File>
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</Group>
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</Group>
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<Group>
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<GroupName>::CMSIS</GroupName>
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<tvExp>0</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<cbSel>0</cbSel>
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<RteFlg>1</RteFlg>
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</Group>
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</ProjectOpt>
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</ProjectOpt>
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@ -83,7 +83,7 @@
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<RunUserProg1>1</RunUserProg1>
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<RunUserProg1>1</RunUserProg1>
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<RunUserProg2>1</RunUserProg2>
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<RunUserProg2>1</RunUserProg2>
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<UserProg1Name>fromelf --bin --output=@L.bin !L</UserProg1Name>
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<UserProg1Name>fromelf --bin --output=@L.bin !L</UserProg1Name>
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<UserProg2Name>output-controller-v24.bat</UserProg2Name>
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<UserProg2Name></UserProg2Name>
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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<nStopA1X>0</nStopA1X>
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<nStopA1X>0</nStopA1X>
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@ -1278,6 +1278,9 @@
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</File>
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</File>
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</Files>
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</Files>
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</Group>
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</Group>
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<Group>
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<GroupName>::CMSIS</GroupName>
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</Group>
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<Group>
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<Group>
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<GroupName>Middlewares/Library/DSP Library/DSP Library</GroupName>
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<GroupName>Middlewares/Library/DSP Library/DSP Library</GroupName>
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<GroupOption>
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<GroupOption>
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@ -1376,9 +1379,6 @@
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</File>
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</File>
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</Files>
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</Files>
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</Group>
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</Group>
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<Group>
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<GroupName>::CMSIS</GroupName>
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</Group>
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</Groups>
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</Groups>
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</Target>
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</Target>
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</Targets>
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</Targets>
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@ -295,6 +295,7 @@ void mode_init(void)
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break;
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break;
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case MODE_FREQUENCY_DOMAIN_CONTROL_ALGORITHM:
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case MODE_FREQUENCY_DOMAIN_CONTROL_ALGORITHM:
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pdctrl_init(PDCTRL_PWMP);
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pdctrl_init(PDCTRL_PWMP);
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//pdctrl_init(PDCTRL_DAC);
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mode_pwmp_hd_init(&mode_get()->interface_req, mode_get()->positioner_model, &mode_params.mode_pwmp_hd_params,
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mode_pwmp_hd_init(&mode_get()->interface_req, mode_get()->positioner_model, &mode_params.mode_pwmp_hd_params,
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mode_params_save_cb);
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mode_params_save_cb);
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break;
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break;
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@ -267,8 +267,8 @@ Mcu.ThirdParty0=STMicroelectronics.X-CUBE-ALGOBUILD.1.3.0
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Mcu.ThirdPartyNb=1
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Mcu.ThirdPartyNb=1
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Mcu.UserConstants=
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Mcu.UserConstants=
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Mcu.UserName=STM32L476VGTx
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Mcu.UserName=STM32L476VGTx
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MxCube.Version=6.9.2
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MxCube.Version=6.10.0
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MxDb.Version=DB.6.0.92
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MxDb.Version=DB.6.0.100
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NVIC.ADC1_2_IRQn=true\:14\:0\:true\:false\:true\:true\:true\:true
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NVIC.ADC1_2_IRQn=true\:14\:0\:true\:false\:true\:true\:true\:true
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.DMA1_Channel1_IRQn=true\:14\:0\:true\:false\:true\:false\:true\:true
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NVIC.DMA1_Channel1_IRQn=true\:14\:0\:true\:false\:true\:false\:true\:true
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@ -710,7 +710,7 @@ TIM6.Period=99
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TIM6.Prescaler=399
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TIM6.Prescaler=399
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TIM7.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE
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TIM7.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE
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TIM7.IPParameters=Prescaler,Period,AutoReloadPreload
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TIM7.IPParameters=Prescaler,Period,AutoReloadPreload
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TIM7.Period=99
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TIM7.Period=499
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TIM7.Prescaler=399
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TIM7.Prescaler=399
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UART5.BaudRate=9600
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UART5.BaudRate=9600
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UART5.IPParameters=BaudRate
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UART5.IPParameters=BaudRate
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