1726 lines
60 KiB
C
1726 lines
60 KiB
C
/**
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* @file flash.h
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* @author xxx
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* @date 2024-02-07 11:49:34
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* @brief
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* @copyright Copyright (c) 2024 by xxx, All Rights Reserved.
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* @attention
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*
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* ST 的官方驱动 LL 库并没有 flash 驱动。这里自己实现。
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*
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* 1. 由于在 stm32l4xx_ll_system.h 中存在部分 FLASH 操作函数（ACR寄存器的处理）且不全面
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* 因此这里需要额外处理（重命名）
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*
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* 2. Main memory
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* （1） FLASH_ACR 完成
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* （2） FLASH_PDKEYR 完成
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* （3） FLASH_KEYR 完成
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* （4） FLASH_OPTKEYR 完成
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* （5） FLASH_SR 完成
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* （6） FLASH_CR 完成
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* （7） FLASH_ECCR 完成
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* （8） FLASH_OPTR 未完成
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* （9） FLASH_PCROP1SR 未完成
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* 后续寄存器 均未完成
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* 3. Information block
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* - System memory
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* - OTP area
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* - Option bytes
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* 4. 根据 HAL 库的实现，相比于与手册的推荐流程，擦写的执行序列还有其他操作。
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L4xx_LL_FLASH_H
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#define __STM32L4xx_LL_FLASH_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx.h"
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/** @addtogroup STM32L4xx_LL_Driver
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* @{
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*/
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/** @defgroup FLASH_LL FLASH
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup FLASH_LL_Private_Constants FLASH Private Constants
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* @{
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*/
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/* The following values must be written consecutively to unlock the FLASH_OPTR
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register allowing option byte programming/erasing operations */
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#define LL_FLASH_OPT_KEY1 ((uint32_t)0x08192A3B)
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#define LL_FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7F)
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/* The following values must be written consecutively to unlock the FLASH_CR
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register allowing flash programming/erasing operations */
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#define LL_FLASH_KEY1 ((uint32_t)0x45670123)
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#define LL_FLASH_KEY2 ((uint32_t)0xCDEF89AB)
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/* The following values must be written consecutively to unlock the RUN_PD bit in
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FLASH_ACR */
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#define LL_FLASH_PDKEY1 ((uint32_t)0x04152637)
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#define LL_FLASH_PDKEY2 ((uint32_t)0xFAFBFCFD)
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/* Page size */
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#define LL_FLASH_PAGE_SIZE (2 * 1024)
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup FLASH_LL_Private_Macros FLASH Private Macros
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* @{
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*/
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/**
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* @}
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup FLASH_LL_ES_INIT FLASH Exported structures
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* @{
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*/
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup FLASH_LL_Exported_Constants FLASH Exported Constants
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* @{
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*/
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/** @defgroup FLASH_LL_EC_BANK bank
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* @{
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*/
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#define LL_FLASH_BANK1 0 /*!< bank 1 */
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#define LL_FLASH_BANK2 1 /*!< bank 2 */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_ALIGNMENT alignment
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* @{
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*/
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#define LL_FLASH_ALIGNMENT_MIN_SIZE 8 /*!< the min alignment size */
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#define LL_FLASH_ROW_SIZE 32 /* row (32 double word) */
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#define LL_FLASH_BANK1_PAGE_NUM 256 /* */
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#define LL_FLASH_BANK2_PAGE_NUM 256 /* */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_GET_FLAG Get Flags Defines
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* @brief Flags defines which can be used with LL_FLASH_ReadReg function.
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* @{
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*/
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#define LL_FLASH_SR_BSY FLASH_SR_BSY /*!< Busy flag */
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#define LL_FLASH_SR_OPTVERR FLASH_SR_OPTVERR /*!< Option validity error flag */
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#define LL_FLASH_SR_RDERR FLASH_SR_RDERR /*!< PCROP read error flag */
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#define LL_FLASH_SR_FASTERR FLASH_SR_FASTERR /*!< Fast programming error flag */
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#define LL_FLASH_SR_MISERR FLASH_SR_MISERR /*!< Fast programming data miss error flag */
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#define LL_FLASH_SR_PGSERR FLASH_SR_PGSERR /*!< Programming sequence error flag */
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#define LL_FLASH_SR_SIZERR FLASH_SR_SIZERR /*!< Size error flag */
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#define LL_FLASH_SR_PGAERR FLASH_SR_PGAERR /*!< Programming alignment error flag */
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#define LL_FLASH_SR_WRPERR FLASH_SR_WRPERR /*!< Write protection error flag */
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#define LL_FLASH_SR_PROGERR FLASH_SR_PROGERR /*!< Programming error flag */
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#define LL_FLASH_SR_OPERR FLASH_SR_OPERR /*!< Operation error flag */
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#define LL_FLASH_SR_EOP FLASH_SR_EOP /*!< End of operation flag */
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/* */
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#define LL_FLASH_ECCR_DETECTION FLASH_ECCR_ECCD /*!< ECC detection */
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#define LL_FLASH_ECCR_CORRECTION FLASH_ECCR_ECCC /*!< ECC correction */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_IT IT Defines
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* @brief IT defines which can be used with LL_FLASH_ReadReg and LL_FLASH_WriteReg functions
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* @{
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*/
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#define LL_FLASH_CR_RDERRIE FLASH_CR_RDERRIE /*!< PCROP read error interrupt enable */
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#define LL_FLASH_CR_ERRIE FLASH_CR_ERRIE /*!< Error interrupt enable */
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#define LL_FLASH_CR_EOPIE FLASH_CR_EOPIE /*!< End of operation interrupt enable */
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#define LL_FLASH_CR_ECCIE FLASH_ECCR_ECCIE /*!< ECC correction interrupt enable */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_Latency Flash Latency
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* @{
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*/
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#define LL_FLASH_LATENCY_0WS FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
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#define LL_FLASH_LATENCY_1WS FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
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#define LL_FLASH_LATENCY_2WS FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
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#define LL_FLASH_LATENCY_3WS FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
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#define LL_FLASH_LATENCY_4WS FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_PREFETCH Prefetch
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* @{
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*/
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#define LL_FLASH_PREFETCH_DISABLE 0x00000000U /*!< Prefetch disabled */
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#define LL_FLASH_PREFETCH_ENABLE FLASH_ACR_PRFTEN /*!< Prefetch enabled */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_INSTRUCTION_CACHE Instruction cache
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* @{
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*/
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#define LL_FLASH_INSTRUCTION_CACHE_DISABLE 0x00000000U /*!< Instruction cache disabled */
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#define LL_FLASH_INSTRUCTION_CACHE_ENABLE FLASH_ACR_ICEN /*!< Instruction cache enabled */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_DATA_CACHE data cache
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* @{
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*/
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#define LL_FLASH_DATA_CACHE_DISABLE 0x00000000U /*!< data cache disabled */
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#define LL_FLASH_DATA_CACHE_ENABLE FLASH_ACR_DCEN /*!< data cache enabled */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_RUN_PD_MODE Flash Power-down mode during Run or Low-power run mode
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* @{
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*/
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#define LL_FLASH_RUN_PD_MODE_IDLE 0x00000000U /*!< Flash in Idle mode */
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#define LL_FLASH_RUN_PD_MODE_PD FLASH_ACR_RUN_PD /*!< Flash in Power-down mode */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_SLEEP_PD_MODE Flash Power-down mode during Sleep or Low-power sleep mode
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* @{
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*/
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#define LL_FLASH_SLEEP_PD_MODE_IDLE 0x00000000U /*!< Flash in Idle mode during Sleep and Low-power sleep modes */
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#define LL_FLASH_SLEEP_PD_MODE_PD FLASH_ACR_SLEEP_PD /*!< Flash in Power-down mode during Sleep and Low-power sleep modes */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_PG Programming
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* @{
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*/
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#define LL_FLASH_PROGRAMMING_DISABLE 0x00000000U /*!< Flash programming disabled */
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#define LL_FLASH_PROGRAMMING_ENABLE FLASH_CR_PG /*!< Flash programming enabled */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_PER Programming
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* @{
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*/
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#define LL_FLASH_PAGE_ERASE_DISABLE 0x00000000U /*!< page erase disabled */
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#define LL_FLASH_PAGE_ERASE_ENABLE FLASH_CR_PER /*!< page erase enabled */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_EC_OBL_LAUNCH Force the option byte loading
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* @{
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*/
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#define LL_FLASH_OB_LAUNCH_COMPLETE 0x00000000U /*!< Option byte loading complete */
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#define LL_FLASH_OB_LAUNCH_REQUESTED FLASH_CR_OBL_LAUNCH /*!< Option byte loading requested */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_Read_Protection FLASH Option Bytes Read Protection
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* @{
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*/
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#define LL_FLASH_OB_RDP_LEVEL_0 ((uint32_t)0xAA)
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#define LL_FLASH_OB_RDP_LEVEL_1 ((uint32_t)0xBB)
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#define LL_FLASH_OB_RDP_LEVEL_2 ((uint32_t)0xCC) /*!< Warning: When enabling read protection level 2 it's no more possible to go back to level 1 or 0 */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_BOR_LEVEL FLASH Option Bytes BOR Level
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* @{
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*/
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#define LL_FLASH_OB_BOR_LEVEL_0 ((uint32_t)FLASH_OPTR_BOR_LEV_0) /*!< Reset level threshold is around 1.7V */
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#define LL_FLASH_OB_BOR_LEVEL_1 ((uint32_t)FLASH_OPTR_BOR_LEV_1) /*!< Reset level threshold is around 2.0V */
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#define LL_FLASH_OB_BOR_LEVEL_2 ((uint32_t)FLASH_OPTR_BOR_LEV_2) /*!< Reset level threshold is around 2.2V */
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#define LL_FLASH_OB_BOR_LEVEL_3 ((uint32_t)FLASH_OPTR_BOR_LEV_3) /*!< Reset level threshold is around 2.5V */
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#define LL_FLASH_OB_BOR_LEVEL_4 ((uint32_t)FLASH_OPTR_BOR_LEV_4) /*!< Reset level threshold is around 2.8V */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_nRST_STOP FLASH Option Bytes Reset On Stop
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* @{
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*/
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#define LL_FLASH_OB_STOP_RST ((uint32_t)0x0000) /*!< Reset generated when entering the stop mode */
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#define LL_FLASH_OB_STOP_NORST ((uint32_t)FLASH_OPTR_nRST_STOP) /*!< No reset generated when entering the stop mode */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_nRST_STANDBY FLASH Option Bytes Reset On Standby
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* @{
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*/
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#define LL_FLASH_OB_STANDBY_RST ((uint32_t)0x0000) /*!< Reset generated when entering the standby mode */
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#define LL_FLASH_OB_STANDBY_NORST ((uint32_t)FLASH_OPTR_nRST_STDBY) /*!< No reset generated when entering the standby mode */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_nRST_SHUTDOWN FLASH Option Bytes Reset On Shutdown
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* @{
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*/
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#define LL_FLASH_OB_SHUTDOWN_RST ((uint32_t)0x0000) /*!< Reset generated when entering the shutdown mode */
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#define LL_FLASH_OB_SHUTDOWN_NORST ((uint32_t)FLASH_OPTR_nRST_SHDW) /*!< No reset generated when entering the shutdown mode */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_IWDG_SW FLASH Option Bytes IWDG Type
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* @{
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*/
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#define LL_FLASH_OB_IWDG_HW ((uint32_t)0x00000) /*!< Hardware independent watchdog */
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#define LL_FLASH_OB_IWDG_SW ((uint32_t)FLASH_OPTR_IWDG_SW) /*!< Software independent watchdog */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_IWDG_STOP FLASH Option Bytes IWDG Mode On Stop
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* @{
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*/
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#define LL_FLASH_OB_IWDG_STOP_FREEZE ((uint32_t)0x00000) /*!< Independent watchdog counter is frozen in Stop mode */
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#define LL_FLASH_OB_IWDG_STOP_RUN ((uint32_t)FLASH_OPTR_IWDG_STOP) /*!< Independent watchdog counter is running in Stop mode */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_IWDG_STANDBY FLASH Option Bytes IWDG Mode On Standby
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* @{
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*/
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#define LL_FLASH_OB_IWDG_STDBY_FREEZE ((uint32_t)0x00000) /*!< Independent watchdog counter is frozen in Standby mode */
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#define LL_FLASH_OB_IWDG_STDBY_RUN ((uint32_t)FLASH_OPTR_IWDG_STDBY) /*!< Independent watchdog counter is running in Standby mode */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_WWDG_SW FLASH Option Bytes WWDG Type
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* @{
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*/
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#define LL_FLASH_OB_WWDG_HW ((uint32_t)0x00000) /*!< Hardware window watchdog */
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#define LL_FLASH_OB_WWDG_SW ((uint32_t)FLASH_OPTR_WWDG_SW) /*!< Software window watchdog */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_BFB2 FLASH Option Bytes BFB2 Mode
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* @{
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*/
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#define LL_FLASH_OB_BFB2_DISABLE ((uint32_t)0x000000) /*!< Dual-bank boot disable */
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#define LL_FLASH_OB_BFB2_ENABLE ((uint32_t)FLASH_OPTR_BFB2) /*!< Dual-bank boot enable */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_DUALBANK FLASH Option Bytes Dual-bank Type
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* @{
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*/
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#define LL_FLASH_OB_DUALBANK_SINGLE ((uint32_t)0x000000) /*!< 256 KB/512 KB Single-bank Flash */
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#define LL_FLASH_OB_DUALBANK_DUAL ((uint32_t)FLASH_OPTR_DUALBANK) /*!< 256 KB/512 KB Dual-bank Flash */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_nBOOT1 FLASH Option Bytes User BOOT1 Type
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* @{
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*/
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#define LL_FLASH_OB_BOOT1_SRAM ((uint32_t)0x000000) /*!< Embedded SRAM1 is selected as boot space (if BOOT0=1) */
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#define LL_FLASH_OB_BOOT1_SYSTEM ((uint32_t)FLASH_OPTR_nBOOT1) /*!< System memory is selected as boot space (if BOOT0=1) */
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/**
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* @}
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*/
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/** @defgroup FLASH_LL_OB_SRAM2_PE FLASH Option Bytes User SRAM2 Parity Check Type
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* @{
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*/
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#define LL_FLASH_OB_SRAM2_PARITY_ENABLE ((uint32_t)0x0000000) /*!< SRAM2 parity check enable */
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#define LL_FLASH_OB_SRAM2_PARITY_DISABLE ((uint32_t)FLASH_OPTR_SRAM2_PE) /*!< SRAM2 parity check disable */
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/**
|
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* @}
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*/
|
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/** @defgroup FLASH_LL_OB_SRAM2_RST FLASH Option Bytes User SRAM2 Erase On Reset Type
|
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* @{
|
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*/
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#define LL_FLASH_OB_SRAM2_RST_ERASE ((uint32_t)0x0000000) /*!< SRAM2 erased when a system reset occurs */
|
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#define LL_FLASH_OB_SRAM2_RST_NOT_ERASE ((uint32_t)FLASH_OPTR_SRAM2_RST) /*!< SRAM2 is not erased when a system reset occurs */
|
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/**
|
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* @}
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*/
|
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/** @defgroup FLASH_LL_OB_nSWBOOT0 FLASH Option Bytes User Software BOOT0
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* @{
|
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*/
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#define LL_FLASH_OB_BOOT0_FROM_OB ((uint32_t)0x0000000) /*!< BOOT0 taken from the option bit nBOOT0 */
|
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#define LL_FLASH_OB_BOOT0_FROM_PIN ((uint32_t)FLASH_OPTR_nSWBOOT0) /*!< BOOT0 taken from PH3/BOOT0 pin */
|
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/**
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* @}
|
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*/
|
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/** @defgroup FLASH_LL_OB_nBOOT0 FLASH Option Bytes User nBOOT0 option bit
|
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* @{
|
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*/
|
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#define LL_FLASH_OB_BOOT0_RESET ((uint32_t)0x0000000) /*!< nBOOT0 = 0 */
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#define LL_FLASH_OB_BOOT0_SET ((uint32_t)FLASH_OPTR_nBOOT0) /*!< nBOOT0 = 1 */
|
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/**
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* @}
|
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*/
|
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|
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/**
|
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* @}
|
||
*/
|
||
|
||
/* Exported macro ------------------------------------------------------------*/
|
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/** @defgroup CRS_LL_EM_WRITE_READ Common Write and read registers Macros
|
||
* @{
|
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*/
|
||
|
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/**
|
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* @brief Write a value in FLASH register
|
||
* @param __INSTANCE__ FLASH Instance
|
||
* @param __REG__ Register to be written
|
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* @param __VALUE__ Value to be written in the register
|
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* @retval None
|
||
*/
|
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#define LL_FLASH_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
|
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|
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/**
|
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* @brief Read a value in FLASH register
|
||
* @param __INSTANCE__ FLASH Instance
|
||
* @param __REG__ Register to be read
|
||
* @retval Register value
|
||
*/
|
||
#define LL_FLASH_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
/* Exported functions --------------------------------------------------------*/
|
||
/** @defgroup FLASH_LL_Exported_Functions FLASH Exported Functions
|
||
* @{
|
||
*/
|
||
|
||
/** @defgroup FLASH_LL_EF_Configuration Configuration
|
||
* @{
|
||
*/
|
||
/**
|
||
* @brief Sets the code latency value
|
||
* @note When changing the CPU frequency, the following software sequences must be applied in
|
||
* order to tune the number of wait states needed to access the Flash memory
|
||
* @rmtoll ACR LATENCY LL_FLASH_SetLatency
|
||
* @param FLASHx Flash instance
|
||
* @param FLASH_Latency This parameter can be one of the following values:
|
||
* @arg @ref LL_FLASH_LATENCY_0WS
|
||
* @arg @ref LL_FLASH_LATENCY_1WS
|
||
* @arg @ref LL_FLASH_LATENCY_2WS
|
||
* @arg @ref LL_FLASH_LATENCY_3WS
|
||
* @arg @ref LL_FLASH_LATENCY_4WS
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ZCS_SetLatency(FLASH_TypeDef *FLASHx, uint32_t FLASH_Latency)
|
||
{
|
||
MODIFY_REG(FLASHx->ACR, FLASH_ACR_LATENCY, FLASH_Latency);
|
||
}
|
||
|
||
/**
|
||
* @brief Sets the code latency value
|
||
* @rmtoll ACR LATENCY LL_FLASH_GetLatency
|
||
* @param FLASHx Flash instance
|
||
* @retval Returned value can be one of the following values:
|
||
* @arg @ref LL_FLASH_LATENCY_0WS
|
||
* @arg @ref LL_FLASH_LATENCY_1WS
|
||
* @arg @ref LL_FLASH_LATENCY_2WS
|
||
* @arg @ref LL_FLASH_LATENCY_3WS
|
||
* @arg @ref LL_FLASH_LATENCY_4WS
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_ZCS_GetLatency(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)(READ_BIT(FLASHx->ACR, FLASH_ACR_LATENCY));
|
||
}
|
||
|
||
/**
|
||
* @brief Enable FLASH Prefetch
|
||
* @rmtoll ACR PRFTEN LL_FLASH_EnablePrefetch
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ZCS_EnablePrefetch(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->ACR, FLASH_ACR_PRFTEN);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable FLASH Prefetch
|
||
* @rmtoll ACR PRFTEN LL_FLASH_DisablePrefetch
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ZCS_DisablePrefetch(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->ACR, FLASH_ACR_PRFTEN);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the FLASH Prefetch is enabled.
|
||
* @rmtoll ACR PRFTEN LL_FLASH_IsEnabledPrefetch
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledPrefetch(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->ACR, FLASH_ACR_PRFTEN) == (FLASH_ACR_PRFTEN)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable FLASH Instruction cache
|
||
* @rmtoll ACR ICEN LL_FLASH_EnableInstructionCache
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableInstructionCache(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->ACR, FLASH_ACR_ICEN);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable FLASH Instruction cache
|
||
* @rmtoll ACR ICEN LL_FLASH_DisableInstructionCache
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableInstructionCache(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->ACR, FLASH_ACR_ICEN);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the FLASH Instruction cache is enabled.
|
||
* @rmtoll ACR ICEN LL_FLASH_IsEnabledInstructionCache
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledInstructionCache(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->ACR, FLASH_ACR_ICEN) == (FLASH_ACR_ICEN)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable FLASH data cache
|
||
* @rmtoll ACR DCEN LL_FLASH_EnableDataCache
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ZCS_EnableDataCache(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->ACR, FLASH_ACR_DCEN);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable FLASH data cache
|
||
* @rmtoll ACR DCEN LL_FLASH_DisableDataCache
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ZCS_DisableDataCache(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->ACR, FLASH_ACR_DCEN);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the FLASH data cache is enabled.
|
||
* @rmtoll ACR DCEN LL_FLASH_IsEnabledDataCache
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledDataCache(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->ACR, FLASH_ACR_DCEN) == (FLASH_ACR_DCEN)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Reset FLASH Instruction cache
|
||
* @note This bit can be written only when the instruction cache is disabled.
|
||
* @rmtoll ACR ICRST LL_FLASH_InstructionCacheReset
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_InstructionCacheReset(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->ACR, FLASH_ACR_ICRST);
|
||
CLEAR_BIT(FLASHx->ACR, FLASH_ACR_ICRST);
|
||
}
|
||
|
||
/**
|
||
* @brief Reset FLASH data cache
|
||
* @note This bit can be written only when the data cache is disabled.
|
||
* @rmtoll ACR DCRST LL_FLASH_DataCacheReset
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DataCacheReset(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->ACR, FLASH_ACR_DCRST);
|
||
CLEAR_BIT(FLASHx->ACR, FLASH_ACR_DCRST);
|
||
}
|
||
|
||
/**
|
||
* @brief Set Flash Power-down mode during Run or Low-power run mode
|
||
* @note This bit is write-protected with FLASH_PDKEYR. Call LL_FLASH_UnlockRunPowerDownMode before using this api
|
||
* @note The flash memory can be put in power-down mode only when the code is executed from RAM.
|
||
* @note The Flash must not be accessed when RUN_PD is set.
|
||
* @note he flash must not be put in power-down while a program or an erase operation is on-going.
|
||
* @rmtoll ACR RUN_PD LL_FLASH_SetRunPowerDownMode
|
||
* @param FLASHx FLASH Instance
|
||
* @param Mode This parameter can be one of the following values:
|
||
* @arg @ref LL_FLASH_RUN_PD_MODE_IDLE
|
||
* @arg @ref LL_FLASH_RUN_PD_MODE_PD
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_SetRunPowerDownMode(FLASH_TypeDef *FLASHx, uint32_t Mode)
|
||
{
|
||
MODIFY_REG(FLASHx->ACR, FLASH_ACR_RUN_PD, Mode);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Flash Power-down mode during Run or Low-power run mode
|
||
* @note This bit is write-protected with FLASH_PDKEYR. Call LL_FLASH_UnlockRunPowerDownMode before using this api
|
||
* @note The flash memory can be put in power-down mode only when the code is executed from RAM.
|
||
* @note The Flash must not be accessed when RUN_PD is set.
|
||
* @note he flash must not be put in power-down while a program or an erase operation is on-going.
|
||
* @rmtoll ACR RUN_PD LL_FLASH_GetRunPowerDownMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval Returned value can be one of the following values:
|
||
* @arg @ref LL_FLASH_RUN_PD_MODE_IDLE
|
||
* @arg @ref LL_FLASH_RUN_PD_MODE_PD
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_GetRunPowerDownMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)(READ_BIT(FLASHx->ACR, FLASH_ACR_RUN_PD));
|
||
}
|
||
|
||
/**
|
||
* @brief Set Flash Power-down mode during Sleep or Low-power sleep mode
|
||
* @note The flash must not be put in power-down while a program or an erase operation is on-going.
|
||
* @rmtoll ACR SLEEP_PD LL_FLASH_SetSleepPowerDownMode
|
||
* @param FLASHx FLASH Instance
|
||
* @param Mode This parameter can be one of the following values:
|
||
* @arg @ref LL_FLASH_SLEEP_PD_MODE_IDLE
|
||
* @arg @ref LL_FLASH_SLEEP_PD_MODE_PD
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_SetSleepPowerDownMode(FLASH_TypeDef *FLASHx, uint32_t Mode)
|
||
{
|
||
MODIFY_REG(FLASHx->ACR, FLASH_ACR_SLEEP_PD, Mode);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Flash Power-down mode during Sleep or Low-power sleep mode
|
||
* @rmtoll ACR SLEEP_PD LL_FLASH_SetSleepPowerDownMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval Returned value can be one of the following values:
|
||
* @arg @ref LL_FLASH_SLEEP_PD_MODE_IDLE
|
||
* @arg @ref LL_FLASH_SLEEP_PD_MODE_PD
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_GetSleepPowerDownMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)(READ_BIT(FLASHx->ACR, FLASH_ACR_SLEEP_PD));
|
||
}
|
||
|
||
/**
|
||
* @brief Unlock Power-down in Run mode
|
||
* @rmtoll PDKEYR LL_FLASH_SetSleepPowerDownMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_UnlockRunPowerDownMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
WRITE_REG(FLASHx->PDKEYR, LL_FLASH_PDKEY1);
|
||
WRITE_REG(FLASHx->PDKEYR, LL_FLASH_PDKEY2);
|
||
}
|
||
|
||
/**
|
||
* @brief Sets Read protection level
|
||
* @rmtoll OPTR RDP LL_FLASH_SetReaProtectionLevel
|
||
* @param FLASHx Flash instance
|
||
* @param FLASH_Latency This parameter can be one of the following values:
|
||
* @arg @ref LL_FLASH_OB_RDP_LEVEL_0
|
||
* @arg @ref LL_FLASH_OB_RDP_LEVEL_1
|
||
* @arg @ref LL_FLASH_OB_RDP_LEVEL_2
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_SetReaProtectionLevel(FLASH_TypeDef *FLASHx, uint32_t Level)
|
||
{
|
||
MODIFY_REG(FLASHx->ACR, FLASH_OPTR_RDP, Level);
|
||
}
|
||
|
||
/**
|
||
* @brief Sets Read protection level
|
||
* @rmtoll OPTR RDP LL_FLASH_GetReaProtectionLevel
|
||
* @param FLASHx Flash instance
|
||
* @retval Returned value can be one of the following values:
|
||
* @arg @ref LL_FLASH_OB_RDP_LEVEL_0
|
||
* @arg @ref LL_FLASH_OB_RDP_LEVEL_1
|
||
* @arg @ref LL_FLASH_OB_RDP_LEVEL_2
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_GetReaProtectionLevel(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)(READ_BIT(FLASHx->OPTR, FLASH_OPTR_RDP) >> FLASH_OPTR_RDP_Pos);
|
||
}
|
||
|
||
/**
|
||
* @brief Sets BOR level
|
||
* @rmtoll OPTR BOR_LEV LL_FLASH_SetBORLevel
|
||
* @param FLASHx Flash instance
|
||
* @param FLASH_Latency This parameter can be one of the following values:
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_0
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_1
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_2
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_3
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_4
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_SetBORLevel(FLASH_TypeDef *FLASHx, uint32_t Level)
|
||
{
|
||
MODIFY_REG(FLASHx->OPTR, FLASH_OPTR_BOR_LEV, Level);
|
||
}
|
||
|
||
/**
|
||
* @brief Sets BOR level
|
||
* @rmtoll OPTR BOR_LEV LL_FLASH_GetBORLevel
|
||
* @param FLASHx Flash instance
|
||
* @retval Returned value can be one of the following values:
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_0
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_1
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_2
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_3
|
||
* @arg @ref LL_FLASH_OB_BOR_LEVEL_4
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_GetBORLevel(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)(READ_BIT(FLASHx->OPTR, FLASH_OPTR_BOR_LEV) >> FLASH_OPTR_BOR_LEV_Pos);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable Reset generated when entering the Stop mode
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_EnableResetStopMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableResetStopMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_STOP);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable Reset generated when entering the Stop mode
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_DisableResetStopMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableResetStopMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_STOP);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether Reset generated when entering the Stop mode is enabled.
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_IsEnabledResetStopMode
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledResetStopMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_STOP) == (FLASH_OPTR_nRST_STOP)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable Reset generated when entering the Standby mode
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_EnableResetStandbyMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableResetStandbyMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_STDBY);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable Reset generated when entering the Standby mode
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_DisableResetStandbyMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableResetStandbyMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_STDBY);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether Reset generated when entering the Standby mode is enabled.
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_IsEnabledResetStandbyMode
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledResetStandbyMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_STDBY) == (FLASH_OPTR_nRST_STDBY)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable Reset generated when entering the Shutdown mode
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_EnableResetShutdownMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableResetShutdownMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_SHDW);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable Reset generated when entering the Shutdown mode
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_DisableResetShutdownMode
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableResetShutdownMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_SHDW);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether Reset generated when entering the Shutdown mode is enabled.
|
||
* @rmtoll OPTR nRST_STOP LL_FLASH_IsEnabledResetShutdownMode
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledResetShutdownMode(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->OPTR, FLASH_OPTR_nRST_SHDW) == (FLASH_OPTR_nRST_SHDW)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
/** @defgroup FLASH_LL_EF_Programming Programming
|
||
* @{
|
||
*/
|
||
/**
|
||
* @brief Unlocks the FLASH control register access
|
||
* @param FLASHx Flash instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_Unlock(FLASH_TypeDef *FLASHx)
|
||
{
|
||
WRITE_REG(FLASHx->KEYR, LL_FLASH_KEY1);
|
||
WRITE_REG(FLASHx->KEYR, LL_FLASH_KEY2);
|
||
}
|
||
|
||
/**
|
||
* @brief Locks the FLASH control register access
|
||
* @rmtoll CR LOCK LL_FLASH_Lock
|
||
* @param FLASHx Flash instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_Lock(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_LOCK);
|
||
}
|
||
|
||
/**
|
||
* @brief Unlocks the FLASH Option control register access
|
||
* @param FLASHx Flash instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_OB_Unlock(FLASH_TypeDef *FLASHx)
|
||
{
|
||
WRITE_REG(FLASHx->OPTKEYR, LL_FLASH_OPT_KEY1);
|
||
WRITE_REG(FLASHx->OPTKEYR, LL_FLASH_OPT_KEY2);
|
||
}
|
||
|
||
/**
|
||
* @brief Locks the FLASH Option control register access
|
||
* @rmtoll CR OPTLOCK LL_FLASH_OB_Lock
|
||
* @param FLASHx Flash instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_OB_Lock(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_OPTLOCK);
|
||
}
|
||
|
||
/**
|
||
* @brief Getthe option byte loading
|
||
* @rmtoll CR OBL_LAUNCH LL_FLASH_OB_GetLaunch
|
||
* @param FLASHx FLASH Instance
|
||
* @retval This parameter can be one of the following values:
|
||
* @arg @ref LL_FLASH_OB_LAUNCH_COMPLETE
|
||
* @arg @ref LL_FLASH_OB_LAUNCH_REQUESTED
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_OB_GetLaunch(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)(READ_BIT(FLASHx->CR, FLASH_CR_OBL_LAUNCH) >> FLASH_CR_OBL_LAUNCH_Pos);
|
||
}
|
||
|
||
/**
|
||
* @brief Force the option byte loading
|
||
* @note When set to 1, this bit forces the option byte reloading.
|
||
* This bit is cleared only when the option byte loading is complete.
|
||
* @note It cannot be written if OPTLOCK is set.
|
||
* @rmtoll CR OBL_LAUNCH FLASH_OB_Launch
|
||
* @param FLASHx Flash instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void FLASH_OB_Launch(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_OBL_LAUNCH);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable FLASH Fast programming
|
||
* @rmtoll CR FSTPG LL_FLASH_EnableFastProgram
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableFastProgram(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_FSTPG);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable FLASH Fast programming
|
||
* @rmtoll CR FSTPG LL_FLASH_DisableFastProgram
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableFastProgram(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_FSTPG);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the FLASH Fast programming is enabled.
|
||
* @rmtoll CR FSTPG LL_FLASH_IsEnabledFastProgram
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledFastProgram(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->CR, FLASH_CR_FSTPG) == (FLASH_CR_FSTPG)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable FLASH Program
|
||
* @rmtoll CR PG LL_FLASH_EnableProgram
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableProgram(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_PG);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable FLASH Program
|
||
* @rmtoll CR PG LL_FLASH_DisableProgram
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableProgram(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_PG);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the FLASH Program is enabled.
|
||
* @rmtoll CR PRFTEN LL_FLASH_IsEnabledProgram
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledProgram(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->CR, FLASH_CR_PG) == (FLASH_CR_PG)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Set Page number MSB (bank selection)
|
||
* @rmtoll CR BKER LL_FLASH_SetErasePageBank
|
||
* @param FLASHx FLASH Instance
|
||
* @param Mode This parameter can be one of the following values:
|
||
* @arg @ref LL_FLASH_BANK1
|
||
* @arg @ref LL_FLASH_BANK2
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_SetErasePageBank(FLASH_TypeDef *FLASHx, uint32_t bank)
|
||
{
|
||
MODIFY_REG(FLASHx->CR, FLASH_CR_BKER, (bank << FLASH_CR_BKER_Pos));
|
||
}
|
||
|
||
/**
|
||
* @brief Get Page number MSB (bank selection)
|
||
* @rmtoll CR BKER LL_FLASH_GetErasePageBank
|
||
* @param FLASHx FLASH Instance
|
||
* @retval This parameter can be one of the following values:
|
||
* @arg @ref LL_FLASH_BANK1
|
||
* @arg @ref LL_FLASH_BANK2
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_GetErasePageBank(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)(READ_BIT(FLASHx->CR, FLASH_CR_BKER) >> FLASH_CR_BKER_Pos);
|
||
}
|
||
|
||
/**
|
||
* @brief Set Page number selection
|
||
* @rmtoll CR PNB LL_FLASH_SetErasePageNo
|
||
* @param FLASHx FLASH Instance
|
||
* @param No This parameter can be one of the following values:
|
||
* @arg @ref 0 ~ 255
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_SetErasePageNo(FLASH_TypeDef *FLASHx, uint32_t No)
|
||
{
|
||
MODIFY_REG(FLASHx->CR, FLASH_CR_PNB, ((No & 0xFFU) << FLASH_CR_PNB_Pos));
|
||
}
|
||
|
||
/**
|
||
* @brief Get Page number selection
|
||
* @rmtoll CR PNB LL_FLASH_SetErasePageNo
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_GetErasePageNo(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)(READ_BIT(FLASHx->CR, FLASH_CR_PNB) >> FLASH_CR_PNB_Pos);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Page number selection
|
||
* @rmtoll CR PNB LL_FLASH_ClearErasePageNo
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearErasePageNo(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_PNB);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable Page Erase
|
||
* @rmtoll CR PER LL_FLASH_EnablePageErase
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnablePageErase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_PER);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable Page Erase
|
||
* @rmtoll CR PER LL_FLASH_DisablePageErase
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisablePageErase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_PER);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the Page Erase is enabled.
|
||
* @rmtoll CR PER LL_FLASH_IsEnabledPageErase
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledPageErase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->CR, FLASH_CR_PER) == (FLASH_CR_PER)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable Bank1 Erase
|
||
* @rmtoll CR MER1 LL_FLASH_EnableBank1Erase
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableBank1Erase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_MER1);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable FLASH Bank1Erase
|
||
* @rmtoll CR MER1 LL_FLASH_DisableBank1Erase
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableBank1Erase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_MER1);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the Bank1 Erase is enabled.
|
||
* @rmtoll CR MER1 LL_FLASH_IsEnabledBank1Erase
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledBank1Erase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->CR, FLASH_CR_MER1) == (FLASH_CR_MER1)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable Bank2 Erase
|
||
* @rmtoll CR MER2 LL_FLASH_EnableBank2Erase
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableBank2Erase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_MER2);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable Bank2 Erase
|
||
* @rmtoll CR MER2 LL_FLASH_DisableBank2Erase
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableBank2Erase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_MER2);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the Bank2 Erase is enabled.
|
||
* @rmtoll CR MER2 LL_FLASH_IsEnabledBank2Erase
|
||
* @param FLASHx Flash instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledBank2Erase(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->CR, FLASH_CR_MER2) == (FLASH_CR_MER2)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Start an erase operation
|
||
* @note If MER1, MER2 and PER bits are reset and the STRT bit is set,
|
||
* an unpredictable behavior may occur without generating any error flag.
|
||
* This condition should be forbidden.
|
||
* @note This bit is set only by software, and is cleared when the BSY bit is cleared in FLASH_SR.
|
||
* @rmtoll CR STRT LL_FLASH_EraseStart
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EraseStart(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_STRT);
|
||
}
|
||
|
||
/**
|
||
* @brief Start an options operation
|
||
* @note This bit is set only by software, and is cleared when the BSY bit is cleared in FLASH_SR.
|
||
* @rmtoll CR STRT LL_FLASH_OprationStart
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_OB_OprationStart(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_OPTSTRT);
|
||
}
|
||
|
||
/**
|
||
* @brief Get ECC fail bank
|
||
* @note When ECCC or ECCD is set, ADDR_ECC and BK_ECC are not updated if a new ECC error
|
||
* occurs. FLASH_ECCR is updated only when ECC flags are cleared.
|
||
* @rmtoll ECCR BK_ECC LL_FLASH_ECC_GetFailBank
|
||
* @param FLASHx FLASH Instance
|
||
* @retval Returned value can be one of the following values:
|
||
* @arg @ref LL_FLASH_BANK1
|
||
* @arg @ref LL_FLASH_BANK2
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_ECC_GetFailBank(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->ECCR, FLASH_ECCR_BK_ECC) == (FLASH_ECCR_BK_ECC)) ? LL_FLASH_BANK2 : LL_FLASH_BANK1);
|
||
}
|
||
|
||
/**
|
||
* @brief Get ECC fail addr
|
||
* @note When ECCC or ECCD is set, ADDR_ECC and BK_ECC are not updated if a new ECC error
|
||
* occurs. FLASH_ECCR is updated only when ECC flags are cleared.
|
||
* @rmtoll ECCR ADDR_ECC LL_FLASH_ECC_GetFailAddr
|
||
* @param FLASHx FLASH Instance
|
||
* @retval Value between Min_Data=0x00 and Max_Data=0x7FFFF
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_ECC_GetFailAddr(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return (uint32_t)((READ_BIT(FLASHx->ECCR, FLASH_ECCR_ADDR_ECC) == (FLASH_ECCR_ADDR_ECC)) >> FLASH_ECCR_ADDR_ECC_Pos);
|
||
}
|
||
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
/** @defgroup FLASH_LL_EF_FLAG_Management FLAG_Management
|
||
* @{
|
||
*/
|
||
/**
|
||
* @brief Get Busy flag
|
||
* @note This is set on the beginning of a Flash operation
|
||
* and reset when the operation finishes or when an error occurs.
|
||
* @rmtoll FLASH_SR BSY LL_FLASH_IsActiveFlag_BSY
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_BSY(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_BSY) == (FLASH_SR_BSY)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Option validity error flag
|
||
* @note Set by hardware when the options read may not be the one configured by the user.
|
||
If option haven’t been properly loaded, OPTVERR is set again after each system reset.
|
||
* @rmtoll FLASH_SR OPTVERR LL_FLASH_IsActiveFlag_OPTVERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_OPTVERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_OPTVERR) == (FLASH_SR_OPTVERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get PCROP read error flag
|
||
* @note Set by hardware when an address to be read through the D-bus belongs to a
|
||
read protected area of the flash (PCROP protection).
|
||
@note An interrupt is generated if RDERRIE is set in FLASH_CR.
|
||
* @rmtoll FLASH_SR RDERR LL_FLASH_IsActiveFlag_RDERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_RDERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_RDERR) == (FLASH_SR_RDERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Fast programming error flag
|
||
* @note Set by hardware when a fast programming sequence (activated by FSTPG) is interrupted
|
||
* due to an error (alignment, size, write protection or data miss).
|
||
* @note The corresponding status bit (PGAERR, SIZERR, WRPERR or MISSERR) is set at the same time.
|
||
* @rmtoll FLASH_SR FASTERR LL_FLASH_IsActiveFlag_FASTERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_FASTERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_FASTERR) == (FLASH_SR_FASTERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Fast programming data miss error flag
|
||
* @note In Fast programming mode, 32 double words must be sent to flash successively,
|
||
and the new data must be sent to the flash logic control before the current data is fully programmed.
|
||
@note MISSERR is set by hardware when the new data is not present in time.
|
||
* @rmtoll FLASH_SR MISERR LL_FLASH_IsActiveFlag_MISERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_MISERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_MISERR) == (FLASH_SR_MISERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Programming sequence error flag
|
||
* @note Set by hardware when a write access to the Flash memory is performed by the code
|
||
* while PG or FSTPG have not been set previously.
|
||
* @note Set also by hardware when PROGERR, SIZERR, PGAERR, MISSERR or FASTERR is set
|
||
* due to a previous programming error.
|
||
* @rmtoll FLASH_SR PGSERR LL_FLASH_IsActiveFlag_PGSERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_PGSERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_PGSERR) == (FLASH_SR_PGSERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Size error flag
|
||
* @note Set by hardware when the size of the access is a byte or half-word
|
||
* during a program or a fast program sequence.
|
||
* @note Only double word programming is allowed (consequently: word access).
|
||
* @rmtoll FLASH_SR SIZERR LL_FLASH_IsActiveFlag_SIZERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_SIZERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_SIZERR) == (FLASH_SR_SIZERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Programming alignment error flag
|
||
* @note Set by hardware when the data to program cannot be contained
|
||
* in the same 64-bit Flash memory row in case of standard programming,
|
||
* or if there is a change of page during fast programming.
|
||
* @rmtoll FLASH_SR PGAERR LL_FLASH_IsActiveFlag_PGAERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_PGAERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_PGAERR) == (FLASH_SR_PGAERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Write protection error flag
|
||
* @note Set by hardware when an address to be erased/programmed
|
||
* belongs to a write-protected part (by WRP, PCROP or RDP level 1) of the Flash memory.
|
||
* @rmtoll FLASH_SR WRPERR LL_FLASH_IsActiveFlag_WRPERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_WRPERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_WRPERR) == (FLASH_SR_WRPERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Programming error flag
|
||
* @note Set by hardware when a double-word address to be programmed contains a value
|
||
* different from '0xFFFF FFFF' before programming, except if the data to write is '0x0000 0000'.
|
||
* @rmtoll FLASH_SR PROGERR LL_FLASH_IsActiveFlag_PROGERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_PROGERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_PROGERR) == (FLASH_SR_PROGERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Operation error flag
|
||
* @note Set by hardware when a Flash memory operation (program / erase) completes unsuccessfully.
|
||
* @note This bit is set only if error interrupts are enabled (ERRIE = 1).
|
||
* @rmtoll FLASH_SR OPERR LL_FLASH_IsActiveFlag_OPERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_OPERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_OPERR) == (FLASH_SR_OPERR)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get End of operation flag
|
||
* @note Set by hardware when one or more Flash memory operation (programming / erase) has been completed successfully.
|
||
* @note This bit is set only if the end of operation interrupts are enabled (EOPIE = 1).
|
||
* @rmtoll FLASH_SR EOP LL_FLASH_IsActiveFlag_EOP
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsActiveFlag_EOP(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->SR, FLASH_SR_EOP) == (FLASH_SR_EOP)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal OPTVERR flag
|
||
* @rmtoll ISR IOPTVERR LL_FLASH_ClearFlag_OPTVERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_OPTVERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_OPTVERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal RDERR flag
|
||
* @rmtoll ISR IRDERR LL_FLASH_ClearFlag_RDERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_RDERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_RDERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal FASTERR flag
|
||
* @rmtoll ISR IFASTERR LL_FLASH_ClearFlag_FASTERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_FASTERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_FASTERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal MISERR flag
|
||
* @rmtoll ISR IMISERR LL_FLASH_ClearFlag_MISERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_MISERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_MISERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal PGSERR flag
|
||
* @rmtoll ISR IPGSERR LL_FLASH_ClearFlag_PGSERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_PGSERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_PGSERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal SIZERR flag
|
||
* @rmtoll ISR ISIZERR LL_FLASH_ClearFlag_SIZERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_SIZERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_SIZERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal PGAERR flag
|
||
* @rmtoll ISR IPGAERR LL_FLASH_ClearFlag_PGAERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_PGAERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_PGAERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal WRPERR flag
|
||
* @rmtoll ISR IWRPERR LL_FLASH_ClearFlag_WRPERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_WRPERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_WRPERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal PROGERR flag
|
||
* @rmtoll ISR IPROGERR LL_FLASH_ClearFlag_PROGERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_PROGERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_PROGERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal OPERR flag
|
||
* @rmtoll ISR IOPERR LL_FLASH_ClearFlag_OPERR
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_OPERR(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_OPERR);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal EOP flag
|
||
* @rmtoll ISR IEOP LL_FLASH_ClearFlag_EOP
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ClearFlag_EOP(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->SR, FLASH_SR_EOP);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Internal ECC ECCD flag
|
||
* @note Set by hardware when two ECC errors have been detected. When this bit is set, a NMI is generated
|
||
* @rmtoll ECCR ECCD LL_FLASH_ECC_IsActiveFlag_ECCD
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_ECC_IsActiveFlag_ECCD(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->ECCR, FLASH_ECCR_ECCD) == (FLASH_ECCR_ECCD)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Internal ECC ECCC flag
|
||
* @note Set by hardware when one ECC error has been detected and corrected.
|
||
* An interrupt is generated if ECCIE is set.
|
||
* @rmtoll ECCR ECCC LL_FLASH_ECC_IsActiveFlag_ECCC
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_ECC_IsActiveFlag_ECCC(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->ECCR, FLASH_ECCR_ECCC) == (FLASH_ECCR_ECCC)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal ECCD flag
|
||
* @rmtoll ECCR ECCD LL_FLASH_ECC_ClearFlag_ECCD
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ECC_ClearFlag_ECCD(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->ECCR, FLASH_ECCR_ECCD);
|
||
}
|
||
|
||
/**
|
||
* @brief Clear Internal ECCC flag
|
||
* @rmtoll ECCR ECCC LL_FLASH_ECC_ClearFlag_ECCC
|
||
* @param FLASHx FLASH Instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ECC_ClearFlag_ECCC(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->ECCR, FLASH_ECCR_ECCC);
|
||
}
|
||
|
||
/**
|
||
* @brief Get Internal System Flash ECC fail flag
|
||
* @note This bit indicates that the ECC error correction or double ECC error detection
|
||
* is located in the System Flash.
|
||
* @rmtoll ECCR SYSF_ECC LL_FLASH_ECC_IsActiveFlag_SYSF_ECC
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_ECC_IsActiveFlag_SYSF_ECC(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->ECCR, FLASH_ECCR_SYSF_ECC) == (FLASH_ECCR_SYSF_ECC)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
/** @defgroup FLASH_LL_EF_IT_Management IT-Management
|
||
* @{
|
||
*/
|
||
/**
|
||
* @brief Enable PCROP read error interrupt (RDERRIE).
|
||
* @rmtoll CR RDERRIE LL_FLASH_EnableIT_RDERRIE
|
||
* @param FLASHx FLASH instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableIT_RDERRIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_RDERRIE);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable PCROP read error interrupt (RDERRIE).
|
||
* @rmtoll CR RDERRIE LL_FLASH_DisableIT_RDERRIE
|
||
* @param FLASHx FLASH instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableIT_RDERRIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_RDERRIE);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable Error interrupt (ERRIE).
|
||
* @rmtoll CR ERRIE LL_FLASH_EnableIT_ERRIE
|
||
* @param FLASHx FLASH instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableIT_ERRIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_ERRIE);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable Error interrupt (ERRIE).
|
||
* @rmtoll CR ERRIE LL_FLASH_DisableIT_ERRIE
|
||
* @param FLASHx FLASH instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableIT_ERRIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_ERRIE);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable End of operation interrupt (EOPIE).
|
||
* @rmtoll CR EOPIE LL_FLASH_EnableIT_EOPIE
|
||
* @param FLASHx FLASH instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_EnableIT_EOPIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->CR, FLASH_CR_EOPIE);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable End of operation interrupt (EOPIE).
|
||
* @rmtoll CR EOPIE LL_FLASH_DisableIT_EOPIE
|
||
* @param FLASHx FLASH instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_DisableIT_EOPIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->CR, FLASH_CR_EOPIE);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the PCROP read error interrupt (RDERRIE) is enabled.
|
||
* @rmtoll CR2 RDERRIE LL_FLASH_IsEnabledIT_RDERRIE
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledIT_RDERRIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->CR, FLASH_CR_RDERRIE) == (FLASH_CR_RDERRIE)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the Error interrupt (ERRIE) is enabled.
|
||
* @rmtoll CR2 ERRIE LL_FLASH_IsEnabledIT_ERRIE
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledIT_ERRIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->CR, FLASH_CR_ERRIE) == (FLASH_CR_ERRIE)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the End of operation interrupt (EOPIE) is enabled.
|
||
* @rmtoll CR2 EOPIE LL_FLASH_IsEnabledIT_EOPIE
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_IsEnabledIT_EOPIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->CR, FLASH_CR_EOPIE) == (FLASH_CR_EOPIE)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @brief Enable ECC correction interrupt (ECCIE).
|
||
* @rmtoll ECCR ECCIE LL_FLASH_ECC_EnableIT_ECCIE
|
||
* @param FLASHx FLASH instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ECC_EnableIT_ECCIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
SET_BIT(FLASHx->ECCR, FLASH_ECCR_ECCIE);
|
||
}
|
||
|
||
/**
|
||
* @brief Disable ECC correction interrupt (ECCIE).
|
||
* @rmtoll ECCR ECCIE LL_FLASH_ECC_DisableIT_ECCIE
|
||
* @param FLASHx FLASH instance
|
||
* @retval None
|
||
*/
|
||
__STATIC_INLINE void LL_FLASH_ECC_DisableIT_ECCIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
CLEAR_BIT(FLASHx->ECCR, FLASH_ECCR_ECCIE);
|
||
}
|
||
|
||
/**
|
||
* @brief Indicates whether the ECC correction interrupt (ECCIE) is enabled.
|
||
* @rmtoll ECCR RDERRIE LL_FLASH_ECC_IsEnabledIT_ECCIE
|
||
* @param FLASHx FLASH Instance
|
||
* @retval State of bit (1 or 0).
|
||
*/
|
||
__STATIC_INLINE uint32_t LL_FLASH_ECC_IsEnabledIT_ECCIE(FLASH_TypeDef *FLASHx)
|
||
{
|
||
return ((READ_BIT(FLASHx->ECCR, FLASH_ECCR_ECCIE) == (FLASH_ECCR_ECCIE)) ? 1UL : 0UL);
|
||
}
|
||
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
/** @defgroup SPI_LL_EF_Init Initialization and de-initialization functions
|
||
* @{
|
||
*/
|
||
void LL_FLASH_ClearAllErrorFlag(void);
|
||
void LL_FLASH_FlushCaches(void);
|
||
ErrorStatus LL_FLASH_ErasePage(uint32_t pageno);
|
||
ErrorStatus LL_FLASH_EraseBank(uint32_t bank);
|
||
ErrorStatus LL_FLASH_EraseChip(void);
|
||
ErrorStatus LL_FLASH_ProgramDoubleWord(uint32_t address, uint64_t data);
|
||
ErrorStatus LL_FLASH_Program(uint32_t address, uint8_t data[], uint32_t num);
|
||
ErrorStatus LL_FLASH_Read(uint32_t address, uint8_t data[], uint32_t num);
|
||
void LL_FLASH_ProgramFast(uint32_t address, uint32_t DataAddress);
|
||
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
/**
|
||
* @}
|
||
*/
|
||
|
||
#ifdef __cplusplus
|
||
}
|
||
#endif
|
||
|
||
#endif /* __STM32L4xx_LL_FLASH_H */
|
||
|
||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|