diff --git a/Core/Inc/main.h b/Core/Inc/main.h index b3ae95e..0a7ec73 100644 --- a/Core/Inc/main.h +++ b/Core/Inc/main.h @@ -190,9 +190,10 @@ extern "C" #define DAC2_CS_GPIO_Port GPIOB #define ADC_CS_Pin GPIO_PIN_0 #define ADC_CS_GPIO_Port GPIOE -#define AD7124_SYNC_Pin GPIO_PIN_1 -#define AD7124_SYNC_GPIO_Port GPIOE - +/* PCBA测试盒AD7124同步信号引脚定义 */ +#define AD7124_SYNC_Pin GPIO_PIN_13 +#define AD7124_SYNC_GPIO_Port GPIOD +/* PCBA测试盒AD7124同步信号引脚定义 */ /* SPI2引脚定义 */ #define SPI2_SCK_Pin GPIO_PIN_10 #define SPI2_SCK_GPIO_Port GPIOB @@ -202,6 +203,9 @@ extern "C" #define SPI2_MOSI_GPIO_Port GPIOC #define SPI2_CS_Pin GPIO_PIN_10 #define SPI2_CS_GPIO_Port GPIOD +//背面的AD7124 +#define SPI2_CS2_Pin GPIO_PIN_11 +#define SPI2_CS2_GPIO_Port GPIOD /* USER CODE BEGIN Private defines */ #define TRUE 0 diff --git a/Core/Src/freertos.c b/Core/Src/freertos.c index ed572ec..41ad9d4 100644 --- a/Core/Src/freertos.c +++ b/Core/Src/freertos.c @@ -92,6 +92,7 @@ void start_adc_task(void const *argument); void start_gpio_di_do_task(void const *argument); void start_ec11_task(void const *argument); void start_ad7124_test_task(void const *argument); +void ad7124_multi_channel_init(uint8_t sample_rate); extern void MX_LWIP_Init(void); void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ @@ -378,85 +379,125 @@ extern int32_t g_ad7124_id; void start_ad7124_test_task(const void *argument) { - int32_t ret; - - // 等待系统稳定 vTaskDelay(1000); - g_adc_state = 0; // 初始化AD7124 - ret = ad7124_setup(); - - - // 读取关键寄存器值 - ret = ad7124_read_register(&ad7124_regs[AD7124_ADC_CONTROL]); - if (ret >= 0) { - g_adc_control = ad7124_regs[AD7124_ADC_CONTROL].value; - } - - ret = ad7124_read_register(&ad7124_regs[AD7124_CONFIG_0]); - if (ret >= 0) { - g_config_0 = ad7124_regs[AD7124_CONFIG_0].value; - } - - ret = ad7124_read_register(&ad7124_regs[AD7124_FILTER_0]); - if (ret >= 0) { - g_filter_0 = ad7124_regs[AD7124_FILTER_0].value; - } - - // 只测试通道1 - uint8_t ch = 0; // 假设通道1索引为0，如有不同请调整 + ad7124_setup(); + vTaskDelay(100); while(1) { - // 配置通道1 - g_adc_state = 1; - g_channel_config = ad7124_channel_regs[ch].value; // 记录通道配置值 - ad7124_regs[AD7124_CHANNEL_0].value = ad7124_channel_regs[ch].value; - ret = ad7124_write_register(&ad7124_regs[AD7124_CHANNEL_0]); - if (ret < 0) { - g_adc_error = ret; - vTaskDelay(500); - continue; - } - - // 读取通道状态寄存器 - ret = ad7124_read_register(&ad7124_regs[AD7124_STATUS]); - if (ret >= 0) { + // 遍历所有启用的通道 + for(uint8_t ch = STOP_NC_ADC; ch < AD7124_CHANNEL_EN_MAX; ch++) + { + // 1. 将ADC设置为掉电模式 + ad7124_regs[AD7124_ADC_CONTROL].value = 0x0600; // Power-down mode + ad7124_write_register(&ad7124_regs[AD7124_ADC_CONTROL]); + vTaskDelay(1); + + // 2. 配置当前通道 + ad7124_regs[AD7124_CHANNEL_0].value = ad7124_channel_regs[ch].value; + ad7124_write_register(&ad7124_regs[AD7124_CHANNEL_0]); + + // 3. 读取并保存通道配置状态 + ad7124_read_register(&ad7124_regs[AD7124_CHANNEL_0]); + g_channel_config = ad7124_regs[AD7124_CHANNEL_0].value; + + // 4. 设置为单次转换模式并启动转换 + ad7124_regs[AD7124_ADC_CONTROL].value = 0x0684; // Single conversion mode + ad7124_write_register(&ad7124_regs[AD7124_ADC_CONTROL]); + + // 5. 立即读取状态寄存器确认转换开始 + ad7124_read_register(&ad7124_regs[AD7124_STATUS]); g_channel_status = ad7124_regs[AD7124_STATUS].value; + + // 6. 等待转换完成 + uint16_t timeout = 1000; + while(timeout--) { + int32_t ret = ad7124_read_register(&ad7124_regs[AD7124_STATUS]); + if(ret >= 0) { + g_channel_status = ad7124_regs[AD7124_STATUS].value; + if(!(g_channel_status & AD7124_STATUS_REG_RDY)) { + // 转换完成，立即读取数据 + g_adc_data = ad7124_read_data(); + break; + } + } + vTaskDelay(1); + } + + // 7. 读取错误寄存器检查是否有错误 + ad7124_read_register(&ad7124_regs[AD7124_ERROR]); + g_adc_error = ad7124_regs[AD7124_ERROR].value; + + // 8. 保存最终的控制寄存器状态 + ad7124_read_register(&ad7124_regs[AD7124_ADC_CONTROL]); + g_adc_control = ad7124_regs[AD7124_ADC_CONTROL].value; + + // 9. 如果发生错误，重置ADC + if(g_adc_error != 0) { + ad7124_reset(); + vTaskDelay(100); + ad7124_setup(); + vTaskDelay(10); + } + + // 10. 如果超时或出错，增加延时方便调试 + if(timeout == 0 || g_adc_error != 0) { + vTaskDelay(100); + } } - // 等待转换完成，设置较短的超时时间 - g_adc_state = 2; - ret = ad7124_wait_for_conv_ready(100); // 100ms超时 - if (ret < 0) { - g_adc_error = ret; - vTaskDelay(500); - continue; - } - - // 读取数据 - g_adc_state = 3; - g_adc_data = ad7124_read_data(); - g_adc_error = 0; // 清除错误标志 - - g_adc_state = 4; - // 组包：4字节大端 - uint8_t tx_buf[4]; - tx_buf[0] = (g_adc_data >> 24) & 0xFF; - tx_buf[1] = (g_adc_data >> 16) & 0xFF; - tx_buf[2] = (g_adc_data >> 8) & 0xFF; - tx_buf[3] = g_adc_data & 0xFF; - - g_adc_state = 5; - // 发送数据 - //user_send_data_control(tx_buf, 4); - - // 固定延时 - vTaskDelay(500); + vTaskDelay(pdMS_TO_TICKS(10)); } } +/** + * @brief Initialize AD7124 with multiple channels + * @param sample_rate: Sample rate selection (2Hz to 1kHz) + * @retval None + */ +void ad7124_multi_channel_init(uint8_t sample_rate) +{ + // Reset AD7124 + ad7124_reset(); + vTaskDelay(pdMS_TO_TICKS(100)); // 复位后延时 + + // 配置ADC控制寄存器 + ad7124_regs[AD7124_ADC_CONTROL].value = + AD7124_ADC_CTRL_REG_DATA_STATUS | // Enable status register + AD7124_ADC_CTRL_REG_CS_EN | // Enable chip select + AD7124_ADC_CTRL_REG_REF_EN | // Enable internal reference + AD7124_ADC_CTRL_REG_POWER_MODE(3); // Full power mode + ad7124_write_register(&ad7124_regs[AD7124_ADC_CONTROL]); + + // 配置Setup 0 + ad7124_regs[AD7124_CONFIG_0].value = + AD7124_CFG_REG_BIPOLAR | // Bipolar mode + AD7124_CFG_REG_BURNOUT(0) | // Burnout current source off + AD7124_CFG_REG_REF_BUFP | // Reference buffer positive enabled + AD7124_CFG_REG_REF_BUFM | // Reference buffer negative enabled + AD7124_CFG_REG_AIN_BUFP | // Enable positive input buffer + AD7124_CFG_REG_AINN_BUFM | // Enable negative input buffer + AD7124_CFG_REG_REF_SEL(2) | // Use internal reference + AD7124_CFG_REG_PGA(0); // Gain = 1 + ad7124_write_register(&ad7124_regs[AD7124_CONFIG_0]); + + // 初始禁用所有通道 + for(uint8_t ch = 0; ch < AD7124_CHANNEL_EN_MAX; ch++) { + ad7124_regs[AD7124_CHANNEL_0 + ch].value = 0; + ad7124_write_register(&ad7124_regs[AD7124_CHANNEL_0 + ch]); + } + + // 配置滤波器 + ad7124_regs[AD7124_FILTER_0].value = + AD7124_FILT_REG_FILTER(0) | // SINC4 filter + AD7124_FILT_REG_REJ60 | // Enable 60Hz rejection + AD7124_FILT_REG_POST_FILTER(3) | // Post filter enabled + AD7124_FILT_REG_FS(1); // Output data rate + ad7124_write_register(&ad7124_regs[AD7124_FILTER_0]); +} + /* Private application code --------------------------------------------------*/ /* USER CODE BEGIN Application */ diff --git a/MDK-ARM/controller_pcba.uvoptx b/MDK-ARM/controller_pcba.uvoptx index 672ba0e..e05981f 100644 --- a/MDK-ARM/controller_pcba.uvoptx +++ b/MDK-ARM/controller_pcba.uvoptx @@ -148,7 +148,72 @@ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM)) - + + + 0 + 0 + 147 + 1 +
134243296
+ 0 + 0 + 0 + 0 + 0 + 1 + ..\User\driver\ad7124.c + + \\semi_finished_product_testing\../User/driver/ad7124.c\147 + + + 1 + 0 + 439 + 1 +
134271122
+ 0 + 0 + 0 + 0 + 0 + 1 + ../Core/Src/freertos.c + + \\semi_finished_product_testing\../Core/Src/freertos.c\439 + + + 2 + 0 + 422 + 1 +
134271054
+ 0 + 0 + 0 + 0 + 0 + 1 + ../Core/Src/freertos.c + + \\semi_finished_product_testing\../Core/Src/freertos.c\422 + + + 3 + 0 + 419 + 1 +
134271036
+ 0 + 0 + 0 + 0 + 0 + 1 + ../Core/Src/freertos.c + + \\semi_finished_product_testing\../Core/Src/freertos.c\419 + + 0 @@ -198,77 +263,52 @@ 9 1 - g_adc_state + g_channel_config 10 1 - g_channel_config + g_channel_status 11 1 - g_channel_status + g_config_0 12 1 - g_adc_control + g_filter_0 13 1 - g_config_0 + ad7124_regs[5].value 14 1 - g_filter_0 + g_ad7124_id 15 1 - ad7124_regs[5].value + g_adc_error 16 1 - g_ad7124_id + g_adc_data 17 1 - buffer[1] + g_adc_state 18 1 - buffer[2] - - - 19 - 1 - buffer[3] - - - 20 - 1 - tx_buf[0] - - - 21 - 1 - tx_buf[1] - - - 22 - 1 - tx_buf[2] - - - 23 - 1 - tx_buf[3] + g_adc_control diff --git a/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm b/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm new file mode 100644 index 0000000..c4e3684 --- /dev/null +++ b/MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm @@ -0,0 +1,57 @@ + + +
+
Vision Build Log

+
Tool Versions:

+IDE-Version: Vision V5.36.0.0
+Copyright (C) 2021 ARM Ltd and ARM Germany GmbH. All rights reserved.
+License Information: 1 admin, 1, LIC=UJWP0-B9JWK-458T5-GZZVK-L22WW-E2L2W
+ 
+Tool Versions:
+Toolchain:       MDK-ARM Plus  Version: 5.36.0.0
+Toolchain Path:  C:\Keil_v5\ARM\ARMCC\Bin
+C Compiler:      Armcc.exe V5.06 update 7 (build 960)
+Assembler:       Armasm.exe V5.06 update 7 (build 960)
+Linker/Locator:  ArmLink.exe V5.06 update 7 (build 960)
+Library Manager: ArmAr.exe V5.06 update 7 (build 960)
+Hex Converter:   FromElf.exe V5.06 update 7 (build 960)
+CPU DLL:         SARMCM3.DLL V5.36.0.0
+Dialog DLL:      DCM.DLL V1.17.3.0
+Target DLL:      STLink\ST-LINKIII-KEIL_SWO.dll V3.0.9.0
+Dialog DLL:      TCM.DLL V1.53.0.0
+ 
+
Project:

+C:\Users\qiuxin.JS250402\Desktop\PCBA\controller_pcba_rtos\MDK-ARM\controller_pcba.uvprojx
+Project File Date:  05/14/2025
+
+
Output:

+*** Using Compiler 'V5.06 update 7 (build 960)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
+Build target 'controller_pcba'
+"semi-finished_product_testing\semi-finished_product_testing.axf" - 0 Error(s), 0 Warning(s).
+
+
Software Packages used:

+
+Package Vendor: ARM
+                http://www.keil.com/pack/ARM.CMSIS.5.8.0.pack
+                ARM.CMSIS.5.8.0
+                CMSIS (Common Microcontroller Software Interface Standard)
+   * Component: CORE Version: 5.5.0
+
+Package Vendor: Keil
+                http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.14.0.pack
+                Keil.STM32F4xx_DFP.2.14.0
+                STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
+
+
Collection of Component include folders:

+  .\RTE\_controller_pcba
+  C:\Users\qiuxin.JS250402\AppData\Local\Arm\Packs\ARM\CMSIS\5.8.0\CMSIS\Core\Include
+  C:\Users\qiuxin.JS250402\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.14.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
+
+
Collection of Component Files used:

+
+   * Component: ARM::CMSIS:CORE:5.5.0
+      Include file:  CMSIS\Core\Include\tz_context.h
+Build Time Elapsed:  00:00:01
+
+ + diff --git a/User/driver/ad7124.c b/User/driver/ad7124.c index c8e353e..c26ffbf 100644 --- a/User/driver/ad7124.c +++ b/User/driver/ad7124.c @@ -13,7 +13,7 @@ int32_t g_ad7124_id; // 配置ad7124寄存器的值，根据实际项目需求配置 ad7124_st_reg_t ad7124_regs[AD7124_REG_NO] = { {AD7124_STATUS, 0x00, AD7124_SIZE_1, AD7124_R}, /* AD7124_Status */ - {AD7124_ADC_CONTROL, 0x0280, AD7124_SIZE_2, AD7124_RW}, /* AD7124_ADC_Control */ + {AD7124_ADC_CONTROL, 0x0680, AD7124_SIZE_2, AD7124_RW}, /* AD7124_ADC_Control - Enable reference, chip select, and data status */ {AD7124_DATA, 0x000000, AD7124_SIZE_3, AD7124_R}, /* AD7124_Data */ {AD7124_IOCON1, 0x000000, AD7124_SIZE_3, AD7124_RW}, /* AD7124_IOCon1 */ {AD7124_IOCON2, 0x0000, AD7124_SIZE_2, AD7124_RW}, /* AD7124_IOCon2 */ @@ -37,7 +37,7 @@ ad7124_st_reg_t ad7124_regs[AD7124_REG_NO] = { {AD7124_CHANNEL_13, 0x0001, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Channel_13 */ {AD7124_CHANNEL_14, 0x0001, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Channel_14 */ {AD7124_CHANNEL_15, 0x0001, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Channel_15 */ - {AD7124_CONFIG_0, 0x01E0, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_0 */ + {AD7124_CONFIG_0, 0x0DE0, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_0 - Enable buffers and internal reference */ {AD7124_CONFIG_1, 0x0040, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_1 */ {AD7124_CONFIG_2, 0x0860, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_2 */ {AD7124_CONFIG_3, 0x0860, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_3 */ @@ -99,6 +99,7 @@ int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg) int32_t ret = 0; uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0}; uint8_t add_status_length = 0; + uint8_t i = 0; // 添加变量声明 // 构建命令字 buffer[0] = AD7124_COMM_REG_RD | AD7124_COMM_REG_RA(p_reg->addr); @@ -120,14 +121,20 @@ int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg) return ret; // 解析数据（buffer[1]开始为有效数据） - if (p_reg->size == 1) { - p_reg->value = buffer[1]; - } else if (p_reg->size == 2) { - p_reg->value = ((uint16_t)buffer[1] << 8) | buffer[2]; - } else if (p_reg->size == 3) { - p_reg->value = ((uint32_t)buffer[1] << 16) | ((uint32_t)buffer[2] << 8) | buffer[3]; - } else { - p_reg->value = 0; + // if (p_reg->size == 1) { + // p_reg->value = buffer[1]; + // } else if (p_reg->size == 2) { + // p_reg->value = ((uint16_t)buffer[1] << 8) | buffer[2]; + // } else if (p_reg->size == 3) { + // p_reg->value = ((uint32_t)buffer[1] << 16) | ((uint32_t)buffer[2] << 8) | buffer[3]; + // } else { + // p_reg->value = 0; + // } + p_reg->value = 0; + for (i = 1; i < p_reg->size + 1; i++) + { + p_reg->value <<= 8; + p_reg->value += buffer[i]; } if (add_status_length) @@ -434,80 +441,84 @@ int32_t ad7124_setup(void) { int32_t ret; uint8_t reg_nr; - char uart_buf[100]; - // 初始化SPI + // Initialize SPI board_spi_init(AD7124); - HAL_Delay(10); // 等待SPI稳定 + HAL_Delay(10); // Wait for SPI to stabilize - // 复位设备 + // Reset device ret = ad7124_reset(); - if (ret < 0) { - sprintf(uart_buf, "AD7124 reset failed: %ld\r\n", ret); - HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100); + if (ret < 0) return ret; - } + + // Wait after reset + HAL_Delay(100); - // 等待复位完成 - HAL_Delay(100); // 增加复位后的等待时间 - - // 等待电源稳定 + // Wait for power-on ret = ad7124_wait_to_power_on(AD7124_RDY); - if (ret < 0) { - sprintf(uart_buf, "AD7124 power on timeout: %ld\r\n", ret); - HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100); + if (ret < 0) return ret; - } - - // 读取ID寄存器 + + // Read and verify ID register ret = ad7124_read_register(&ad7124_regs[AD7124_ID]); - if (ret < 0) { - sprintf(uart_buf, "Failed to read ID register: %ld\r\n", ret); - HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100); + if (ret < 0) return ret; + + if ((ad7124_regs[AD7124_ID].value & 0xF0) != 0x40) { + return COMM_ERR; // Invalid ID + } + + // Initialize registers in sequence + // First ADC Control register - Set to standby mode initially + ad7124_regs[AD7124_ADC_CONTROL].value = + AD7124_ADC_CTRL_REG_POWER_MODE(3) | // Full power mode + AD7124_ADC_CTRL_REG_CS_EN | // Enable chip select + AD7124_ADC_CTRL_REG_DATA_STATUS | // Enable status register + AD7124_ADC_CTRL_REG_REF_EN | // Enable reference + AD7124_ADC_CTRL_REG_MODE(0); // Continuous conversion mode initially + + ret = ad7124_write_register(&ad7124_regs[AD7124_ADC_CONTROL]); + if (ret < 0) + return ret; + + // Then Configuration registers + ad7124_regs[AD7124_CONFIG_0].value = + AD7124_CFG_REG_BIPOLAR | // Bipolar mode + AD7124_CFG_REG_REF_BUFP | // Reference buffer positive enabled + AD7124_CFG_REG_REF_BUFM | // Reference buffer negative enabled + AD7124_CFG_REG_AIN_BUFP | // Enable positive input buffer + AD7124_CFG_REG_AINN_BUFM | // Enable negative input buffer + AD7124_CFG_REG_REF_SEL(2) | // Use internal reference + AD7124_CFG_REG_PGA(0); // Gain = 1 + + ret = ad7124_write_register(&ad7124_regs[AD7124_CONFIG_0]); + if (ret < 0) + return ret; + + // Then Filter registers - Set for 50Hz rejection + ad7124_regs[AD7124_FILTER_0].value = + AD7124_FILT_REG_FILTER(0) | // SINC4 filter + AD7124_FILT_REG_REJ60 | // Enable 60Hz rejection + AD7124_FILT_REG_POST_FILTER(3) | // Post filter enabled + AD7124_FILT_REG_FS(1); // Output data rate + + ret = ad7124_write_register(&ad7124_regs[AD7124_FILTER_0]); + if (ret < 0) + return ret; + + // Initialize all channels to disabled state + for(reg_nr = AD7124_CHANNEL_0; reg_nr <= AD7124_CHANNEL_15; reg_nr++) { + ad7124_regs[reg_nr].value = 0x0000; // Disable channel + ret = ad7124_write_register(&ad7124_regs[reg_nr]); + if (ret < 0) + return ret; } - // 检查ID值 - // if (ad7124_regs[AD7124_ID].value != 0x14) { - // sprintf(uart_buf, "Invalid ID: 0x%02X, expected 0x14\r\n", ad7124_regs[AD7124_ID].value); - // HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100); - // return COMM_ERR; - // } - - // sprintf(uart_buf, "AD7124 ID verified: 0x%02X\r\n", ad7124_regs[AD7124_ID].value); - // HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100); - - // 初始化其他寄存器 - for (reg_nr = AD7124_STATUS; reg_nr < AD7124_OFFSET_0; reg_nr++) { - if (ad7124_regs[reg_nr].rw == AD7124_RW) { - ret = ad7124_write_register(&ad7124_regs[reg_nr]); - if (ret < 0) { - sprintf(uart_buf, "Failed to write register 0x%02X: %ld\r\n", reg_nr, ret); - HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100); - return ret; - } - - // 验证写入 - ret = ad7124_read_register(&ad7124_regs[reg_nr]); - if (ret < 0) { - sprintf(uart_buf, "Failed to verify register 0x%02X: %ld\r\n", reg_nr, ret); - HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100); - return ret; - } - - // 如果读取的值与写入的值不匹配，返回错误 - if (ad7124_regs[reg_nr].value != ad7124_regs[reg_nr].value) { - sprintf(uart_buf, "Register 0x%02X mismatch: wrote 0x%04X, read 0x%04X\r\n", - reg_nr, ad7124_regs[reg_nr].value, ad7124_regs[reg_nr].value); - HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100); - return COMM_ERR; - } - } - } - - // 使能同步信号 - HAL_GPIO_WritePin(AD7124_SYNC_GPIO_Port, AD7124_SYNC_Pin, GPIO_PIN_SET); - + // Verify ADC Control register + ret = ad7124_read_register(&ad7124_regs[AD7124_ADC_CONTROL]); + if (ret < 0) + return ret; + return 0; } @@ -528,14 +539,26 @@ int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length) // 确保CS信号在传输前是高的 board_spi_cs_off(AD7124); HAL_Delay(1); // 添加短暂延时 - //board_spi_init(AD7124); + + // 确保SPI配置正确 + board_spi_init(AD7124); + + // 拉低CS开始传输 board_spi_cs_on(AD7124); HAL_Delay(1); // 添加短暂延时 + // 执行SPI传输 ret = spi_transmit_receive(&hspi2, buff, length); - HAL_Delay(1); // 添加短暂延时 + // 等待最后一个字节传输完成 + HAL_Delay(1); + + // 拉高CS结束传输 board_spi_cs_off(AD7124); + HAL_Delay(1); // 确保CS保持高电平足够长时间 return ret; } + +// 修改SPI初始化函数 + diff --git a/User/driver/ad7124.h b/User/driver/ad7124.h index fd7ede2..68b5261 100644 --- a/User/driver/ad7124.h +++ b/User/driver/ad7124.h @@ -21,6 +21,9 @@ #define GAIN 1 #define AD_CODE 0XFFFFFF +//#define AD7124_4 0x00 +#define AD7124_8 0x01 + /* Communication Register bits */ #define AD7124_COMM_REG_WEN (0 << 7) #define AD7124_COMM_REG_WR (0 << 6) @@ -148,6 +151,7 @@ /* Configuration Registers 0-7 bits */ #define AD7124_CFG_REG_BIPOLAR (1 << 11) +#define AD7124_CFG_REG_UNIPOLAR (0 << 11) // 单极性 #define AD7124_CFG_REG_BURNOUT(x) (((x) & 0x3) << 9) #define AD7124_CFG_REG_REF_BUFP (1 << 8) #define AD7124_CFG_REG_REF_BUFM (1 << 7) @@ -247,7 +251,7 @@ typedef enum typedef struct { int addr; - int32_t value; + int value; int size; int rw; } ad7124_st_reg_t; @@ -280,17 +284,17 @@ extern ad7124_st_reg_t ad7124_regs[AD7124_REG_NO]; extern ad7124_st_reg_t ad7124_channel_regs[AD7124_CHANNEL_EN_MAX]; extern int32_t g_ad7124_id; // 函数声明 -int32_t ad7124_read_register(ad7124_st_reg_t *p_reg); -int32_t ad7124_write_register(ad7124_st_reg_t *reg); -int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg); -int32_t ad7124_no_check_write_register(ad7124_st_reg_t *reg); -int32_t ad7124_reset(void); -int32_t ad7124_wait_for_spi_ready(uint32_t timeout); -int32_t ad7124_wait_to_power_on(uint32_t timeout); -int32_t ad7124_wait_for_conv_ready(uint32_t timeout); -int32_t ad7124_read_data(void); -void ad7124_get_analog(uint8_t channel_nr); -int32_t ad7124_setup(void); -int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length); +int32_t ad7124_read_register(ad7124_st_reg_t *p_reg);//读取寄存器 +int32_t ad7124_write_register(ad7124_st_reg_t *reg);//写入寄存器 +int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg);//不检查读取寄存器 +int32_t ad7124_no_check_write_register(ad7124_st_reg_t *reg);//不检查写入寄存器 +int32_t ad7124_reset(void);//复位 +int32_t ad7124_wait_for_spi_ready(uint32_t timeout);//等待SPI准备好 +int32_t ad7124_wait_to_power_on(uint32_t timeout);//等待电源开启 +int32_t ad7124_wait_for_conv_ready(uint32_t timeout);//等待转换准备好 +int32_t ad7124_read_data(void);//读取数据 +void ad7124_get_analog(uint8_t channel_nr);//获取模拟量 +int32_t ad7124_setup(void);//设置 +int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length);//读写SPI #endif /* __AD7124_H */ diff --git a/User/system/user_spi.c b/User/system/user_spi.c index 594fc7f..54c6198 100644 --- a/User/system/user_spi.c +++ b/User/system/user_spi.c @@ -21,25 +21,30 @@ int32_t spi_transmit_receive(SPI_HandleTypeDef *hspi, uint8_t *data_write, uint8 void ad7124_spi_init(void) { - /* Enable SPI2 clock */ - __HAL_RCC_SPI2_CLK_ENABLE(); - - hspi2.Instance = SPI2; - hspi2.Init.Mode = SPI_MODE_MASTER; - hspi2.Init.Direction = SPI_DIRECTION_2LINES; - hspi2.Init.DataSize = SPI_DATASIZE_8BIT; - hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH; - hspi2.Init.CLKPhase = SPI_PHASE_2EDGE; - hspi2.Init.NSS = SPI_NSS_SOFT; - hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; - hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; - hspi2.Init.TIMode = SPI_TIMODE_DISABLE; - hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - hspi2.Init.CRCPolynomial = 10; - if (HAL_SPI_Init(&hspi2) != HAL_OK) - { - Error_Handler(); - } + /* Enable SPI2 clock */ + __HAL_RCC_SPI2_CLK_ENABLE(); + + hspi2.Instance = SPI2; + hspi2.Init.Mode = SPI_MODE_MASTER; + hspi2.Init.Direction = SPI_DIRECTION_2LINES; + hspi2.Init.DataSize = SPI_DATASIZE_8BIT; + hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH; // CPOL = 1 + hspi2.Init.CLKPhase = SPI_PHASE_2EDGE; // CPHA = 1 + hspi2.Init.NSS = SPI_NSS_SOFT; + hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; // 降低速度以确保稳定性 + hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi2.Init.TIMode = SPI_TIMODE_DISABLE; + hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi2.Init.CRCPolynomial = 10; + + // 确保CS初始为高电平 + HAL_GPIO_WritePin(SPI2_CS_GPIO_Port, SPI2_CS_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(SPI2_CS2_GPIO_Port, SPI2_CS2_Pin, GPIO_PIN_SET); + + if (HAL_SPI_Init(&hspi2) != HAL_OK) + { + Error_Handler(); + } } void dac161s997_spi_init(void) @@ -69,6 +74,7 @@ void ad7124_cs_on(void) { // 激活AD7124 (CS低电平有效) HAL_GPIO_WritePin(SPI2_CS_GPIO_Port, SPI2_CS_Pin, GPIO_PIN_RESET); + } void ad7124_cs_off(void)