#ifndef __AD7124_H #define __AD7124_H /******************************************************************************/ /***************************** Include Files **********************************/ /******************************************************************************/ #include "main.h" #include "user_spi.h" #include // 添加标准整型定义 /******************************************************************************/ /******************* Register map and register definitions ********************/ /******************************************************************************/ /* Communication Register bits */ #define AD7124_COMM_REG_WEN (0 << 7) #define AD7124_COMM_REG_WR (0 << 6) #define AD7124_COMM_REG_RD (1 << 6) #define AD7124_COMM_REG_RA(x) ((x) & 0x3F) /* Status Register bits */ #define AD7124_STATUS_REG_RDY (1 << 7) #define AD7124_STATUS_REG_ERROR_FLAG (1 << 6) #define AD7124_STATUS_REG_POR_FLAG (1 << 4) #define AD7124_STATUS_REG_CH_ACTIVE(x) ((x) & 0xF) /* ADC_Control Register bits */ #define AD7124_ADC_CTRL_REG_DOUT_RDY_DEL (1 << 12) #define AD7124_ADC_CTRL_REG_CONT_READ (1 << 11) #define AD7124_ADC_CTRL_REG_DATA_STATUS (1 << 10) #define AD7124_ADC_CTRL_REG_CS_EN (1 << 9) #define AD7124_ADC_CTRL_REG_REF_EN (1 << 8) #define AD7124_ADC_CTRL_REG_POWER_MODE(x) (((x) & 0x3) << 6) #define AD7124_ADC_CTRL_REG_MODE(x) (((x) & 0xF) << 2) #define AD7124_ADC_CTRL_REG_CLK_SEL(x) (((x) & 0x3) << 0) /* IO_Control_1 Register bits */ #define AD7124_IO_CTRL1_REG_GPIO_DAT2 (1 << 23) #define AD7124_IO_CTRL1_REG_GPIO_DAT1 (1 << 22) #define AD7124_IO_CTRL1_REG_GPIO_CTRL2 (1 << 19) #define AD7124_IO_CTRL1_REG_GPIO_CTRL1 (1 << 18) #define AD7124_IO_CTRL1_REG_PDSW (1 << 15) #define AD7124_IO_CTRL1_REG_IOUT1(x) (((x) & 0x7) << 11) #define AD7124_IO_CTRL1_REG_IOUT0(x) (((x) & 0x7) << 8) #define AD7124_IO_CTRL1_REG_IOUT_CH1(x) (((x) & 0xF) << 4) #define AD7124_IO_CTRL1_REG_IOUT_CH0(x) (((x) & 0xF) << 0) /* IO_Control_1 AD7124-8 specific bits */ #define AD7124_8_IO_CTRL1_REG_GPIO_DAT4 (1 << 23) #define AD7124_8_IO_CTRL1_REG_GPIO_DAT3 (1 << 22) #define AD7124_8_IO_CTRL1_REG_GPIO_DAT2 (1 << 21) #define AD7124_8_IO_CTRL1_REG_GPIO_DAT1 (1 << 20) #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL4 (1 << 19) #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL3 (1 << 18) #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL2 (1 << 17) #define AD7124_8_IO_CTRL1_REG_GPIO_CTRL1 (1 << 16) /* IO_Control_2 Register bits */ #define AD7124_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 15) #define AD7124_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 14) #define AD7124_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 11) #define AD7124_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 10) #define AD7124_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 5) #define AD7124_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 4) #define AD7124_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1) #define AD7124_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0) /* IO_Control_2 AD7124-8 specific bits */ #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15 (1 << 15) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14 (1 << 14) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13 (1 << 13) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12 (1 << 12) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11 (1 << 11) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10 (1 << 10) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9 (1 << 9) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8 (1 << 8) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 7) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 6) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 5) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 4) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 3) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 2) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1) #define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0) /* ID Register bits */ #define AD7124_ID_REG_DEVICE_ID(x) (((x) & 0xF) << 4) #define AD7124_ID_REG_SILICON_REV(x) (((x) & 0xF) << 0) /* Error Register bits */ #define AD7124_ERR_REG_LDO_CAP_ERR (1 << 19) #define AD7124_ERR_REG_ADC_CAL_ERR (1 << 18) #define AD7124_ERR_REG_ADC_CONV_ERR (1 << 17) #define AD7124_ERR_REG_ADC_SAT_ERR (1 << 16) #define AD7124_ERR_REG_AINP_OV_ERR (1 << 15) #define AD7124_ERR_REG_AINP_UV_ERR (1 << 14) #define AD7124_ERR_REG_AINM_OV_ERR (1 << 13) #define AD7124_ERR_REG_AINM_UV_ERR (1 << 12) #define AD7124_ERR_REG_REF_DET_ERR (1 << 11) #define AD7124_ERR_REG_DLDO_PSM_ERR (1 << 9) #define AD7124_ERR_REG_ALDO_PSM_ERR (1 << 7) #define AD7124_ERR_REG_SPI_IGNORE_ERR (1 << 6) #define AD7124_ERR_REG_SPI_SLCK_CNT_ERR (1 << 5) #define AD7124_ERR_REG_SPI_READ_ERR (1 << 4) #define AD7124_ERR_REG_SPI_WRITE_ERR (1 << 3) #define AD7124_ERR_REG_SPI_CRC_ERR (1 << 2) #define AD7124_ERR_REG_MM_CRC_ERR (1 << 1) #define AD7124_ERR_REG_ROM_CRC_ERR (1 << 0) /* Error_En Register bits */ #define AD7124_ERREN_REG_MCLK_CNT_EN (1 << 22) #define AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN (1 << 21) #define AD7124_ERREN_REG_LDO_CAP_CHK(x) (((x) & 0x3) << 19) #define AD7124_ERREN_REG_ADC_CAL_ERR_EN (1 << 18) #define AD7124_ERREN_REG_ADC_CONV_ERR_EN (1 << 17) #define AD7124_ERREN_REG_ADC_SAT_ERR_EN (1 << 16) #define AD7124_ERREN_REG_AINP_OV_ERR_EN (1 << 15) #define AD7124_ERREN_REG_AINP_UV_ERR_EN (1 << 14) #define AD7124_ERREN_REG_AINM_OV_ERR_EN (1 << 13) #define AD7124_ERREN_REG_AINM_UV_ERR_EN (1 << 12) #define AD7124_ERREN_REG_REF_DET_ERR_EN (1 << 11) #define AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN (1 << 10) #define AD7124_ERREN_REG_DLDO_PSM_ERR_ERR (1 << 9) #define AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN (1 << 8) #define AD7124_ERREN_REG_ALDO_PSM_ERR_EN (1 << 7) #define AD7124_ERREN_REG_SPI_IGNORE_ERR_EN (1 << 6) #define AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN (1 << 5) #define AD7124_ERREN_REG_SPI_READ_ERR_EN (1 << 4) #define AD7124_ERREN_REG_SPI_WRITE_ERR_EN (1 << 3) #define AD7124_ERREN_REG_SPI_CRC_ERR_EN (1 << 2) #define AD7124_ERREN_REG_MM_CRC_ERR_EN (1 << 1) #define AD7124_ERREN_REG_ROM_CRC_ERR_EN (1 << 0) /* Channel Registers 0-15 bits */ #define AD7124_CH_MAP_REG_CH_ENABLE (1 << 15) #define AD7124_CH_MAP_REG_SETUP(x) (((x) & 0x7) << 12) #define AD7124_CH_MAP_REG_AINP(x) (((x) & 0x1F) << 5) #define AD7124_CH_MAP_REG_AINM(x) (((x) & 0x1F) << 0) /* Configuration Registers 0-7 bits */ #define AD7124_CFG_REG_BIPOLAR (1 << 11) #define AD7124_CFG_REG_BURNOUT(x) (((x) & 0x3) << 9) #define AD7124_CFG_REG_REF_BUFP (1 << 8) #define AD7124_CFG_REG_REF_BUFM (1 << 7) #define AD7124_CFG_REG_AIN_BUFP (1 << 6) #define AD7124_CFG_REG_AINN_BUFM (1 << 5) #define AD7124_CFG_REG_REF_SEL(x) ((x) & 0x3) << 3 #define AD7124_CFG_REG_PGA(x) (((x) & 0x7) << 0) /* Filter Register 0-7 bits */ #define AD7124_FILT_REG_FILTER(x) (((x) & 0x7) << 21) #define AD7124_FILT_REG_REJ60 (1 << 20) #define AD7124_FILT_REG_POST_FILTER(x) (((x) & 0x7) << 17) #define AD7124_FILT_REG_SINGLE_CYCLE (1 << 16) #define AD7124_FILT_REG_FS(x) (((x) & 0x7FF) << 0) /******************************************************************************/ /*************************** Types Declarations *******************************/ /******************************************************************************/ /*! AD7124 registers list*/ typedef enum { AD7124_STATUS = 0X00, // 只读的状态寄存器，读取芯片状态 AD7124_ADC_CONTROL, // 控制寄存器，设置采样速率等 AD7124_DATA, // 数据寄存器，读取采样数据 AD7124_IOCON1, // 设置激励电流等参数，用作RTD测试时可用 AD7124_IOCON2, // 使能偏置电压 AD7124_ID, // ID寄存器，部分芯片的ID和手册上有所区别，可用此寄存器测试SPI通讯 AD7124_ERROR, // 错误寄存器，读取错误信息，读写寄存器之前先读下该寄存器，检测芯片状态是否支持读写 AD7124_ERROR_EN, // 通过使能该寄存器的相应位来使能或者禁用诊断功能 AD7124_MCLK_COUNT, // 监控主时钟频率 AD7124_CHANNEL_0, // 设置AD采样通道和所需要的配置，其中的Setup位决定了采用哪种Config、Filter、Offset、Gain寄存器的配置；共有八种配置 AD7124_CHANNEL_1, // 通道寄存器的顺序并不是从AI0引脚读到最后一个引脚，而是通过自己的设置来决定顺序 AD7124_CHANNEL_2, AD7124_CHANNEL_3, AD7124_CHANNEL_4, AD7124_CHANNEL_5, AD7124_CHANNEL_6, AD7124_CHANNEL_7, AD7124_CHANNEL_8, AD7124_CHANNEL_9, AD7124_CHANNEL_10, AD7124_CHANNEL_11, AD7124_CHANNEL_12, AD7124_CHANNEL_13, AD7124_CHANNEL_14, AD7124_CHANNEL_15, AD7124_CONFIG_0, // 配置极性，增益，基准选择等参数 AD7124_CONFIG_1, AD7124_CONFIG_2, AD7124_CONFIG_3, AD7124_CONFIG_4, AD7124_CONFIG_5, AD7124_CONFIG_6, AD7124_CONFIG_7, AD7124_FILTER_0, AD7124_FILTER_1, // 配置滤波器 AD7124_FILTER_2, AD7124_FILTER_3, AD7124_FILTER_4, AD7124_FILTER_5, AD7124_FILTER_6, AD7124_FILTER_7, AD7124_OFFSET_0, AD7124_OFFSET_1, AD7124_OFFSET_2, AD7124_OFFSET_3, AD7124_OFFSET_4, AD7124_OFFSET_5, AD7124_OFFSET_6, AD7124_OFFSET_7, AD7124_GAIN_0, AD7124_GAIN_1, AD7124_GAIN_2, AD7124_GAIN_3, AD7124_GAIN_4, AD7124_GAIN_5, AD7124_GAIN_6, AD7124_GAIN_7, AD7124_REG_NO } ad7124_registers_addr_e; // 寄存器地址 typedef enum { AD7124_SIZE_1 = 1, AD7124_SIZE_2 = 2, AD7124_SIZE_3 = 3, } ad7124_registers_size_e; // 寄存器字节大小 typedef enum { AD7124_RW = 1, AD7124_R = 2, AD7124_W = 3, } ad7124_registers_rw_e; // 寄存器读写操作 typedef struct { int addr; // 寄存器地址，ad7124_registers_e int value; // 寄存器值 int size; // 寄存器字节大小 int rw; // 寄存器可执行的操作，ad7124_registers_rw_e } ad7124_st_reg_t; // AD7124寄存器结构体 typedef enum { AD7124_AIN0 = 0, // AD7124_CHANNEL_EN_0 AD7124_AIN1, // AD7124_CHANNEL_EN_1 AD7124_AIN2, // AD7124_CHANNEL_EN_2 AD7124_AIN3, // AD7124_CHANNEL_EN_3 AD7124_AIN4, // AD7124_CHANNEL_EN_4 AD7124_AIN5, // AD7124_CHANNEL_EN_5 AD7124_AIN6, // AD7124_CHANNEL_EN_6 AD7124_AIN7, // AD7124_CHANNEL_EN_7 AD7124_AIN8, // AD7124_CHANNEL_EN_8 AD7124_AIN9, // AD7124_CHANNEL_EN_9 AD7124_AIN10, // AD7124_CHANNEL_EN_10 AD7124_AIN11, // AD7124_CHANNEL_EN_11 AD7124_AIN12, // AD7124_CHANNEL_EN_12 AD7124_AIN13, // AD7124_CHANNEL_EN_13 AD7124_AIN14, // AD7124_CHANNEL_EN_14 AD7124_AIN15, // AD7124_CHANNEL_EN_15 AD7124_CHANNEL_EN_MAX, } ad7124_channel_e; // 该项目所使用的通道 // 基础采样数据结构 typedef struct { uint8_t channel; int32_t data; // 采样数据 } ad7124_base_t; // 第一个AD7124的完整数据结构 typedef struct { ad7124_base_t base; float voltage; // 电压值 float current; // 电流值 // 可以添加第一个芯片特有的属性 } ad7124_analog_t; // 第二个AD7124的完整数据结构 typedef struct { ad7124_base_t base; float voltage; // 电压值 float current; // 电流值 // 可以添加第二个芯片特有的属性 } ad7124_analog2_t; #define AD7124_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */ #define AD7124_DISABLE_CRC 0 // 默认关闭校验 #define AD7124_USE_CRC 1 #define AD7124_RDY 10000 // 等待时间 #define AD7124_RES 100 // 采样基准电阻 #define VREF 2.5f // 基准电压 #define GAIN 1 // 增益，该值和配置寄存器有关 #define AD_CODE 0XFFFFFF // 24位ADC //#define AD_CODE 0x7FFFFF // 23位ADC /*! Reads the value of the specified register. */ int32_t ad7124_read_register(ad7124_st_reg_t *p_reg, uint8_t device_num); // 读寄存器 /*! Writes the value of the specified register. */ int32_t ad7124_write_register(ad7124_st_reg_t *reg, uint8_t device_num); // 写寄存器 /*! Reads the value of the specified register without a device state check. */ int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg, uint8_t device_num); /*! Writes the value of the specified register without a device state check. */ int32_t ad7124_no_check_write_register(ad7124_st_reg_t *reg, uint8_t device_num); /*! Resets the device. */ int32_t ad7124_reset(uint8_t device_num); // 复位ad7124芯片 /*! Waits until the device can accept read and write user actions. */ int32_t ad7124_wait_for_spi_ready(uint32_t timeout, uint8_t device_num); // 读取ad7124芯片状态，直到可以执行读写操作 /*! Waits until the device finishes the power-on reset operation. */ int32_t ad7124_wait_to_power_on(uint32_t timeout, uint8_t device_num); /*! Waits until a new conversion result is available. */ int32_t ad7124_wait_for_conv_ready(uint32_t timeout, uint8_t device_num); // 等待转换完成 /*! Reads the conversion result from the device. */ int32_t ad7124_read_data(uint8_t device_num); int32_t ad7124_get_analog(uint8_t channel_nr, uint8_t device_num); // 修改返回类型为int32_t /*! Initializes the AD7124. */ int32_t ad7124_setup(uint8_t device_num); int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length, uint8_t device_num); void ad7124_cs_off(uint8_t device_num); void ad7124_cs_on(uint8_t device_num); #endif /* __AD7124_H__ */