297 lines
11 KiB
C
297 lines
11 KiB
C
#ifndef __AD7124_H
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#define __AD7124_H
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/******************************************************************************/
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/***************************** Include Files **********************************/
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/******************************************************************************/
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#include "main.h"
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#include "user_spi.h"
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/******************************************************************************/
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/******************* Register map and register definitions ********************/
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/******************************************************************************/
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// 常量定义
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#define AD7124_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */
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#define AD7124_DISABLE_CRC 0
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#define AD7124_USE_CRC 1
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#define AD7124_RDY 10000
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#define AD7124_RES 100
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#define VREF 2.5f
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#define GAIN 1
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#define AD_CODE 0XFFFFFF
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/* Communication Register bits */
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#define AD7124_COMM_REG_WEN (0 << 7)
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#define AD7124_COMM_REG_WR (0 << 6)
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#define AD7124_COMM_REG_RD (1 << 6) //0x40
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#define AD7124_COMM_REG_RA(x) ((x) & 0x3F)
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/* Status Register bits */
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#define AD7124_STATUS_REG_RDY (1 << 7)
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#define AD7124_STATUS_REG_ERROR_FLAG (1 << 6)
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#define AD7124_STATUS_REG_POR_FLAG (1 << 4)
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#define AD7124_STATUS_REG_CH_ACTIVE(x) ((x) & 0xF)
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/* ADC_Control Register bits */
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#define AD7124_ADC_CTRL_REG_DOUT_RDY_DEL (1 << 12)
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#define AD7124_ADC_CTRL_REG_CONT_READ (1 << 11)
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#define AD7124_ADC_CTRL_REG_DATA_STATUS (1 << 10)
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#define AD7124_ADC_CTRL_REG_CS_EN (1 << 9)
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#define AD7124_ADC_CTRL_REG_REF_EN (1 << 8)
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#define AD7124_ADC_CTRL_REG_POWER_MODE(x) (((x) & 0x3) << 6)
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#define AD7124_ADC_CTRL_REG_MODE(x) (((x) & 0xF) << 2)
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#define AD7124_ADC_CTRL_REG_CLK_SEL(x) (((x) & 0x3) << 0)
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/* IO_Control_1 Register bits */
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#define AD7124_IO_CTRL1_REG_GPIO_DAT2 (1 << 23)
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#define AD7124_IO_CTRL1_REG_GPIO_DAT1 (1 << 22)
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#define AD7124_IO_CTRL1_REG_GPIO_CTRL2 (1 << 19)
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#define AD7124_IO_CTRL1_REG_GPIO_CTRL1 (1 << 18)
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#define AD7124_IO_CTRL1_REG_PDSW (1 << 15)
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#define AD7124_IO_CTRL1_REG_IOUT1(x) (((x) & 0x7) << 11)
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#define AD7124_IO_CTRL1_REG_IOUT0(x) (((x) & 0x7) << 8)
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#define AD7124_IO_CTRL1_REG_IOUT_CH1(x) (((x) & 0xF) << 4)
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#define AD7124_IO_CTRL1_REG_IOUT_CH0(x) (((x) & 0xF) << 0)
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/* IO_Control_1 AD7124-8 specific bits */
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#define AD7124_8_IO_CTRL1_REG_GPIO_DAT4 (1 << 23)
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#define AD7124_8_IO_CTRL1_REG_GPIO_DAT3 (1 << 22)
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#define AD7124_8_IO_CTRL1_REG_GPIO_DAT2 (1 << 21)
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#define AD7124_8_IO_CTRL1_REG_GPIO_DAT1 (1 << 20)
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#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL4 (1 << 19)
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#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL3 (1 << 18)
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#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL2 (1 << 17)
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#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL1 (1 << 16)
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/* IO_Control_2 Register bits */
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 15)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 14)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 11)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 10)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 5)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 4)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)
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/* IO_Control_2 AD7124-8 specific bits */
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15 (1 << 15)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14 (1 << 14)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13 (1 << 13)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12 (1 << 12)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11 (1 << 11)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10 (1 << 10)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9 (1 << 9)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8 (1 << 8)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 7)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 6)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 5)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 4)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 3)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 2)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)
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/* ID Register bits */
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#define AD7124_ID_REG_DEVICE_ID(x) (((x) & 0xF) << 4)
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#define AD7124_ID_REG_SILICON_REV(x) (((x) & 0xF) << 0)
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/* Error Register bits */
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#define AD7124_ERR_REG_LDO_CAP_ERR (1 << 19)
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#define AD7124_ERR_REG_ADC_CAL_ERR (1 << 18)
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#define AD7124_ERR_REG_ADC_CONV_ERR (1 << 17)
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#define AD7124_ERR_REG_ADC_SAT_ERR (1 << 16)
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#define AD7124_ERR_REG_AINP_OV_ERR (1 << 15)
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#define AD7124_ERR_REG_AINP_UV_ERR (1 << 14)
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#define AD7124_ERR_REG_AINM_OV_ERR (1 << 13)
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#define AD7124_ERR_REG_AINM_UV_ERR (1 << 12)
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#define AD7124_ERR_REG_REF_DET_ERR (1 << 11)
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#define AD7124_ERR_REG_DLDO_PSM_ERR (1 << 9)
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#define AD7124_ERR_REG_ALDO_PSM_ERR (1 << 7)
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#define AD7124_ERR_REG_SPI_IGNORE_ERR (1 << 6)
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#define AD7124_ERR_REG_SPI_SLCK_CNT_ERR (1 << 5)
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#define AD7124_ERR_REG_SPI_READ_ERR (1 << 4)
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#define AD7124_ERR_REG_SPI_WRITE_ERR (1 << 3)
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#define AD7124_ERR_REG_SPI_CRC_ERR (1 << 2)
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#define AD7124_ERR_REG_MM_CRC_ERR (1 << 1)
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#define AD7124_ERR_REG_ROM_CRC_ERR (1 << 0)
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/* Error_En Register bits */
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#define AD7124_ERREN_REG_MCLK_CNT_EN (1 << 22)
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#define AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN (1 << 21)
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#define AD7124_ERREN_REG_LDO_CAP_CHK(x) (((x) & 0x3) << 19)
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#define AD7124_ERREN_REG_ADC_CAL_ERR_EN (1 << 18)
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#define AD7124_ERREN_REG_ADC_CONV_ERR_EN (1 << 17)
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#define AD7124_ERREN_REG_ADC_SAT_ERR_EN (1 << 16)
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#define AD7124_ERREN_REG_AINP_OV_ERR_EN (1 << 15)
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#define AD7124_ERREN_REG_AINP_UV_ERR_EN (1 << 14)
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#define AD7124_ERREN_REG_AINM_OV_ERR_EN (1 << 13)
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#define AD7124_ERREN_REG_AINM_UV_ERR_EN (1 << 12)
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#define AD7124_ERREN_REG_REF_DET_ERR_EN (1 << 11)
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#define AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN (1 << 10)
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#define AD7124_ERREN_REG_DLDO_PSM_ERR_ERR (1 << 9)
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#define AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN (1 << 8)
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#define AD7124_ERREN_REG_ALDO_PSM_ERR_EN (1 << 7)
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#define AD7124_ERREN_REG_SPI_IGNORE_ERR_EN (1 << 6)
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#define AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN (1 << 5)
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#define AD7124_ERREN_REG_SPI_READ_ERR_EN (1 << 4)
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#define AD7124_ERREN_REG_SPI_WRITE_ERR_EN (1 << 3)
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#define AD7124_ERREN_REG_SPI_CRC_ERR_EN (1 << 2)
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#define AD7124_ERREN_REG_MM_CRC_ERR_EN (1 << 1)
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#define AD7124_ERREN_REG_ROM_CRC_ERR_EN (1 << 0)
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/* Channel Registers 0-15 bits */
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#define AD7124_CH_MAP_REG_CH_ENABLE (1 << 15)
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#define AD7124_CH_MAP_REG_SETUP(x) (((x) & 0x7) << 12)
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#define AD7124_CH_MAP_REG_AINP(x) (((x) & 0x1F) << 5)
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#define AD7124_CH_MAP_REG_AINM(x) (((x) & 0x1F) << 0)
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/* Configuration Registers 0-7 bits */
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#define AD7124_CFG_REG_BIPOLAR (1 << 11)
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#define AD7124_CFG_REG_BURNOUT(x) (((x) & 0x3) << 9)
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#define AD7124_CFG_REG_REF_BUFP (1 << 8)
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#define AD7124_CFG_REG_REF_BUFM (1 << 7)
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#define AD7124_CFG_REG_AIN_BUFP (1 << 6)
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#define AD7124_CFG_REG_AINN_BUFM (1 << 5)
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#define AD7124_CFG_REG_REF_SEL(x) ((x) & 0x3) << 3
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#define AD7124_CFG_REG_PGA(x) (((x) & 0x7) << 0)
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/* Filter Register 0-7 bits */
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#define AD7124_FILT_REG_FILTER(x) (((x) & 0x7) << 21)
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#define AD7124_FILT_REG_REJ60 (1 << 20)
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#define AD7124_FILT_REG_POST_FILTER(x) (((x) & 0x7) << 17)
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#define AD7124_FILT_REG_SINGLE_CYCLE (1 << 16)
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#define AD7124_FILT_REG_FS(x) (((x) & 0x7FF) << 0)
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/******************************************************************************/
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/*************************** Types Declarations *******************************/
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/******************************************************************************/
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/*! AD7124 registers list*/
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typedef enum
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{
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AD7124_STATUS = 0X00,//状态寄存器
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AD7124_ADC_CONTROL,//ADC控制寄存器
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AD7124_DATA,//数据寄存器
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AD7124_IOCON1,//IO控制寄存器1
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AD7124_IOCON2,//IO控制寄存器2
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AD7124_ID,//ID寄存器
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AD7124_ERROR,//错误寄存器
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AD7124_ERROR_EN,//错误使能寄存器
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AD7124_MCLK_COUNT,//MCLK计数寄存器
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AD7124_CHANNEL_0,//通道0
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AD7124_CHANNEL_1,//通道1
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AD7124_CHANNEL_2,//通道2
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AD7124_CHANNEL_3,//通道3
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AD7124_CHANNEL_4,//通道4
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AD7124_CHANNEL_5,//通道5
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AD7124_CHANNEL_6,//通道6
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AD7124_CHANNEL_7,//通道7
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AD7124_CHANNEL_8,//通道8
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AD7124_CHANNEL_9,//通道9
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AD7124_CHANNEL_10,//通道10
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AD7124_CHANNEL_11,//通道11
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AD7124_CHANNEL_12,//通道12
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AD7124_CHANNEL_13,//通道13
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AD7124_CHANNEL_14,//通道14
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AD7124_CHANNEL_15,//通道15
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AD7124_CONFIG_0,//配置寄存器0
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AD7124_CONFIG_1,//配置寄存器1
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AD7124_CONFIG_2,//配置寄存器2
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AD7124_CONFIG_3,//配置寄存器3
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AD7124_CONFIG_4,//配置寄存器4
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AD7124_CONFIG_5,//配置寄存器5
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AD7124_CONFIG_6,//配置寄存器6
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AD7124_CONFIG_7,//配置寄存器7
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AD7124_FILTER_0,//滤波寄存器0
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AD7124_FILTER_1,//滤波寄存器1
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AD7124_FILTER_2,//滤波寄存器2
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AD7124_FILTER_3,//滤波寄存器3
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AD7124_FILTER_4,//滤波寄存器4
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AD7124_FILTER_5,//滤波寄存器5
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AD7124_FILTER_6,//滤波寄存器6
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AD7124_FILTER_7,//滤波寄存器7
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AD7124_OFFSET_0,//偏移寄存器0
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AD7124_OFFSET_1,//偏移寄存器1
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AD7124_OFFSET_2,//偏移寄存器2
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AD7124_OFFSET_3,//偏移寄存器3
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AD7124_OFFSET_4,//偏移寄存器4
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AD7124_OFFSET_5,//偏移寄存器5
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AD7124_OFFSET_6,//偏移寄存器6
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AD7124_OFFSET_7,//偏移寄存器7
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AD7124_GAIN_0,//增益寄存器0
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AD7124_GAIN_1,//增益寄存器1
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AD7124_GAIN_2,//增益寄存器2
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AD7124_GAIN_3,//增益寄存器3
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AD7124_GAIN_4,//增益寄存器4
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AD7124_GAIN_5,//增益寄存器5
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AD7124_GAIN_6,//增益寄存器6
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AD7124_GAIN_7,//增益寄存器7
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AD7124_REG_NO//寄存器数量
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} ad7124_registers_addr_e;
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typedef enum
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{
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AD7124_SIZE_1 = 1,
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AD7124_SIZE_2 = 2,
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AD7124_SIZE_3 = 3,
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} ad7124_registers_size_e;
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typedef enum
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{
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AD7124_RW = 1,//读写
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AD7124_R = 2,//读
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AD7124_W = 3,//写
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} ad7124_registers_rw_e;
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typedef struct
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{
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int addr;
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int32_t value;
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int size;
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int rw;
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} ad7124_st_reg_t;
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typedef enum
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{
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STOP_NC_ADC = 0,
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STOP_NO_ADC,
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AI_IN1_ADC,
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AI_IN2_ADC,
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P1_DI2_ADC,
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P1_DI1_ADC,
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P1_AI_ADC,
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P2_DI2_ADC,
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P2_DI1_ADC,
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P2_AI_ADC,
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AD7124_CHANNEL_EN_MAX,
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} ad7124_channel_e;
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typedef struct
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{
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uint8_t channel;
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int32_t data;
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float voltage;
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float current;
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} ad7124_analog_t;
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// 声明外部变量
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extern ad7124_st_reg_t ad7124_regs[AD7124_REG_NO];
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extern ad7124_st_reg_t ad7124_channel_regs[AD7124_CHANNEL_EN_MAX];
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extern int32_t g_ad7124_id;
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// 函数声明
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int32_t ad7124_read_register(ad7124_st_reg_t *p_reg);
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int32_t ad7124_write_register(ad7124_st_reg_t *reg);
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int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg);
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int32_t ad7124_no_check_write_register(ad7124_st_reg_t *reg);
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int32_t ad7124_reset(void);
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int32_t ad7124_wait_for_spi_ready(uint32_t timeout);
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int32_t ad7124_wait_to_power_on(uint32_t timeout);
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int32_t ad7124_wait_for_conv_ready(uint32_t timeout);
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int32_t ad7124_read_data(void);
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void ad7124_get_analog(uint8_t channel_nr);
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int32_t ad7124_setup(void);
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int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length);
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#endif /* __AD7124_H */
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