335 lines
13 KiB
C
335 lines
13 KiB
C
#ifndef __AD7124_H
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#define __AD7124_H
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/******************************************************************************/
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/***************************** Include Files **********************************/
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/******************************************************************************/
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#include "main.h"
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#include "user_spi.h"
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#include <stdint.h> // 添加标准整型定义
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/******************************************************************************/
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/******************* Register map and register definitions ********************/
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/******************************************************************************/
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/* Communication Register bits */
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#define AD7124_COMM_REG_WEN (0 << 7)
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#define AD7124_COMM_REG_WR (0 << 6)
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#define AD7124_COMM_REG_RD (1 << 6)
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#define AD7124_COMM_REG_RA(x) ((x) & 0x3F)
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/* Status Register bits */
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#define AD7124_STATUS_REG_RDY (1 << 7)
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#define AD7124_STATUS_REG_ERROR_FLAG (1 << 6)
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#define AD7124_STATUS_REG_POR_FLAG (1 << 4)
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#define AD7124_STATUS_REG_CH_ACTIVE(x) ((x) & 0xF)
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/* ADC_Control Register bits */
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#define AD7124_ADC_CTRL_REG_DOUT_RDY_DEL (1 << 12)
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#define AD7124_ADC_CTRL_REG_CONT_READ (1 << 11)
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#define AD7124_ADC_CTRL_REG_DATA_STATUS (1 << 10)
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#define AD7124_ADC_CTRL_REG_CS_EN (1 << 9)
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#define AD7124_ADC_CTRL_REG_REF_EN (1 << 8)
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#define AD7124_ADC_CTRL_REG_POWER_MODE(x) (((x) & 0x3) << 6)
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#define AD7124_ADC_CTRL_REG_MODE(x) (((x) & 0xF) << 2)
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#define AD7124_ADC_CTRL_REG_CLK_SEL(x) (((x) & 0x3) << 0)
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/* IO_Control_1 Register bits */
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#define AD7124_IO_CTRL1_REG_GPIO_DAT2 (1 << 23)
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#define AD7124_IO_CTRL1_REG_GPIO_DAT1 (1 << 22)
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#define AD7124_IO_CTRL1_REG_GPIO_CTRL2 (1 << 19)
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#define AD7124_IO_CTRL1_REG_GPIO_CTRL1 (1 << 18)
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#define AD7124_IO_CTRL1_REG_PDSW (1 << 15)
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#define AD7124_IO_CTRL1_REG_IOUT1(x) (((x) & 0x7) << 11)
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#define AD7124_IO_CTRL1_REG_IOUT0(x) (((x) & 0x7) << 8)
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#define AD7124_IO_CTRL1_REG_IOUT_CH1(x) (((x) & 0xF) << 4)
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#define AD7124_IO_CTRL1_REG_IOUT_CH0(x) (((x) & 0xF) << 0)
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/* IO_Control_1 AD7124-8 specific bits */
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#define AD7124_8_IO_CTRL1_REG_GPIO_DAT4 (1 << 23)
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#define AD7124_8_IO_CTRL1_REG_GPIO_DAT3 (1 << 22)
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#define AD7124_8_IO_CTRL1_REG_GPIO_DAT2 (1 << 21)
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#define AD7124_8_IO_CTRL1_REG_GPIO_DAT1 (1 << 20)
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#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL4 (1 << 19)
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#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL3 (1 << 18)
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#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL2 (1 << 17)
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#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL1 (1 << 16)
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/* IO_Control_2 Register bits */
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 15)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 14)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 11)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 10)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 5)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 4)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)
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#define AD7124_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)
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/* IO_Control_2 AD7124-8 specific bits */
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15 (1 << 15)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14 (1 << 14)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13 (1 << 13)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12 (1 << 12)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11 (1 << 11)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10 (1 << 10)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9 (1 << 9)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8 (1 << 8)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 7)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 6)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 5)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 4)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 3)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 2)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)
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#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)
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/* ID Register bits */
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#define AD7124_ID_REG_DEVICE_ID(x) (((x) & 0xF) << 4)
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#define AD7124_ID_REG_SILICON_REV(x) (((x) & 0xF) << 0)
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/* Error Register bits */
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#define AD7124_ERR_REG_LDO_CAP_ERR (1 << 19)
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#define AD7124_ERR_REG_ADC_CAL_ERR (1 << 18)
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#define AD7124_ERR_REG_ADC_CONV_ERR (1 << 17)
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#define AD7124_ERR_REG_ADC_SAT_ERR (1 << 16)
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#define AD7124_ERR_REG_AINP_OV_ERR (1 << 15)
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#define AD7124_ERR_REG_AINP_UV_ERR (1 << 14)
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#define AD7124_ERR_REG_AINM_OV_ERR (1 << 13)
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#define AD7124_ERR_REG_AINM_UV_ERR (1 << 12)
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#define AD7124_ERR_REG_REF_DET_ERR (1 << 11)
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#define AD7124_ERR_REG_DLDO_PSM_ERR (1 << 9)
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#define AD7124_ERR_REG_ALDO_PSM_ERR (1 << 7)
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#define AD7124_ERR_REG_SPI_IGNORE_ERR (1 << 6)
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#define AD7124_ERR_REG_SPI_SLCK_CNT_ERR (1 << 5)
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#define AD7124_ERR_REG_SPI_READ_ERR (1 << 4)
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#define AD7124_ERR_REG_SPI_WRITE_ERR (1 << 3)
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#define AD7124_ERR_REG_SPI_CRC_ERR (1 << 2)
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#define AD7124_ERR_REG_MM_CRC_ERR (1 << 1)
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#define AD7124_ERR_REG_ROM_CRC_ERR (1 << 0)
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/* Error_En Register bits */
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#define AD7124_ERREN_REG_MCLK_CNT_EN (1 << 22)
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#define AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN (1 << 21)
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#define AD7124_ERREN_REG_LDO_CAP_CHK(x) (((x) & 0x3) << 19)
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#define AD7124_ERREN_REG_ADC_CAL_ERR_EN (1 << 18)
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#define AD7124_ERREN_REG_ADC_CONV_ERR_EN (1 << 17)
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#define AD7124_ERREN_REG_ADC_SAT_ERR_EN (1 << 16)
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#define AD7124_ERREN_REG_AINP_OV_ERR_EN (1 << 15)
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#define AD7124_ERREN_REG_AINP_UV_ERR_EN (1 << 14)
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#define AD7124_ERREN_REG_AINM_OV_ERR_EN (1 << 13)
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#define AD7124_ERREN_REG_AINM_UV_ERR_EN (1 << 12)
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#define AD7124_ERREN_REG_REF_DET_ERR_EN (1 << 11)
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#define AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN (1 << 10)
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#define AD7124_ERREN_REG_DLDO_PSM_ERR_ERR (1 << 9)
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#define AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN (1 << 8)
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#define AD7124_ERREN_REG_ALDO_PSM_ERR_EN (1 << 7)
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#define AD7124_ERREN_REG_SPI_IGNORE_ERR_EN (1 << 6)
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#define AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN (1 << 5)
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#define AD7124_ERREN_REG_SPI_READ_ERR_EN (1 << 4)
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#define AD7124_ERREN_REG_SPI_WRITE_ERR_EN (1 << 3)
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#define AD7124_ERREN_REG_SPI_CRC_ERR_EN (1 << 2)
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#define AD7124_ERREN_REG_MM_CRC_ERR_EN (1 << 1)
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#define AD7124_ERREN_REG_ROM_CRC_ERR_EN (1 << 0)
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/* Channel Registers 0-15 bits */
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#define AD7124_CH_MAP_REG_CH_ENABLE (1 << 15)
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#define AD7124_CH_MAP_REG_SETUP(x) (((x) & 0x7) << 12)
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#define AD7124_CH_MAP_REG_AINP(x) (((x) & 0x1F) << 5)
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#define AD7124_CH_MAP_REG_AINM(x) (((x) & 0x1F) << 0)
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/* Configuration Registers 0-7 bits */
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#define AD7124_CFG_REG_BIPOLAR (1 << 11)
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#define AD7124_CFG_REG_BURNOUT(x) (((x) & 0x3) << 9)
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#define AD7124_CFG_REG_REF_BUFP (1 << 8)
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#define AD7124_CFG_REG_REF_BUFM (1 << 7)
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#define AD7124_CFG_REG_AIN_BUFP (1 << 6)
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#define AD7124_CFG_REG_AINN_BUFM (1 << 5)
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#define AD7124_CFG_REG_REF_SEL(x) ((x) & 0x3) << 3
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#define AD7124_CFG_REG_PGA(x) (((x) & 0x7) << 0)
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/* Filter Register 0-7 bits */
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#define AD7124_FILT_REG_FILTER(x) (((x) & 0x7) << 21)
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#define AD7124_FILT_REG_REJ60 (1 << 20)
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#define AD7124_FILT_REG_POST_FILTER(x) (((x) & 0x7) << 17)
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#define AD7124_FILT_REG_SINGLE_CYCLE (1 << 16)
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#define AD7124_FILT_REG_FS(x) (((x) & 0x7FF) << 0)
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/******************************************************************************/
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/*************************** Types Declarations *******************************/
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/******************************************************************************/
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/*! AD7124 registers list*/
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typedef enum
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{
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AD7124_STATUS = 0X00, // 只读的状态寄存器，读取芯片状态
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AD7124_ADC_CONTROL, // 控制寄存器，设置采样速率等
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AD7124_DATA, // 数据寄存器，读取采样数据
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AD7124_IOCON1, // 设置激励电流等参数，用作RTD测试时可用
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AD7124_IOCON2, // 使能偏置电压
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AD7124_ID, // ID寄存器，部分芯片的ID和手册上有所区别，可用此寄存器测试SPI通讯
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AD7124_ERROR, // 错误寄存器，读取错误信息，读写寄存器之前先读下该寄存器，检测芯片状态是否支持读写
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AD7124_ERROR_EN, // 通过使能该寄存器的相应位来使能或者禁用诊断功能
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AD7124_MCLK_COUNT, // 监控主时钟频率
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AD7124_CHANNEL_0, // 设置AD采样通道和所需要的配置，其中的Setup位决定了采用哪种Config、Filter、Offset、Gain寄存器的配置；共有八种配置
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AD7124_CHANNEL_1, // 通道寄存器的顺序并不是从AI0引脚读到最后一个引脚，而是通过自己的设置来决定顺序
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AD7124_CHANNEL_2,
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AD7124_CHANNEL_3,
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AD7124_CHANNEL_4,
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AD7124_CHANNEL_5,
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AD7124_CHANNEL_6,
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AD7124_CHANNEL_7,
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AD7124_CHANNEL_8,
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AD7124_CHANNEL_9,
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AD7124_CHANNEL_10,
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AD7124_CHANNEL_11,
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AD7124_CHANNEL_12,
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AD7124_CHANNEL_13,
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AD7124_CHANNEL_14,
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AD7124_CHANNEL_15,
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AD7124_CONFIG_0, // 配置极性，增益，基准选择等参数
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AD7124_CONFIG_1,
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AD7124_CONFIG_2,
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AD7124_CONFIG_3,
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AD7124_CONFIG_4,
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AD7124_CONFIG_5,
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AD7124_CONFIG_6,
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AD7124_CONFIG_7,
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AD7124_FILTER_0,
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AD7124_FILTER_1, // 配置滤波器
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AD7124_FILTER_2,
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AD7124_FILTER_3,
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AD7124_FILTER_4,
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AD7124_FILTER_5,
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AD7124_FILTER_6,
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AD7124_FILTER_7,
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AD7124_OFFSET_0,
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AD7124_OFFSET_1,
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AD7124_OFFSET_2,
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AD7124_OFFSET_3,
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AD7124_OFFSET_4,
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AD7124_OFFSET_5,
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AD7124_OFFSET_6,
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AD7124_OFFSET_7,
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AD7124_GAIN_0,
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AD7124_GAIN_1,
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AD7124_GAIN_2,
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AD7124_GAIN_3,
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AD7124_GAIN_4,
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AD7124_GAIN_5,
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AD7124_GAIN_6,
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AD7124_GAIN_7,
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AD7124_REG_NO
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} ad7124_registers_addr_e; // 寄存器地址
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typedef enum
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{
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AD7124_SIZE_1 = 1,
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AD7124_SIZE_2 = 2,
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AD7124_SIZE_3 = 3,
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} ad7124_registers_size_e; // 寄存器字节大小
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typedef enum
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{
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AD7124_RW = 1,
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AD7124_R = 2,
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AD7124_W = 3,
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} ad7124_registers_rw_e; // 寄存器读写操作
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typedef struct
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{
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int addr; // 寄存器地址，ad7124_registers_e
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int value; // 寄存器值
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int size; // 寄存器字节大小
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int rw; // 寄存器可执行的操作，ad7124_registers_rw_e
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} ad7124_st_reg_t; // AD7124寄存器结构体
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typedef enum
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{
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AD7124_AIN0 = 0, // AD7124_CHANNEL_EN_0
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AD7124_AIN1, // AD7124_CHANNEL_EN_1
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AD7124_AIN2, // AD7124_CHANNEL_EN_2
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AD7124_AIN3, // AD7124_CHANNEL_EN_3
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AD7124_AIN4, // AD7124_CHANNEL_EN_4
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AD7124_AIN5, // AD7124_CHANNEL_EN_5
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AD7124_AIN6, // AD7124_CHANNEL_EN_6
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AD7124_AIN7, // AD7124_CHANNEL_EN_7
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AD7124_AIN8, // AD7124_CHANNEL_EN_8
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AD7124_AIN9, // AD7124_CHANNEL_EN_9
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AD7124_AIN10, // AD7124_CHANNEL_EN_10
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AD7124_AIN11, // AD7124_CHANNEL_EN_11
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AD7124_AIN12, // AD7124_CHANNEL_EN_12
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AD7124_AIN13, // AD7124_CHANNEL_EN_13
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AD7124_AIN14, // AD7124_CHANNEL_EN_14
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AD7124_AIN15, // AD7124_CHANNEL_EN_15
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AD7124_CHANNEL_EN_MAX,
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} ad7124_channel_e; // 该项目所使用的通道
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// 基础采样数据结构
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typedef struct {
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uint8_t channel;
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int32_t data; // 采样数据
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} ad7124_base_t;
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// 第一个AD7124的完整数据结构
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typedef struct {
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ad7124_base_t base;
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float voltage; // 电压值
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float current; // 电流值
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// 可以添加第一个芯片特有的属性
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} ad7124_analog_t;
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// 第二个AD7124的完整数据结构
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typedef struct {
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ad7124_base_t base;
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float voltage; // 电压值
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float current; // 电流值
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// 可以添加第二个芯片特有的属性
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} ad7124_analog2_t;
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#define AD7124_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */
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#define AD7124_DISABLE_CRC 0 // 默认关闭校验
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#define AD7124_USE_CRC 1
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#define AD7124_RDY 10000 // 等待时间
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#define AD7124_RES 100 // 采样基准电阻
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#define VREF 2.5f // 基准电压
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#define GAIN 1 // 增益，该值和配置寄存器有关
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#define AD_CODE 0XFFFFFF // 24位ADC
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//#define AD_CODE 0x7FFFFF // 23位ADC
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/*! Reads the value of the specified register. */
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int32_t ad7124_read_register(ad7124_st_reg_t *p_reg, uint8_t device_num); // 读寄存器
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/*! Writes the value of the specified register. */
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int32_t ad7124_write_register(ad7124_st_reg_t *reg, uint8_t device_num); // 写寄存器
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/*! Reads the value of the specified register without a device state check. */
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int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg, uint8_t device_num);
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/*! Writes the value of the specified register without a device state check. */
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int32_t ad7124_no_check_write_register(ad7124_st_reg_t *reg, uint8_t device_num);
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/*! Resets the device. */
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int32_t ad7124_reset(uint8_t device_num); // 复位ad7124芯片
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/*! Waits until the device can accept read and write user actions. */
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int32_t ad7124_wait_for_spi_ready(uint32_t timeout, uint8_t device_num); // 读取ad7124芯片状态，直到可以执行读写操作
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/*! Waits until the device finishes the power-on reset operation. */
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int32_t ad7124_wait_to_power_on(uint32_t timeout, uint8_t device_num);
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/*! Waits until a new conversion result is available. */
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int32_t ad7124_wait_for_conv_ready(uint32_t timeout, uint8_t device_num); // 等待转换完成
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/*! Reads the conversion result from the device. */
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int32_t ad7124_read_data(uint8_t device_num);
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int32_t ad7124_get_analog(uint8_t channel_nr, uint8_t device_num); // 修改返回类型为int32_t
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/*! Initializes the AD7124. */
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int32_t ad7124_setup(uint8_t device_num);
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int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length, uint8_t device_num);
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void ad7124_cs_off(uint8_t device_num);
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void ad7124_cs_on(uint8_t device_num);
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#endif /* __AD7124_H__ */
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