Implement DMA for USART1 reception and update FreeRTOS configuration
- Modified shell_port.c to replace interrupt-based UART reception with DMA. - Introduced a DMA buffer for UART data and adjusted the shell buffer handling. - Added idle interrupt handling to process incoming data from the DMA buffer. - Updated freertos_f407.ioc to configure DMA for USART1 RX and TX. - Enabled necessary NVIC interrupts for DMA streams associated with USART1.
This commit is contained in:
xushenghao
parent
9f37c7d763
commit
21e9d75e40
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@ -54,9 +54,11 @@ void UsageFault_Handler(void);
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void DebugMon_Handler(void);
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void USART1_IRQHandler(void);
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void TIM6_DAC_IRQHandler(void);
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void DMA2_Stream2_IRQHandler(void);
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void DMA2_Stream3_IRQHandler(void);
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void OTG_FS_IRQHandler(void);
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void DMA2_Stream6_IRQHandler(void);
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void DMA2_Stream7_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE END EFP */
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@ -43,12 +43,18 @@ void MX_DMA_Init(void)
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__HAL_RCC_DMA2_CLK_ENABLE();
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/* DMA interrupt init */
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/* DMA2_Stream2_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
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/* DMA2_Stream3_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 15, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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/* DMA2_Stream6_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 15, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
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/* DMA2_Stream7_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
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}
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@ -58,6 +58,8 @@
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extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
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extern DMA_HandleTypeDef hdma_sdio_rx;
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extern DMA_HandleTypeDef hdma_sdio_tx;
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extern DMA_HandleTypeDef hdma_usart1_rx;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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extern UART_HandleTypeDef huart1;
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extern TIM_HandleTypeDef htim6;
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@ -169,7 +171,13 @@ void DebugMon_Handler(void)
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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// 璉?<3F>亦征<E4BAA6>脖葉<E88496>剜<EFBFBD>敹?
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if (__HAL_UART_GET_FLAG(&huart1, UART_FLAG_IDLE))
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{
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__HAL_UART_CLEAR_IDLEFLAG(&huart1);
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extern void shell_uart_rx_idle_callback(void);
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shell_uart_rx_idle_callback();
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}
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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/* USER CODE BEGIN USART1_IRQn 1 */
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@ -191,6 +199,20 @@ void TIM6_DAC_IRQHandler(void)
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/* USER CODE END TIM6_DAC_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream2 global interrupt.
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*/
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void DMA2_Stream2_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
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/* USER CODE END DMA2_Stream2_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_rx);
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/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
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/* USER CODE END DMA2_Stream2_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream3 global interrupt.
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*/
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@ -231,6 +253,20 @@ void DMA2_Stream6_IRQHandler(void)
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/* USER CODE END DMA2_Stream6_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream7 global interrupt.
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*/
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void DMA2_Stream7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
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/* USER CODE END DMA2_Stream7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_tx);
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/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
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/* USER CODE END DMA2_Stream7_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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@ -25,6 +25,8 @@
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/* USER CODE END 0 */
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UART_HandleTypeDef huart1;
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DMA_HandleTypeDef hdma_usart1_rx;
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DMA_HandleTypeDef hdma_usart1_tx;
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/* USART1 init function */
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@ -80,6 +82,43 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
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GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* USART1 DMA Init */
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/* USART1_RX Init */
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hdma_usart1_rx.Instance = DMA2_Stream2;
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hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4;
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hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_usart1_rx.Init.Mode = DMA_NORMAL;
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hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
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hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
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{
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Error_Handler();
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}
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__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx);
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/* USART1_TX Init */
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hdma_usart1_tx.Instance = DMA2_Stream7;
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hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4;
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hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_usart1_tx.Init.Mode = DMA_NORMAL;
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hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
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hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
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{
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Error_Handler();
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}
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__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx);
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/* USART1 interrupt Init */
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HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(USART1_IRQn);
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@ -106,6 +145,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
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/* USART1 DMA DeInit */
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HAL_DMA_DeInit(uartHandle->hdmarx);
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HAL_DMA_DeInit(uartHandle->hdmatx);
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/* USART1 interrupt Deinit */
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HAL_NVIC_DisableIRQ(USART1_IRQn);
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/* USER CODE BEGIN USART1_MspDeInit 1 */
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File diff suppressed because it is too large
Load Diff
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@ -17,12 +17,14 @@ char shellBuffer[512];
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static SemaphoreHandle_t shellMutex;
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// 串口接收缓冲区（环形队列）
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// DMA接收缓冲区和shell环形缓冲区
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#define SHELL_UART_DMA_BUF_SIZE 256
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#define SHELL_UART_RX_BUF_SIZE 128
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static uint8_t shell_uart_dma_buf[SHELL_UART_DMA_BUF_SIZE];
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static uint8_t shell_uart_rx_buf[SHELL_UART_RX_BUF_SIZE];
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static volatile uint16_t shell_uart_rx_head = 0;
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static volatile uint16_t shell_uart_rx_tail = 0;
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static uint8_t shell_uart_rx_temp;
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static volatile uint16_t shell_uart_dma_last_pos = 0;
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/**
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* @brief 用户shell写
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@ -106,8 +108,10 @@ void userShellInit(void)
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shell.unlock = userShellUnlock;
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shellInit(&shell, shellBuffer, 512);
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// 启动串口中断接收
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HAL_UART_Receive_IT(&huart1, &shell_uart_rx_temp, 1);
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// 启动DMA接收
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HAL_UART_Receive_DMA(&huart1, shell_uart_dma_buf, SHELL_UART_DMA_BUF_SIZE);
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// 使能空闲中断
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__HAL_UART_ENABLE_IT(&huart1, UART_IT_IDLE);
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xTaskCreate((TaskFunction_t)shellTask, // 任务入口函数
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(const char *)"shell_task", // 任务名字
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@ -117,19 +121,21 @@ void userShellInit(void)
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NULL); // 任务句柄
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}
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// 串口接收完成回调（在 usart.c 里实现也可）
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void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
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// USART1 空闲中断处理（DMA新数据转入shell缓冲区）
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void shell_uart_rx_idle_callback(void)
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{
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if (huart->Instance == USART1)
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uint16_t dma_pos = SHELL_UART_DMA_BUF_SIZE - __HAL_DMA_GET_COUNTER(huart1.hdmarx);
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uint16_t data_len = (dma_pos >= shell_uart_dma_last_pos) ? (dma_pos - shell_uart_dma_last_pos) : (SHELL_UART_DMA_BUF_SIZE - shell_uart_dma_last_pos + dma_pos);
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for (uint16_t i = 0; i < data_len; i++)
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{
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uint8_t ch = shell_uart_dma_buf[(shell_uart_dma_last_pos + i) % SHELL_UART_DMA_BUF_SIZE];
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uint16_t next = (shell_uart_rx_head + 1) % SHELL_UART_RX_BUF_SIZE;
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if (next != shell_uart_rx_tail)
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{
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shell_uart_rx_buf[shell_uart_rx_head] = shell_uart_rx_temp;
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shell_uart_rx_buf[shell_uart_rx_head] = ch;
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shell_uart_rx_head = next;
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}
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// 继续接收下一个字节
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HAL_UART_Receive_IT(&huart1, &shell_uart_rx_temp, 1);
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}
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shell_uart_dma_last_pos = dma_pos;
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}
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// CEVENT_EXPORT(EVENT_INIT_STAGE2, userShellInit);
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@ -4,7 +4,9 @@ CAD.pinconfig=
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CAD.provider=
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Dma.Request0=SDIO_RX
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Dma.Request1=SDIO_TX
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Dma.RequestsNb=2
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Dma.Request2=USART1_RX
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Dma.Request3=USART1_TX
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Dma.RequestsNb=4
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Dma.SDIO_RX.0.Direction=DMA_PERIPH_TO_MEMORY
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Dma.SDIO_RX.0.FIFOMode=DMA_FIFOMODE_ENABLE
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Dma.SDIO_RX.0.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
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@ -31,6 +33,26 @@ Dma.SDIO_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_WORD
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Dma.SDIO_TX.1.PeriphInc=DMA_PINC_DISABLE
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Dma.SDIO_TX.1.Priority=DMA_PRIORITY_LOW
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Dma.SDIO_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
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Dma.USART1_RX.2.Direction=DMA_PERIPH_TO_MEMORY
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Dma.USART1_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.USART1_RX.2.Instance=DMA2_Stream2
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Dma.USART1_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Dma.USART1_RX.2.MemInc=DMA_MINC_ENABLE
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Dma.USART1_RX.2.Mode=DMA_NORMAL
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Dma.USART1_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Dma.USART1_RX.2.PeriphInc=DMA_PINC_DISABLE
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Dma.USART1_RX.2.Priority=DMA_PRIORITY_LOW
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Dma.USART1_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
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Dma.USART1_TX.3.Direction=DMA_MEMORY_TO_PERIPH
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Dma.USART1_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.USART1_TX.3.Instance=DMA2_Stream7
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Dma.USART1_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Dma.USART1_TX.3.MemInc=DMA_MINC_ENABLE
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Dma.USART1_TX.3.Mode=DMA_NORMAL
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Dma.USART1_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Dma.USART1_TX.3.PeriphInc=DMA_PINC_DISABLE
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Dma.USART1_TX.3.Priority=DMA_PRIORITY_LOW
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Dma.USART1_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
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FATFS.BSP.number=1
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FATFS.IPParameters=_CODE_PAGE,_USE_LFN,_VOLUMES
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FATFS._CODE_PAGE=936
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@ -105,8 +127,10 @@ Mcu.UserName=STM32F407ZGTx
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MxCube.Version=6.9.2
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MxDb.Version=DB.6.0.92
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream3_IRQn=true\:15\:0\:true\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream6_IRQn=true\:15\:0\:true\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.ForceEnableDMAVector=true
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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