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许晟昊 2024-12-16 22:49:09 +08:00
parent 9f1717211d
commit e4c3e59332
46 changed files with 9183 additions and 767 deletions
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8
.mxproject
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@ -1,14 +1,14 @@
[PreviousLibFiles] [PreviousLibFiles]
LibFiles=Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_utils.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; LibFiles=Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_adc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_tim.h;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_utils.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_adc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_tim.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f407xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
[PreviousUsedKeilFiles] [PreviousUsedKeilFiles]
SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\tim.c;..\Src\stm32f4xx_it.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_utils.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c;..\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;..\\Src\system_stm32f4xx.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_utils.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c;..\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;..\\Src\system_stm32f4xx.c;;; SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\adc.c;..\Src\dma.c;..\Src\tim.c;..\Src\stm32f4xx_it.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_utils.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c;..\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;..\\Src\system_stm32f4xx.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_gpio.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_dma.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_rcc.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_utils.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_exti.c;..\Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_tim.c;..\Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;..\\Src\system_stm32f4xx.c;;;
HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc; HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc;
CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:1;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32F407xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:1;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1; CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:1;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32F407xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:1;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
[PreviousGenFiles] [PreviousGenFiles]
HeaderPath=..\Inc HeaderPath=..\Inc
HeaderFiles=gpio.h;tim.h;stm32f4xx_it.h;stm32_assert.h;main.h; HeaderFiles=gpio.h;adc.h;dma.h;tim.h;stm32f4xx_it.h;stm32_assert.h;main.h;
SourcePath=..\Src SourcePath=..\Src
SourceFiles=gpio.c;tim.c;stm32f4xx_it.c;main.c; SourceFiles=gpio.c;adc.c;dma.c;tim.c;stm32f4xx_it.c;main.c;

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.vscode/c_cpp_properties.json vendored
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"intelliSenseMode": "windows-gcc-x64", "intelliSenseMode": "windows-gcc-x64",
"compilerArgs": [ "compilerArgs": [
"" ""
] ],
"configurationProvider": "cl.eide"
} }
], ],
"version": 4 "version": 4

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.vscode/launch.json vendored
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@ -1,6 +1,8 @@
{ {
"version": "0.2.0", "version": "0.2.0",
"configurations": [ "configurations": [
{ {
"name": "C/C++ Runner: Debug Session", "name": "C/C++ Runner: Debug Session",
"type": "cppdbg", "type": "cppdbg",

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Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_adc.h Normal file
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Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.c Normal file
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/**
******************************************************************************
* @file stm32f4xx_ll_adc.c
* @author MCD Application Team
* @brief ADC LL module driver
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
#if defined(USE_FULL_LL_DRIVER)
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_ll_adc.h"
#include "stm32f4xx_ll_bus.h"
#ifdef USE_FULL_ASSERT
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
/** @addtogroup STM32F4xx_LL_Driver
* @{
*/
#if defined (ADC1) || defined (ADC2) || defined (ADC3)
/** @addtogroup ADC_LL ADC
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup ADC_LL_Private_Macros
* @{
*/
/* Check of parameters for configuration of ADC hierarchical scope: */
/* common to several ADC instances. */
#define IS_LL_ADC_COMMON_CLOCK(__CLOCK__) \
( ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV2) \
|| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV4) \
|| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV6) \
|| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV8) \
)
/* Check of parameters for configuration of ADC hierarchical scope: */
/* ADC instance. */
#define IS_LL_ADC_RESOLUTION(__RESOLUTION__) \
( ((__RESOLUTION__) == LL_ADC_RESOLUTION_12B) \
|| ((__RESOLUTION__) == LL_ADC_RESOLUTION_10B) \
|| ((__RESOLUTION__) == LL_ADC_RESOLUTION_8B) \
|| ((__RESOLUTION__) == LL_ADC_RESOLUTION_6B) \
)
#define IS_LL_ADC_DATA_ALIGN(__DATA_ALIGN__) \
( ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_RIGHT) \
|| ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_LEFT) \
)
#define IS_LL_ADC_SCAN_SELECTION(__SCAN_SELECTION__) \
( ((__SCAN_SELECTION__) == LL_ADC_SEQ_SCAN_DISABLE) \
|| ((__SCAN_SELECTION__) == LL_ADC_SEQ_SCAN_ENABLE) \
)
#define IS_LL_ADC_SEQ_SCAN_MODE(__SEQ_SCAN_MODE__) \
( ((__SCAN_MODE__) == LL_ADC_SEQ_SCAN_DISABLE) \
|| ((__SCAN_MODE__) == LL_ADC_SEQ_SCAN_ENABLE) \
)
/* Check of parameters for configuration of ADC hierarchical scope: */
/* ADC group regular */
#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__) \
( ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH1) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH2) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH3) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH2) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH3) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH4) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_CH1) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM4_CH4) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH1) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH2) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH3) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM8_CH1) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM8_TRGO) \
|| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11) \
)
#define IS_LL_ADC_REG_CONTINUOUS_MODE(__REG_CONTINUOUS_MODE__) \
( ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_SINGLE) \
|| ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_CONTINUOUS) \
)
#define IS_LL_ADC_REG_DMA_TRANSFER(__REG_DMA_TRANSFER__) \
( ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_NONE) \
|| ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_LIMITED) \
|| ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_UNLIMITED) \
)
#define IS_LL_ADC_REG_FLAG_EOC_SELECTION(__REG_FLAG_EOC_SELECTION__) \
( ((__REG_FLAG_EOC_SELECTION__) == LL_ADC_REG_FLAG_EOC_SEQUENCE_CONV) \
|| ((__REG_FLAG_EOC_SELECTION__) == LL_ADC_REG_FLAG_EOC_UNITARY_CONV) \
)
#define IS_LL_ADC_REG_SEQ_SCAN_LENGTH(__REG_SEQ_SCAN_LENGTH__) \
( ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_DISABLE) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS) \
|| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS) \
)
#define IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(__REG_SEQ_DISCONT_MODE__) \
( ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_DISABLE) \
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_1RANK) \
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_2RANKS) \
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_3RANKS) \
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_4RANKS) \
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_5RANKS) \
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_6RANKS) \
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_7RANKS) \
|| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_8RANKS) \
)
/* Check of parameters for configuration of ADC hierarchical scope: */
/* ADC group injected */
#define IS_LL_ADC_INJ_TRIG_SOURCE(__INJ_TRIG_SOURCE__) \
( ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_SOFTWARE) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM1_CH4) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM1_TRGO) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM2_CH1) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM2_TRGO) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM3_CH2) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM3_CH4) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH1) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH2) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH3) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_TRGO) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM5_CH4) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM5_TRGO) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH2) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH3) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH4) \
|| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_EXTI_LINE15) \
)
#define IS_LL_ADC_INJ_TRIG_EXT_EDGE(__INJ_TRIG_EXT_EDGE__) \
( ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_RISING) \
|| ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_FALLING) \
|| ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_RISINGFALLING) \
)
#define IS_LL_ADC_INJ_TRIG_AUTO(__INJ_TRIG_AUTO__) \
( ((__INJ_TRIG_AUTO__) == LL_ADC_INJ_TRIG_INDEPENDENT) \
|| ((__INJ_TRIG_AUTO__) == LL_ADC_INJ_TRIG_FROM_GRP_REGULAR) \
)
#define IS_LL_ADC_INJ_SEQ_SCAN_LENGTH(__INJ_SEQ_SCAN_LENGTH__) \
( ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_DISABLE) \
|| ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS) \
|| ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS) \
|| ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS) \
)
#define IS_LL_ADC_INJ_SEQ_SCAN_DISCONT_MODE(__INJ_SEQ_DISCONT_MODE__) \
( ((__INJ_SEQ_DISCONT_MODE__) == LL_ADC_INJ_SEQ_DISCONT_DISABLE) \
|| ((__INJ_SEQ_DISCONT_MODE__) == LL_ADC_INJ_SEQ_DISCONT_1RANK) \
)
#if defined(ADC_MULTIMODE_SUPPORT)
/* Check of parameters for configuration of ADC hierarchical scope: */
/* multimode. */
#if defined(ADC3)
#define IS_LL_ADC_MULTI_MODE(__MULTI_MODE__) \
( ((__MULTI_MODE__) == LL_ADC_MULTI_INDEPENDENT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIMULT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INTERL) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_SIMULT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_ALTERN) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIM_INJ_SIM) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIM_INJ_ALT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_INJ_SIMULT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIMULT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_INTERL) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_INJ_ALTERN) \
)
#else
#define IS_LL_ADC_MULTI_MODE(__MULTI_MODE__) \
( ((__MULTI_MODE__) == LL_ADC_MULTI_INDEPENDENT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIMULT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INTERL) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_SIMULT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_ALTERN) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT) \
|| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM) \
)
#endif
#define IS_LL_ADC_MULTI_DMA_TRANSFER(__MULTI_DMA_TRANSFER__) \
( ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_EACH_ADC) \
|| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_1) \
|| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_2) \
|| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_3) \
|| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_1) \
|| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_2) \
|| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_3) \
)
#define IS_LL_ADC_MULTI_TWOSMP_DELAY(__MULTI_TWOSMP_DELAY__) \
( ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_13CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_14CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_15CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_16CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_17CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_18CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_19CYCLES) \
|| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_20CYCLES) \
)
#define IS_LL_ADC_MULTI_MASTER_SLAVE(__MULTI_MASTER_SLAVE__) \
( ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_MASTER) \
|| ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_SLAVE) \
|| ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_MASTER_SLAVE) \
)
#endif /* ADC_MULTIMODE_SUPPORT */
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup ADC_LL_Exported_Functions
* @{
*/
/** @addtogroup ADC_LL_EF_Init
* @{
*/
/**
* @brief De-initialize registers of all ADC instances belonging to
* the same ADC common instance to their default reset values.
* @param ADCxy_COMMON ADC common instance
* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
* @retval An ErrorStatus enumeration value:
* - SUCCESS: ADC common registers are de-initialized
* - ERROR: not applicable
*/
ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON)
{
/* Check the parameters */
assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
/* Force reset of ADC clock (core clock) */
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_ADC);
/* Release reset of ADC clock (core clock) */
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_ADC);
return SUCCESS;
}
/**
* @brief Initialize some features of ADC common parameters
* (all ADC instances belonging to the same ADC common instance)
* and multimode (for devices with several ADC instances available).
* @note The setting of ADC common parameters is conditioned to
* ADC instances state:
* All ADC instances belonging to the same ADC common instance
* must be disabled.
* @param ADCxy_COMMON ADC common instance
* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
* @param ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
* @retval An ErrorStatus enumeration value:
* - SUCCESS: ADC common registers are initialized
* - ERROR: ADC common registers are not initialized
*/
ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef *ADCxy_COMMON, LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
assert_param(IS_LL_ADC_COMMON_CLOCK(ADC_CommonInitStruct->CommonClock));
#if defined(ADC_MULTIMODE_SUPPORT)
assert_param(IS_LL_ADC_MULTI_MODE(ADC_CommonInitStruct->Multimode));
if(ADC_CommonInitStruct->Multimode != LL_ADC_MULTI_INDEPENDENT)
{
assert_param(IS_LL_ADC_MULTI_DMA_TRANSFER(ADC_CommonInitStruct->MultiDMATransfer));
assert_param(IS_LL_ADC_MULTI_TWOSMP_DELAY(ADC_CommonInitStruct->MultiTwoSamplingDelay));
}
#endif /* ADC_MULTIMODE_SUPPORT */
/* Note: Hardware constraint (refer to description of functions */
/* "LL_ADC_SetCommonXXX()" and "LL_ADC_SetMultiXXX()"): */
/* On this STM32 series, setting of these features is conditioned to */
/* ADC state: */
/* All ADC instances of the ADC common group must be disabled. */
if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(ADCxy_COMMON) == 0UL)
{
/* Configuration of ADC hierarchical scope: */
/* - common to several ADC */
/* (all ADC instances belonging to the same ADC common instance) */
/* - Set ADC clock (conversion clock) */
/* - multimode (if several ADC instances available on the */
/* selected device) */
/* - Set ADC multimode configuration */
/* - Set ADC multimode DMA transfer */
/* - Set ADC multimode: delay between 2 sampling phases */
#if defined(ADC_MULTIMODE_SUPPORT)
if(ADC_CommonInitStruct->Multimode != LL_ADC_MULTI_INDEPENDENT)
{
MODIFY_REG(ADCxy_COMMON->CCR,
ADC_CCR_ADCPRE
| ADC_CCR_MULTI
| ADC_CCR_DMA
| ADC_CCR_DDS
| ADC_CCR_DELAY
,
ADC_CommonInitStruct->CommonClock
| ADC_CommonInitStruct->Multimode
| ADC_CommonInitStruct->MultiDMATransfer
| ADC_CommonInitStruct->MultiTwoSamplingDelay
);
}
else
{
MODIFY_REG(ADCxy_COMMON->CCR,
ADC_CCR_ADCPRE
| ADC_CCR_MULTI
| ADC_CCR_DMA
| ADC_CCR_DDS
| ADC_CCR_DELAY
,
ADC_CommonInitStruct->CommonClock
| LL_ADC_MULTI_INDEPENDENT
);
}
#else
LL_ADC_SetCommonClock(ADCxy_COMMON, ADC_CommonInitStruct->CommonClock);
#endif
}
else
{
/* Initialization error: One or several ADC instances belonging to */
/* the same ADC common instance are not disabled. */
status = ERROR;
}
return status;
}
/**
* @brief Set each @ref LL_ADC_CommonInitTypeDef field to default value.
* @param ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
{
/* Set ADC_CommonInitStruct fields to default values */
/* Set fields of ADC common */
/* (all ADC instances belonging to the same ADC common instance) */
ADC_CommonInitStruct->CommonClock = LL_ADC_CLOCK_SYNC_PCLK_DIV2;
#if defined(ADC_MULTIMODE_SUPPORT)
/* Set fields of ADC multimode */
ADC_CommonInitStruct->Multimode = LL_ADC_MULTI_INDEPENDENT;
ADC_CommonInitStruct->MultiDMATransfer = LL_ADC_MULTI_REG_DMA_EACH_ADC;
ADC_CommonInitStruct->MultiTwoSamplingDelay = LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES;
#endif /* ADC_MULTIMODE_SUPPORT */
}
/**
* @brief De-initialize registers of the selected ADC instance
* to their default reset values.
* @note To reset all ADC instances quickly (perform a hard reset),
* use function @ref LL_ADC_CommonDeInit().
* @param ADCx ADC instance
* @retval An ErrorStatus enumeration value:
* - SUCCESS: ADC registers are de-initialized
* - ERROR: ADC registers are not de-initialized
*/
ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_ADC_ALL_INSTANCE(ADCx));
/* Disable ADC instance if not already disabled. */
if(LL_ADC_IsEnabled(ADCx) == 1UL)
{
/* Set ADC group regular trigger source to SW start to ensure to not */
/* have an external trigger event occurring during the conversion stop */
/* ADC disable process. */
LL_ADC_REG_SetTriggerSource(ADCx, LL_ADC_REG_TRIG_SOFTWARE);
/* Set ADC group injected trigger source to SW start to ensure to not */
/* have an external trigger event occurring during the conversion stop */
/* ADC disable process. */
LL_ADC_INJ_SetTriggerSource(ADCx, LL_ADC_INJ_TRIG_SOFTWARE);
/* Disable the ADC instance */
LL_ADC_Disable(ADCx);
}
/* Check whether ADC state is compliant with expected state */
/* (hardware requirements of bits state to reset registers below) */
if(READ_BIT(ADCx->CR2, ADC_CR2_ADON) == 0UL)
{
/* ========== Reset ADC registers ========== */
/* Reset register SR */
CLEAR_BIT(ADCx->SR,
( LL_ADC_FLAG_STRT
| LL_ADC_FLAG_JSTRT
| LL_ADC_FLAG_EOCS
| LL_ADC_FLAG_OVR
| LL_ADC_FLAG_JEOS
| LL_ADC_FLAG_AWD1 )
);
/* Reset register CR1 */
CLEAR_BIT(ADCx->CR1,
( ADC_CR1_OVRIE | ADC_CR1_RES | ADC_CR1_AWDEN
| ADC_CR1_JAWDEN
| ADC_CR1_DISCNUM | ADC_CR1_JDISCEN | ADC_CR1_DISCEN
| ADC_CR1_JAUTO | ADC_CR1_AWDSGL | ADC_CR1_SCAN
| ADC_CR1_JEOCIE | ADC_CR1_AWDIE | ADC_CR1_EOCIE
| ADC_CR1_AWDCH )
);
/* Reset register CR2 */
CLEAR_BIT(ADCx->CR2,
( ADC_CR2_SWSTART | ADC_CR2_EXTEN | ADC_CR2_EXTSEL
| ADC_CR2_JSWSTART | ADC_CR2_JEXTEN | ADC_CR2_JEXTSEL
| ADC_CR2_ALIGN | ADC_CR2_EOCS
| ADC_CR2_DDS | ADC_CR2_DMA
| ADC_CR2_CONT | ADC_CR2_ADON )
);
/* Reset register SMPR1 */
CLEAR_BIT(ADCx->SMPR1,
( ADC_SMPR1_SMP18 | ADC_SMPR1_SMP17 | ADC_SMPR1_SMP16
| ADC_SMPR1_SMP15 | ADC_SMPR1_SMP14 | ADC_SMPR1_SMP13
| ADC_SMPR1_SMP12 | ADC_SMPR1_SMP11 | ADC_SMPR1_SMP10)
);
/* Reset register SMPR2 */
CLEAR_BIT(ADCx->SMPR2,
( ADC_SMPR2_SMP9
| ADC_SMPR2_SMP8 | ADC_SMPR2_SMP7 | ADC_SMPR2_SMP6
| ADC_SMPR2_SMP5 | ADC_SMPR2_SMP4 | ADC_SMPR2_SMP3
| ADC_SMPR2_SMP2 | ADC_SMPR2_SMP1 | ADC_SMPR2_SMP0)
);
/* Reset register JOFR1 */
CLEAR_BIT(ADCx->JOFR1, ADC_JOFR1_JOFFSET1);
/* Reset register JOFR2 */
CLEAR_BIT(ADCx->JOFR2, ADC_JOFR2_JOFFSET2);
/* Reset register JOFR3 */
CLEAR_BIT(ADCx->JOFR3, ADC_JOFR3_JOFFSET3);
/* Reset register JOFR4 */
CLEAR_BIT(ADCx->JOFR4, ADC_JOFR4_JOFFSET4);
/* Reset register HTR */
SET_BIT(ADCx->HTR, ADC_HTR_HT);
/* Reset register LTR */
CLEAR_BIT(ADCx->LTR, ADC_LTR_LT);
/* Reset register SQR1 */
CLEAR_BIT(ADCx->SQR1,
( ADC_SQR1_L
| ADC_SQR1_SQ16
| ADC_SQR1_SQ15 | ADC_SQR1_SQ14 | ADC_SQR1_SQ13)
);
/* Reset register SQR2 */
CLEAR_BIT(ADCx->SQR2,
( ADC_SQR2_SQ12 | ADC_SQR2_SQ11 | ADC_SQR2_SQ10
| ADC_SQR2_SQ9 | ADC_SQR2_SQ8 | ADC_SQR2_SQ7)
);
/* Reset register SQR3 */
CLEAR_BIT(ADCx->SQR3,
( ADC_SQR3_SQ6 | ADC_SQR3_SQ5 | ADC_SQR3_SQ4
| ADC_SQR3_SQ3 | ADC_SQR3_SQ2 | ADC_SQR3_SQ1)
);
/* Reset register JSQR */
CLEAR_BIT(ADCx->JSQR,
( ADC_JSQR_JL
| ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3
| ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1 )
);
/* Reset register DR */
/* bits in access mode read only, no direct reset applicable */
/* Reset registers JDR1, JDR2, JDR3, JDR4 */
/* bits in access mode read only, no direct reset applicable */
/* Reset register CCR */
CLEAR_BIT(ADC->CCR, ADC_CCR_TSVREFE | ADC_CCR_ADCPRE);
}
return status;
}
/**
* @brief Initialize some features of ADC instance.
* @note These parameters have an impact on ADC scope: ADC instance.
* Affects both group regular and group injected (availability
* of ADC group injected depends on STM32 families).
* Refer to corresponding unitary functions into
* @ref ADC_LL_EF_Configuration_ADC_Instance .
* @note The setting of these parameters by function @ref LL_ADC_Init()
* is conditioned to ADC state:
* ADC instance must be disabled.
* This condition is applied to all ADC features, for efficiency
* and compatibility over all STM32 families. However, the different
* features can be set under different ADC state conditions
* (setting possible with ADC enabled without conversion on going,
* ADC enabled with conversion on going, ...)
* Each feature can be updated afterwards with a unitary function
* and potentially with ADC in a different state than disabled,
* refer to description of each function for setting
* conditioned to ADC state.
* @note After using this function, some other features must be configured
* using LL unitary functions.
* The minimum configuration remaining to be done is:
* - Set ADC group regular or group injected sequencer:
* map channel on the selected sequencer rank.
* Refer to function @ref LL_ADC_REG_SetSequencerRanks().
* - Set ADC channel sampling time
* Refer to function LL_ADC_SetChannelSamplingTime();
* @param ADCx ADC instance
* @param ADC_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
* @retval An ErrorStatus enumeration value:
* - SUCCESS: ADC registers are initialized
* - ERROR: ADC registers are not initialized
*/
ErrorStatus LL_ADC_Init(ADC_TypeDef *ADCx, LL_ADC_InitTypeDef *ADC_InitStruct)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_ADC_ALL_INSTANCE(ADCx));
assert_param(IS_LL_ADC_RESOLUTION(ADC_InitStruct->Resolution));
assert_param(IS_LL_ADC_DATA_ALIGN(ADC_InitStruct->DataAlignment));
assert_param(IS_LL_ADC_SCAN_SELECTION(ADC_InitStruct->SequencersScanMode));
/* Note: Hardware constraint (refer to description of this function): */
/* ADC instance must be disabled. */
if(LL_ADC_IsEnabled(ADCx) == 0UL)
{
/* Configuration of ADC hierarchical scope: */
/* - ADC instance */
/* - Set ADC data resolution */
/* - Set ADC conversion data alignment */
MODIFY_REG(ADCx->CR1,
ADC_CR1_RES
| ADC_CR1_SCAN
,
ADC_InitStruct->Resolution
| ADC_InitStruct->SequencersScanMode
);
MODIFY_REG(ADCx->CR2,
ADC_CR2_ALIGN
,
ADC_InitStruct->DataAlignment
);
}
else
{
/* Initialization error: ADC instance is not disabled. */
status = ERROR;
}
return status;
}
/**
* @brief Set each @ref LL_ADC_InitTypeDef field to default value.
* @param ADC_InitStruct Pointer to a @ref LL_ADC_InitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct)
{
/* Set ADC_InitStruct fields to default values */
/* Set fields of ADC instance */
ADC_InitStruct->Resolution = LL_ADC_RESOLUTION_12B;
ADC_InitStruct->DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
/* Enable scan mode to have a generic behavior with ADC of other */
/* STM32 families, without this setting available: */
/* ADC group regular sequencer and ADC group injected sequencer depend */
/* only of their own configuration. */
ADC_InitStruct->SequencersScanMode = LL_ADC_SEQ_SCAN_ENABLE;
}
/**
* @brief Initialize some features of ADC group regular.
* @note These parameters have an impact on ADC scope: ADC group regular.
* Refer to corresponding unitary functions into
* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
* (functions with prefix "REG").
* @note The setting of these parameters by function @ref LL_ADC_Init()
* is conditioned to ADC state:
* ADC instance must be disabled.
* This condition is applied to all ADC features, for efficiency
* and compatibility over all STM32 families. However, the different
* features can be set under different ADC state conditions
* (setting possible with ADC enabled without conversion on going,
* ADC enabled with conversion on going, ...)
* Each feature can be updated afterwards with a unitary function
* and potentially with ADC in a different state than disabled,
* refer to description of each function for setting
* conditioned to ADC state.
* @note After using this function, other features must be configured
* using LL unitary functions.
* The minimum configuration remaining to be done is:
* - Set ADC group regular or group injected sequencer:
* map channel on the selected sequencer rank.
* Refer to function @ref LL_ADC_REG_SetSequencerRanks().
* - Set ADC channel sampling time
* Refer to function LL_ADC_SetChannelSamplingTime();
* @param ADCx ADC instance
* @param ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
* @retval An ErrorStatus enumeration value:
* - SUCCESS: ADC registers are initialized
* - ERROR: ADC registers are not initialized
*/
ErrorStatus LL_ADC_REG_Init(ADC_TypeDef *ADCx, LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_ADC_ALL_INSTANCE(ADCx));
assert_param(IS_LL_ADC_REG_TRIG_SOURCE(ADC_REG_InitStruct->TriggerSource));
assert_param(IS_LL_ADC_REG_SEQ_SCAN_LENGTH(ADC_REG_InitStruct->SequencerLength));
if(ADC_REG_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
{
assert_param(IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(ADC_REG_InitStruct->SequencerDiscont));
}
assert_param(IS_LL_ADC_REG_CONTINUOUS_MODE(ADC_REG_InitStruct->ContinuousMode));
assert_param(IS_LL_ADC_REG_DMA_TRANSFER(ADC_REG_InitStruct->DMATransfer));
/* ADC group regular continuous mode and discontinuous mode */
/* can not be enabled simultenaeously */
assert_param((ADC_REG_InitStruct->ContinuousMode == LL_ADC_REG_CONV_SINGLE)
|| (ADC_REG_InitStruct->SequencerDiscont == LL_ADC_REG_SEQ_DISCONT_DISABLE));
/* Note: Hardware constraint (refer to description of this function): */
/* ADC instance must be disabled. */
if(LL_ADC_IsEnabled(ADCx) == 0UL)
{
/* Configuration of ADC hierarchical scope: */
/* - ADC group regular */
/* - Set ADC group regular trigger source */
/* - Set ADC group regular sequencer length */
/* - Set ADC group regular sequencer discontinuous mode */
/* - Set ADC group regular continuous mode */
/* - Set ADC group regular conversion data transfer: no transfer or */
/* transfer by DMA, and DMA requests mode */
/* Note: On this STM32 series, ADC trigger edge is set when starting */
/* ADC conversion. */
/* Refer to function @ref LL_ADC_REG_StartConversionExtTrig(). */
if(ADC_REG_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
{
MODIFY_REG(ADCx->CR1,
ADC_CR1_DISCEN
| ADC_CR1_DISCNUM
,
ADC_REG_InitStruct->SequencerDiscont
);
}
else
{
MODIFY_REG(ADCx->CR1,
ADC_CR1_DISCEN
| ADC_CR1_DISCNUM
,
LL_ADC_REG_SEQ_DISCONT_DISABLE
);
}
MODIFY_REG(ADCx->CR2,
ADC_CR2_EXTSEL
| ADC_CR2_EXTEN
| ADC_CR2_CONT
| ADC_CR2_DMA
| ADC_CR2_DDS
,
(ADC_REG_InitStruct->TriggerSource & ADC_CR2_EXTSEL)
| ADC_REG_InitStruct->ContinuousMode
| ADC_REG_InitStruct->DMATransfer
);
/* Set ADC group regular sequencer length and scan direction */
/* Note: Hardware constraint (refer to description of this function): */
/* Note: If ADC instance feature scan mode is disabled */
/* (refer to ADC instance initialization structure */
/* parameter @ref SequencersScanMode */
/* or function @ref LL_ADC_SetSequencersScanMode() ), */
/* this parameter is discarded. */
LL_ADC_REG_SetSequencerLength(ADCx, ADC_REG_InitStruct->SequencerLength);
}
else
{
/* Initialization error: ADC instance is not disabled. */
status = ERROR;
}
return status;
}
/**
* @brief Set each @ref LL_ADC_REG_InitTypeDef field to default value.
* @param ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
{
/* Set ADC_REG_InitStruct fields to default values */
/* Set fields of ADC group regular */
/* Note: On this STM32 series, ADC trigger edge is set when starting */
/* ADC conversion. */
/* Refer to function @ref LL_ADC_REG_StartConversionExtTrig(). */
ADC_REG_InitStruct->TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;
ADC_REG_InitStruct->SequencerLength = LL_ADC_REG_SEQ_SCAN_DISABLE;
ADC_REG_InitStruct->SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
ADC_REG_InitStruct->ContinuousMode = LL_ADC_REG_CONV_SINGLE;
ADC_REG_InitStruct->DMATransfer = LL_ADC_REG_DMA_TRANSFER_NONE;
}
/**
* @brief Initialize some features of ADC group injected.
* @note These parameters have an impact on ADC scope: ADC group injected.
* Refer to corresponding unitary functions into
* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
* (functions with prefix "INJ").
* @note The setting of these parameters by function @ref LL_ADC_Init()
* is conditioned to ADC state:
* ADC instance must be disabled.
* This condition is applied to all ADC features, for efficiency
* and compatibility over all STM32 families. However, the different
* features can be set under different ADC state conditions
* (setting possible with ADC enabled without conversion on going,
* ADC enabled with conversion on going, ...)
* Each feature can be updated afterwards with a unitary function
* and potentially with ADC in a different state than disabled,
* refer to description of each function for setting
* conditioned to ADC state.
* @note After using this function, other features must be configured
* using LL unitary functions.
* The minimum configuration remaining to be done is:
* - Set ADC group injected sequencer:
* map channel on the selected sequencer rank.
* Refer to function @ref LL_ADC_INJ_SetSequencerRanks().
* - Set ADC channel sampling time
* Refer to function LL_ADC_SetChannelSamplingTime();
* @param ADCx ADC instance
* @param ADC_INJ_InitStruct Pointer to a @ref LL_ADC_INJ_InitTypeDef structure
* @retval An ErrorStatus enumeration value:
* - SUCCESS: ADC registers are initialized
* - ERROR: ADC registers are not initialized
*/
ErrorStatus LL_ADC_INJ_Init(ADC_TypeDef *ADCx, LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_ADC_ALL_INSTANCE(ADCx));
assert_param(IS_LL_ADC_INJ_TRIG_SOURCE(ADC_INJ_InitStruct->TriggerSource));
assert_param(IS_LL_ADC_INJ_SEQ_SCAN_LENGTH(ADC_INJ_InitStruct->SequencerLength));
if(ADC_INJ_InitStruct->SequencerLength != LL_ADC_INJ_SEQ_SCAN_DISABLE)
{
assert_param(IS_LL_ADC_INJ_SEQ_SCAN_DISCONT_MODE(ADC_INJ_InitStruct->SequencerDiscont));
}
assert_param(IS_LL_ADC_INJ_TRIG_AUTO(ADC_INJ_InitStruct->TrigAuto));
/* Note: Hardware constraint (refer to description of this function): */
/* ADC instance must be disabled. */
if(LL_ADC_IsEnabled(ADCx) == 0UL)
{
/* Configuration of ADC hierarchical scope: */
/* - ADC group injected */
/* - Set ADC group injected trigger source */
/* - Set ADC group injected sequencer length */
/* - Set ADC group injected sequencer discontinuous mode */
/* - Set ADC group injected conversion trigger: independent or */
/* from ADC group regular */
/* Note: On this STM32 series, ADC trigger edge is set when starting */
/* ADC conversion. */
/* Refer to function @ref LL_ADC_INJ_StartConversionExtTrig(). */
if(ADC_INJ_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
{
MODIFY_REG(ADCx->CR1,
ADC_CR1_JDISCEN
| ADC_CR1_JAUTO
,
ADC_INJ_InitStruct->SequencerDiscont
| ADC_INJ_InitStruct->TrigAuto
);
}
else
{
MODIFY_REG(ADCx->CR1,
ADC_CR1_JDISCEN
| ADC_CR1_JAUTO
,
LL_ADC_REG_SEQ_DISCONT_DISABLE
| ADC_INJ_InitStruct->TrigAuto
);
}
MODIFY_REG(ADCx->CR2,
ADC_CR2_JEXTSEL
| ADC_CR2_JEXTEN
,
(ADC_INJ_InitStruct->TriggerSource & ADC_CR2_JEXTSEL)
);
/* Note: Hardware constraint (refer to description of this function): */
/* Note: If ADC instance feature scan mode is disabled */
/* (refer to ADC instance initialization structure */
/* parameter @ref SequencersScanMode */
/* or function @ref LL_ADC_SetSequencersScanMode() ), */
/* this parameter is discarded. */
LL_ADC_INJ_SetSequencerLength(ADCx, ADC_INJ_InitStruct->SequencerLength);
}
else
{
/* Initialization error: ADC instance is not disabled. */
status = ERROR;
}
return status;
}
/**
* @brief Set each @ref LL_ADC_INJ_InitTypeDef field to default value.
* @param ADC_INJ_InitStruct Pointer to a @ref LL_ADC_INJ_InitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct)
{
/* Set ADC_INJ_InitStruct fields to default values */
/* Set fields of ADC group injected */
ADC_INJ_InitStruct->TriggerSource = LL_ADC_INJ_TRIG_SOFTWARE;
ADC_INJ_InitStruct->SequencerLength = LL_ADC_INJ_SEQ_SCAN_DISABLE;
ADC_INJ_InitStruct->SequencerDiscont = LL_ADC_INJ_SEQ_DISCONT_DISABLE;
ADC_INJ_InitStruct->TrigAuto = LL_ADC_INJ_TRIG_INDEPENDENT;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* ADC1 || ADC2 || ADC3 */
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */

50
Inc/adc.h Normal file
View File

@ -0,0 +1,50 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.h
* @brief This file contains all the function prototypes for
* the adc.c file
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __ADC_H__
#define __ADC_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_ADC1_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __ADC_H__ */

52
Inc/dma.h Normal file
View File

@ -0,0 +1,52 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.h
* @brief This file contains all the function prototypes for
* the dma.c file
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __DMA_H__
#define __DMA_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* DMA memory to memory transfer handles -------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_DMA_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __DMA_H__ */

16
Inc/main.h
View File

@ -23,12 +23,13 @@
#define __MAIN_H #define __MAIN_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" extern "C" {
{
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_ll_adc.h"
#include "stm32f4xx_ll_dma.h"
#include "stm32f4xx_ll_rcc.h" #include "stm32f4xx_ll_rcc.h"
#include "stm32f4xx_ll_bus.h" #include "stm32f4xx_ll_bus.h"
#include "stm32f4xx_ll_system.h" #include "stm32f4xx_ll_system.h"
@ -36,7 +37,6 @@ extern "C"
#include "stm32f4xx_ll_cortex.h" #include "stm32f4xx_ll_cortex.h"
#include "stm32f4xx_ll_utils.h" #include "stm32f4xx_ll_utils.h"
#include "stm32f4xx_ll_pwr.h" #include "stm32f4xx_ll_pwr.h"
#include "stm32f4xx_ll_dma.h"
#include "stm32f4xx_ll_tim.h" #include "stm32f4xx_ll_tim.h"
#include "stm32f4xx_ll_gpio.h" #include "stm32f4xx_ll_gpio.h"
@ -80,15 +80,15 @@ extern "C"
#define LED_GREEN_Pin LL_GPIO_PIN_1 #define LED_GREEN_Pin LL_GPIO_PIN_1
#define LED_GREEN_GPIO_Port GPIOE #define LED_GREEN_GPIO_Port GPIOE
#ifndef NVIC_PRIORITYGROUP_0 #ifndef NVIC_PRIORITYGROUP_0
#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority, \ #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,
4 bits for subpriority */ 4 bits for subpriority */
#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority, \ #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority,
3 bits for subpriority */ 3 bits for subpriority */
#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority, \ #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
2 bits for subpriority */ 2 bits for subpriority */
#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority, \ #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
1 bit for subpriority */ 1 bit for subpriority */
#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority, \ #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
0 bit for subpriority */ 0 bit for subpriority */
#endif #endif

2
Inc/stm32f4xx_it.h
View File

@ -55,7 +55,9 @@ void SVC_Handler(void);
void DebugMon_Handler(void); void DebugMon_Handler(void);
void PendSV_Handler(void); void PendSV_Handler(void);
void SysTick_Handler(void); void SysTick_Handler(void);
void ADC_IRQHandler(void);
void TIM6_DAC_IRQHandler(void); void TIM6_DAC_IRQHandler(void);
void DMA2_Stream0_IRQHandler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */
/* USER CODE END EFP */ /* USER CODE END EFP */

44
MDK-ARM/JLinkSettings.ini Normal file
View File

@ -0,0 +1,44 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
RMWThreshold = 0x400
Loaders=""
EraseType = 0x00
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 0
Device="ARM7"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
[RAM]
VerifyDownload = 0x00

162
MDK-ARM/motor.uvoptx
View File

@ -103,7 +103,7 @@
<bEvRecOn>1</bEvRecOn> <bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf> <bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf> <bTchkAxf>0</bTchkAxf>
<nTsel>3</nTsel> <nTsel>4</nTsel>
<sDll></sDll> <sDll></sDll>
<sDllPa></sDllPa> <sDllPa></sDllPa>
<sDlgDll></sDlgDll> <sDlgDll></sDlgDll>
@ -114,9 +114,18 @@
<tDlgDll></tDlgDll> <tDlgDll></tDlgDll>
<tDlgPa></tDlgPa> <tDlgPa></tDlgPa>
<tIfile></tIfile> <tIfile></tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon> <pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt> </DebugOpt>
<TargetDriverDllRegistry> <TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U601012352 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407IGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
</SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key> <Key>ARMRTXEVENTFLAGS</Key>
@ -137,11 +146,6 @@
<Key>CMSIS_AGDI</Key> <Key>CMSIS_AGDI</Key>
<Name>-X"" -O206 -S8 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407IGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name> <Name>-X"" -O206 -S8 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407IGTx$CMSIS\Flash\STM32F4xx_1024.FLM)</Name>
</SetRegEntry> </SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name></Name>
</SetRegEntry>
<SetRegEntry> <SetRegEntry>
<Number>0</Number> <Number>0</Number>
<Key>UL2CM3</Key> <Key>UL2CM3</Key>
@ -154,6 +158,36 @@
</SetRegEntry> </SetRegEntry>
</TargetDriverDllRegistry> </TargetDriverDllRegistry>
<Breakpoint/> <Breakpoint/>
<WatchWindow1>
<Ww>
<count>0</count>
<WinNumber>1</WinNumber>
<ItemText>p,0x0A</ItemText>
</Ww>
<Ww>
<count>1</count>
<WinNumber>1</WinNumber>
<ItemText>adcs</ItemText>
</Ww>
<Ww>
<count>2</count>
<WinNumber>1</WinNumber>
<ItemText>app</ItemText>
</Ww>
<Ww>
<count>3</count>
<WinNumber>1</WinNumber>
<ItemText>board,0x0A</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
<WinNumber>1</WinNumber>
<SubType>0</SubType>
<ItemText>0x2001C9C0</ItemText>
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow1>
<Tracepoint> <Tracepoint>
<THDelay>0</THDelay> <THDelay>0</THDelay>
</Tracepoint> </Tracepoint>
@ -228,7 +262,7 @@
<Group> <Group>
<GroupName>Application/User</GroupName> <GroupName>Application/User</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@ -263,6 +297,30 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../Src/adc.c</PathWithFileName>
<FilenameWithoutPath>adc.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>../Src/dma.c</PathWithFileName>
<FilenameWithoutPath>dma.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>../Src/tim.c</PathWithFileName> <PathWithFileName>../Src/tim.c</PathWithFileName>
<FilenameWithoutPath>tim.c</FilenameWithoutPath> <FilenameWithoutPath>tim.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@ -270,7 +328,7 @@
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>5</FileNumber> <FileNumber>7</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -290,7 +348,7 @@
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber> <FileNumber>8</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -302,19 +360,19 @@
</File> </File>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>7</FileNumber> <FileNumber>9</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_tim.c</PathWithFileName> <PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_ll_tim.c</FilenameWithoutPath> <FilenameWithoutPath>stm32f4xx_ll_adc.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>8</FileNumber> <FileNumber>10</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -326,7 +384,7 @@
</File> </File>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>9</FileNumber> <FileNumber>11</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -338,7 +396,7 @@
</File> </File>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>10</FileNumber> <FileNumber>12</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -350,7 +408,7 @@
</File> </File>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>11</FileNumber> <FileNumber>13</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -360,6 +418,18 @@
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>14</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_tim.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_ll_tim.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group> </Group>
<Group> <Group>
@ -370,7 +440,7 @@
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>4</GroupNumber> <GroupNumber>4</GroupNumber>
<FileNumber>12</FileNumber> <FileNumber>15</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -390,7 +460,7 @@
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>5</GroupNumber> <GroupNumber>5</GroupNumber>
<FileNumber>13</FileNumber> <FileNumber>16</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -410,7 +480,7 @@
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>6</GroupNumber> <GroupNumber>6</GroupNumber>
<FileNumber>14</FileNumber> <FileNumber>17</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -430,7 +500,7 @@
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>7</GroupNumber> <GroupNumber>7</GroupNumber>
<FileNumber>15</FileNumber> <FileNumber>18</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -442,7 +512,7 @@
</File> </File>
<File> <File>
<GroupNumber>7</GroupNumber> <GroupNumber>7</GroupNumber>
<FileNumber>16</FileNumber> <FileNumber>19</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@ -454,7 +524,7 @@
</File> </File>
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@ -466,7 +536,7 @@
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@ -478,7 +548,7 @@
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@ -490,7 +560,7 @@
</File> </File>
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@ -502,7 +572,7 @@
</File> </File>
<File> <File>
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@ -514,7 +584,7 @@
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@ -526,7 +596,7 @@
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@ -538,7 +608,7 @@
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@ -550,7 +620,7 @@
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@ -562,7 +632,7 @@
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@ -574,7 +644,7 @@
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@ -588,13 +658,13 @@
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<GroupName>User/system</GroupName> <GroupName>User/system</GroupName>
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<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
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@ -606,7 +676,7 @@
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@ -618,7 +688,7 @@
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@ -630,7 +700,7 @@
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@ -642,7 +712,7 @@
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@ -654,7 +724,7 @@
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@ -666,7 +736,7 @@
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@ -678,7 +748,7 @@
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@ -690,7 +760,7 @@
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225
MDK-ARM/motor.uvprojx
View File

@ -53,7 +53,7 @@
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@ -403,6 +403,118 @@
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574
MDK-ARM/motor/motor.hex
View File

@ -1,13 +1,13 @@
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107
Src/adc.c Normal file
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@ -0,0 +1,107 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.c
* @brief This file provides code for the configuration
* of the ADC instances.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "adc.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* ADC1 init function */
void MX_ADC1_Init(void)
{
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
LL_ADC_InitTypeDef ADC_InitStruct = {0};
LL_ADC_REG_InitTypeDef ADC_REG_InitStruct = {0};
LL_ADC_CommonInitTypeDef ADC_CommonInitStruct = {0};
/* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC1);
/* ADC1 DMA Init */
/* ADC1 Init */
LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_0, LL_DMA_CHANNEL_0);
LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_0, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_0, LL_DMA_PRIORITY_LOW);
LL_DMA_SetMode(DMA2, LL_DMA_STREAM_0, LL_DMA_MODE_CIRCULAR);
LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_0, LL_DMA_PERIPH_NOINCREMENT);
LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_0, LL_DMA_MEMORY_INCREMENT);
LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_0, LL_DMA_PDATAALIGN_HALFWORD);
LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_0, LL_DMA_MDATAALIGN_HALFWORD);
LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_0);
/* ADC1 interrupt Init */
NVIC_SetPriority(ADC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
NVIC_EnableIRQ(ADC_IRQn);
/* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B;
ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
ADC_InitStruct.SequencersScanMode = LL_ADC_SEQ_SCAN_ENABLE;
LL_ADC_Init(ADC1, &ADC_InitStruct);
ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;
ADC_REG_InitStruct.SequencerLength = LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS;
ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_CONTINUOUS;
ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_UNLIMITED;
LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct);
LL_ADC_REG_SetFlagEndOfConversion(ADC1, LL_ADC_REG_FLAG_EOC_SEQUENCE_CONV);
ADC_CommonInitStruct.CommonClock = LL_ADC_CLOCK_SYNC_PCLK_DIV4;
ADC_CommonInitStruct.Multimode = LL_ADC_MULTI_INDEPENDENT;
LL_ADC_CommonInit(__LL_ADC_COMMON_INSTANCE(ADC1), &ADC_CommonInitStruct);
/** Configure Regular Channel
*/
LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_TEMPSENSOR);
LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_TEMPSENSOR, LL_ADC_SAMPLINGTIME_28CYCLES);
LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_TEMPSENSOR);
/** Configure Regular Channel
*/
LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_2, LL_ADC_CHANNEL_VREFINT);
LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_VREFINT, LL_ADC_SAMPLINGTIME_28CYCLES);
LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_VREFINT);
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

56
Src/dma.c Normal file
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@ -0,0 +1,56 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.c
* @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers.
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "dma.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure DMA */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/**
* Enable DMA controller clock
*/
void MX_DMA_Init(void)
{
/* Init with LL driver */
/* DMA controller clock enable */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
/* DMA interrupt init */
/* DMA2_Stream0_IRQn interrupt configuration */
NVIC_SetPriority(DMA2_Stream0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
NVIC_EnableIRQ(DMA2_Stream0_IRQn);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */

5
Src/main.c
View File

@ -18,6 +18,8 @@
/* USER CODE END Header */ /* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "main.h" #include "main.h"
#include "adc.h"
#include "dma.h"
#include "tim.h" #include "tim.h"
#include "gpio.h" #include "gpio.h"
@ -94,9 +96,12 @@ int main(void)
/* Initialize all configured peripherals */ /* Initialize all configured peripherals */
MX_GPIO_Init(); MX_GPIO_Init();
MX_DMA_Init();
MX_TIM6_Init(); MX_TIM6_Init();
MX_ADC1_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
my_mem_init(SRAMIN); // Initialize internal memory pool 1 my_mem_init(SRAMIN); // Initialize internal memory pool 1
my_mem_init(SRAMEX); // Initialize external memory pool 2
board_init(); board_init();
app_init(); app_init();
/* USER CODE END 2 */ /* USER CODE END 2 */

28
Src/stm32f4xx_it.c
View File

@ -202,6 +202,20 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32f4xx.s). */ /* please refer to the startup file (startup_stm32f4xx.s). */
/******************************************************************************/ /******************************************************************************/
/**
* @brief This function handles ADC1, ADC2 and ADC3 global interrupts.
*/
void ADC_IRQHandler(void)
{
/* USER CODE BEGIN ADC_IRQn 0 */
/* USER CODE END ADC_IRQn 0 */
/* USER CODE BEGIN ADC_IRQn 1 */
adc_env_callback(ADCS_1);
/* USER CODE END ADC_IRQn 1 */
}
/** /**
* @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts. * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
*/ */
@ -221,6 +235,20 @@ void TIM6_DAC_IRQHandler(void)
/* USER CODE END TIM6_DAC_IRQn 1 */ /* USER CODE END TIM6_DAC_IRQn 1 */
} }
/**
* @brief This function handles DMA2 stream0 global interrupt.
*/
void DMA2_Stream0_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
/* USER CODE END DMA2_Stream0_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
adc_dma_callback(ADCS_1);
/* USER CODE END DMA2_Stream0_IRQn 1 */
}
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */

5
User/application/app.c
View File

@ -13,8 +13,9 @@ static uint8_t business_inspection(struct flow *fl)
FL_HEAD(fl); FL_HEAD(fl);
for (;;) for (;;)
{ {
app.cpu_temperature = get_cpu_temperature();
FL_LOCK_DELAY(fl, FL_CLOCK_100MSEC); app.cpu_volt = get_cpu_voltage();
FL_LOCK_DELAY(fl, FL_CLOCK_SEC);
} }
FL_TAIL(fl); FL_TAIL(fl);
} }

3
User/application/app.h
View File

@ -11,7 +11,8 @@
typedef struct typedef struct
{ {
float32 cpu_temperature;
float32 cpu_volt;
} app_t; } app_t;
extern app_t app; extern app_t app;

268
User/application/work.c
View File

@ -1,281 +1,13 @@
#include "work.h" #include "work.h"
#include "board.h" #include "board.h"
#define OUTPUT_INFORMATION_CYCLE_BASE 100
#define DISTANCE 1000
#define SPEED 80
#define TARGET_POS 500
#define TARGET_SPEED 20
work_t work;
/**
* @brief 输出信息
*
* 该函数用于输出一些信息，具体输出内容未实现。
*/
static void output_information(void)
{
char data[128];
uint8_t len = 0;
int32_t rst = 0;
osel_memset((uint8_t *)data, 0, ARRAY_LEN(data));
if (work.type == WORK_MOTOR_POS)
{
rst = snprintf(data, ARRAY_LEN(data), "%d,%d,%f\r\n", work.target_pos, work.encoder_cnt, work.pwm_percent);
}
else if (work.type == WORK_MOTOR_SPEED)
{
rst = snprintf(data, ARRAY_LEN(data), "%d,%d,%f\r\n", work.target_speed, work.encoder_show, work.pwm_percent);
}
else
{
return;
}
if (rst == 0 || rst > ARRAY_LEN(data))
{
return;
}
len = osel_mstrlen((uint8_t *)data);
uart_send((uint8_t *)data, len);
}
static void pwm_map(void)
{
set_motor_pwm(work.pwm_percent);
}
static void pwm_s_curve(void)
{
}
static void motor_pos(void)
{
int32_t code = work.encoder_cnt;
work.pwm_percent = work.pid.pid_u.fuzzy.execute(&work.pid.pid_u.fuzzy, work.target_pos, code);
set_motor_pwm(work.pwm_percent);
}
static void motor_speed(void)
{
int32_t code = work.encoder_cnt;
work.target_speed_filter = lpf_update(&work.target_speed_lpf, work.target_speed);
work.encoder_show = lpf_update(&work.encoder_lpf, work.encoder_cnt);
work.encoder_cnt = 0;
work.pwm_percent = work.pid.pid_u.fuzzy.execute(&work.pid.pid_u.fuzzy, work.target_speed_filter + 1, code); // 补偿1
set_motor_pwm(work.pwm_percent);
}
static void pwm_map_key_handle(button_id_e id)
{
int8_t min = -100, max = 100;
int8_t step = 10;
switch (id)
{
case KEY_ADD:
if (work.pwm_percent < max)
{
work.pwm_percent += step;
}
break;
case KEY_SUB:
if (work.pwm_percent > min)
{
work.pwm_percent -= step;
}
break;
case KEY_S:
work.pwm_percent = 10;
work.encoder_cnt = 0;
break;
default:
break;
}
}
static void motot_pos_key_handle(button_id_e id)
{
int16_t min = 0, max = DISTANCE;
int16_t step = 100;
switch (id)
{
case KEY_ADD:
if (work.target_pos < max)
{
work.target_pos += step;
}
break;
case KEY_SUB:
if (work.target_pos > min)
{
work.target_pos -= step;
}
break;
case KEY_S:
work.target_pos = TARGET_POS;
break;
default:
break;
}
}
static void motor_speed_key_handle(button_id_e id)
{
int16_t min = TARGET_SPEED, max = SPEED;
int16_t step = 5;
switch (id)
{
case KEY_ADD:
if (work.target_speed < max)
{
work.target_speed += step;
}
break;
case KEY_SUB:
if (work.target_speed > min)
{
work.target_speed -= step;
}
break;
case KEY_S:
work.target_speed = TARGET_SPEED;
break;
default:
break;
}
}
void work_key_handle_cb(button_id_e id)
{
switch (work.type)
{
case WORK_PWM_MAP:
pwm_map_key_handle(id);
break;
case WORK_MOTOR_POS:
motot_pos_key_handle(id);
break;
case WORK_MOTOR_SPEED:
motor_speed_key_handle(id);
break;
default:
DBG_ASSERT(FALSE __DBG_LINE);
break;
}
}
static void work_data_update(void)
{
work.pid.pid_u.fuzzy.set_kp(&work.pid.pid_u.fuzzy, work.pid_params.kp);
work.pid.pid_u.fuzzy.set_ki(&work.pid.pid_u.fuzzy, work.pid_params.ki);
work.pid.pid_u.fuzzy.set_kd(&work.pid.pid_u.fuzzy, work.pid_params.kd);
}
void work_process(void) void work_process(void)
{ {
switch (work.type)
{
case WORK_PWM_MAP:
pwm_map();
break;
case WORK_MOTOR_POS:
motor_pos();
break;
case WORK_MOTOR_SPEED:
motor_speed();
break;
case WORK_S_CURVE:
pwm_s_curve();
break;
default:
break;
}
if (work.enter_cnt++ % (OUTPUT_INFORMATION_CYCLE_BASE / work.timer_cycle) == 0)
{
output_information();
}
work_data_update();
}
void work_encoder_exti(void)
{
if (GPIO_READ(MOTOR_B_GPIO_Port, MOTOR_B_Pin) == 1)
{
work.encoder_cnt++;
}
else
{
work.encoder_cnt--;
}
} }
void work_init(void) void work_init(void)
{ {
osel_memset((uint8_t *)&work, 0, sizeof(work_t)); osel_memset((uint8_t *)&work, 0, sizeof(work_t));
PWM_START(PWM_TIM, PWM_CHANNEL);
PWM_SET_DUTY(PWM_TIM, PWM_CHANNEL, 0);
work.pwm_feq = PWM_GET_FREQ(PWM_TIM);
work.pwm_arr = PWM_GET_ARR(PWM_TIM);
work.type = WORK_PWM_MAP;
// PID初始化
{
work.pid.type = PID_TYPE_FUZZY;
work.pid.pid_u.fuzzy.deadzone_dir = DEAD_ZONE_BOTH;
work.pid_params.dead_zone = 1;
if (work.type == WORK_MOTOR_POS)
{
work.pid_params.kp = 1;
work.pid_params.ki = 0.01f;
work.pid_params.kd = 10;
work.pid.sub_type = PID_SUB_TYPE_POSITION;
}
else
{
work.pid_params.kp = 0.01;
work.pid_params.ki = 0.1f;
work.pid_params.kd = 0;
work.pid.sub_type = PID_SUB_TYPE_INCREMENT;
}
pid_constructor(&work.pid);
if (work.type == WORK_MOTOR_POS)
{
work.pid.pid_u.fuzzy.set_ctrl_prm(&work.pid.pid_u.fuzzy, work.pid_params.kp, work.pid_params.ki,
work.pid_params.kd, work.pid_params.dead_zone, 0, -90, 90); // 电机输出不要超过90
work.pid.pid_u.fuzzy.set_kd_enable(&work.pid.pid_u.fuzzy, TRUE);
work.position = &work.pid.pid_u.fuzzy.pri_u.position;
}
else
{
work.pid.pid_u.fuzzy.set_ctrl_prm(&work.pid.pid_u.fuzzy, work.pid_params.kp, work.pid_params.ki,
work.pid_params.kd, work.pid_params.dead_zone, 0, -1 * ((int32_t)SPEED), SPEED);
work.pid.pid_u.fuzzy.set_kd_enable(&work.pid.pid_u.fuzzy, FALSE);
work.increment = &work.pid.pid_u.fuzzy.pri_u.increment;
work.encoder_lpf.alpha = work.pid_params.ki * 1.5f;
lpf_init(&work.encoder_lpf);
work.target_speed_lpf.alpha = work.pid_params.ki * 1.5f;
lpf_init(&work.target_speed_lpf);
// 改变定时器周期
uint16_t arr = LL_TIM_GetAutoReload(WORK_TIM);
LL_TIM_SetAutoReload(WORK_TIM, arr * 10 - 1);
}
}
work.target_pos = TARGET_POS;
work.target_speed = TARGET_SPEED;
work.timer_cycle = TIM_CYCLE(WORK_TIM);
if (work.type == WORK_PWM_MAP)
{
work.pwm_percent = 10;
}
return; return;
} }

34
User/application/work.h
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@ -7,47 +7,17 @@
#include "filter.h" #include "filter.h"
typedef enum typedef enum
{ {
// PWM占空比映射到电机
WORK_PWM_MAP = 0,
// 电机位置控制
WORK_MOTOR_POS = 1,
// 电机速度控制
WORK_MOTOR_SPEED = 2,
// S曲线
WORK_S_CURVE = 3,
} work_e; } work_e;
typedef struct typedef struct
{ {
work_e type; work_e type;
uint8_t timer_cycle; // 定时器周期
uint32_t enter_cnt; // 进入次数
int32_t encoder_cnt; // 编码器位置
int32_t encoder_show; // 滤波后的编码器位置
float32 pwm_percent; // PWM占空比
uint32_t pwm_feq; // PWM频率
uint16_t pwm_arr; // PWM自动重装载值
pid_t pid;
pid_common_position_t *position;
pid_common_increment_t *increment;
struct
{
float32 kp;
float32 ki;
float32 kd;
float32 dead_zone;
} pid_params;
int32_t target_pos; // 目标位置
int32_t target_speed; // 目标速度
int32_t target_speed_filter;
lpf_t encoder_lpf;
lpf_t target_speed_lpf;
} work_t; } work_t;
extern work_t work; extern work_t work;
void work_init(void); void work_init(void);
void work_process(void); void work_process(void);
void work_key_handle_cb(button_id_e id);
void work_encoder_exti(void);
#endif // __WORK_H__ #endif // __WORK_H__

30
User/board/board.c
View File

@ -1,5 +1,7 @@
#include "board.h" #include "board.h"
board_t board;
void led_open(led_e led) void led_open(led_e led)
{ {
switch (led) switch (led)
@ -51,4 +53,32 @@ void led_toggle(led_e led)
*/ */
void board_init(void) void board_init(void)
{ {
adc_init(ADCS_1, ADC1, DMA2, LL_DMA_STREAM_0, LL_DMA_CHANNEL_0, 400,
INTEMP | INVREF); // 初始化ADC1通道，默认采集AD
}
/**
* @brief 获取当前CPU温度
* @return {float32} CPU温度
* @note
*/
float32 get_cpu_temperature(void)
{
float32 tmp = 0.0f;
board.adc_raw[ADC_TEMP_CHANNEL] = adc_result_average(ADCS_1, ADC_TEMP_CHANNEL);
tmp = adc_result_temperature(board.adc_raw[ADC_TEMP_CHANNEL]);
return tmp;
}
/**
* @brief 获取当前CPU电压
* @return {float32} CPU电压
* @note
*/
float32 get_cpu_voltage(void)
{
float32 tmp = 0.0f;
board.adc_raw[ADC_INVREF_CHANNEL] = adc_result_average(ADCS_1, ADC_INVREF_CHANNEL);
tmp = adc_result_value_local(board.adc_raw[ADC_INVREF_CHANNEL]);
return tmp;
} }

20
User/board/board.h
View File

@ -13,9 +13,29 @@ typedef enum
LED_GREEN, LED_GREEN,
} led_e; } led_e;
/**
* ADC通道定义: 主频4、分频系数8，根据公式 TCONV(转换时间) = (采样时间 + 12.5 个周期)/(主频/ADC分频系数) 计算每个通道单个采集时间
*/
typedef enum
{
ADC_TEMP_CHANNEL, ///< 内部参考温度
ADC_INVREF_CHANNEL, ///< 内部参考电压
ADC1_MAX, ///< ADC1通道最大数量
} adc1_channel_e;
typedef struct
{
uint16_t adc_raw[ADC1_MAX];
} board_t;
extern board_t board;
void board_init(void); void board_init(void);
void led_open(led_e led); void led_open(led_e led);
void led_close(led_e led); void led_close(led_e led);
void led_toggle(led_e led); void led_toggle(led_e led);
float32 get_cpu_temperature(void);
float32 get_cpu_voltage(void);
#endif #endif

161
User/lib/driver/dac161p997.c Normal file
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@ -0,0 +1,161 @@
#include "dac161p997.h"
#include "delay.h"
static dac161p997_t _handle;
static void dac161p997_output_0()
{
_handle.io->set(*_handle.io);
delay_us(DUTY_CYCLE_25);
_handle.io->reset(*_handle.io);
delay_us(DUTY_CYCLE_75);
}
static void dac161p997_output_1()
{
_handle.io->set(*_handle.io);
delay_us(DUTY_CYCLE_75);
_handle.io->reset(*_handle.io);
delay_us(DUTY_CYCLE_25);
}
static void dac161p997_output_d()
{
_handle.io->set(*_handle.io);
delay_us(DUTY_CYCLE_50);
_handle.io->reset(*_handle.io);
delay_us(DUTY_CYCLE_50);
}
/**
* @brief 输出DAC161符号
*
* 根据传入的符号类型，调用相应的DAC161输出函数。
*
* @param sym 符号类型，可以是ZERO_SYM、ONE_SYM或其他值。
*/
static void dac161p997_output_symbol(uint8_t sym)
{
switch (sym)
{
case ZERO_SYM:
dac161p997_output_0();
break;
case ONE_SYM:
dac161p997_output_1();
break;
default:
dac161p997_output_d();
break;
}
}
/**
* @brief 向DAC161写入寄存器
*
* 向DAC161写入一个16位的数据，并附加一个8位的标签。
* 芯片会回复一个应答信号，此处忽略应答信号。可以通过设置寄存器关闭应答信号。
* @param data 要写入的数据，16位。
* @param tag 附加的标签，8位。tag = 0时，写DAC寄存器；tag = 1时，写配置寄存器。
*/
void dac161p997_swif_write_reg(uint16_t data, uint8_t tag)
{
uint8_t plow, phigh;
uint16_t i, tmp;
/* compute parity low */
tmp = data & 0x00ff; // get least significant byte
for (plow = 0; tmp != 0; tmp >>= 1)
{
if (tmp & 0x1) // test if lsb is 1
plow++; // count number of bits equal to 1
}
if (plow & 0x1) // check if number of 1s is odd
plow = 0; // set even parity
else
plow = 1; // else set odd parity
/* compute parity high */
tmp = (data & 0xff00) >> 8; // get most significant byte
for (phigh = 0; tmp != 0; tmp >>= 1)
{
if (tmp & 0x1) // test if lsb is 1
phigh++; // count number of bits equal to 1
}
if (phigh & 0x1) // check if number of 1s is odd
phigh = 0; // set even parity
else
phigh = 1; // set odd parity
phigh = phigh ^ tag; // parity high is for high slice = tag + 1 byte
dac161p997_output_symbol(IDLE_SYM); // Frame start: send an idle symbol first
dac161p997_output_symbol(tag);
tmp = data;
for (i = 0; i < 16; i++) // send 16 data bits msb to lsb
{
if (tmp & 0x8000)
{
dac161p997_output_symbol(ONE_SYM); // send 1
}
else
{
dac161p997_output_symbol(ZERO_SYM); // send 0
}
tmp = tmp << 1; // move next data bit to msb
}
dac161p997_output_symbol(phigh); // send parity high bit
dac161p997_output_symbol(plow); // send parity low bit
dac161p997_output_symbol(IDLE_SYM); // send idle
}
/**
* @brief 设置DAC161输出电流
*
* 通过向DAC161写入指定的电流值来设置其输出电流,输出电流持续时间100ms。
*
* @param current 要设置的电流值
*/
void dac161p997_output_current(float32 current)
{
uint8_t adc = (uint16_t)(current * DAC161P997_CURRENT_SLOPE) >> 8;
static uint8_t last_adc;
if (adc == last_adc)
{
last_adc = adc;
return;
}
dac161p997_swif_write_reg(DAC161P997_LCK_REG_UNLOCK, CONFIG_WRITE);
dac161p997_swif_write_reg(DAC161P997_ERR_LOW_REG + adc, CONFIG_WRITE);
dac161p997_swif_write_reg(DAC161P997_LCK_REG_LOCK, CONFIG_WRITE);
}
/**
* @brief 初始化DAC161设备
*
* 此函数用于初始化DAC161设备，进行必要的配置，以便设备正常工作。
* 写寄存器之前要先解锁，具体配置寄存器根据需要配置的寄存器而定
* 具体步骤包括：
* 1. 解锁DAC161的配置寄存器
* 2. 配置DAC161的错误下限寄存器
* 3. 锁定DAC161的配置寄存器
*/
void dac161p997_init()
{
_handle.io = gpio_create(DAC161P997_IO_PORT, DAC161P997_IO_PIN);
dac161p997_swif_write_reg(DAC161P997_LCK_REG_UNLOCK, CONFIG_WRITE);
dac161p997_swif_write_reg(DAC161P997_CONFIG2_REG +
DAC161P997_CONFIG2_REG_LOOP +
DAC161P997_CONFIG2_REG_CHANNEL +
DAC161P997_CONFIG2_REG_PARITY +
DAC161P997_CONFIG2_REG_FRAME,
CONFIG_WRITE);
dac161p997_swif_write_reg(DAC161P997_LCK_REG_LOCK, CONFIG_WRITE);
}

81
User/lib/driver/dac161p997.h Normal file
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@ -0,0 +1,81 @@
#ifndef __DAC161P997_H__
#define __DAC161P997_H__
#include "main.h"
#include "gpios.h"
#define DAC161P997_IO_PORT (DAC161P997_GPIO_Port)
#define DAC161P997_IO_PIN (DAC161P997_Pin)
#define DAC161P997_CURRENT_SLOPE 2730.625f // adc = (current / 24) * 0xffff
// Symbol Periods
#define DUTY_CYCLE_100 (1000U) // (CPU_CLK / BAUD_RATE)
#define DUTY_CYCLE_75 (DUTY_CYCLE_100 * 0.75f)
#define DUTY_CYCLE_50 (DUTY_CYCLE_100 * 0.50f)
#define DUTY_CYCLE_25 (DUTY_CYCLE_100 * 0.25f)
/************************************************************
* TI DAC161P997 REGISTER SET ADDRESSES
************************************************************/
#define DAC161P997_LCK_REG (0x0000)
#define DAC161P997_CONFIG1_REG (0x0100)
#define DAC161P997_CONFIG2_REG (0x0200)
#define DAC161P997_CONFIG3_REG (0x0300)
#define DAC161P997_ERR_LOW_REG (0x0400)
#define DAC161P997_ERR_HIGH_REG (0x0500)
// TI DAC161P997 Register Bits
#define DAC161P997_LCK_REG_LOCK (0x00AA) // any value other than 0x95
#define DAC161P997_LCK_REG_UNLOCK (0x0095)
#define DAC161P997_CONFIG1_REG_RST (0x0001)
#define DAC161P997_CONFIG1_REG_NOP (0 * 0x08u)
#define DAC161P997_CONFIG1_REG_SET_ERR (1 * 0x08u)
#define DAC161P997_CONFIG1_REG_CLEAR_ERR (2 * 0x08u)
#define DAC161P997_CONFIG1_REG_NOP3 (3 * 0x08u)
#define DAC161P997_CONFIG2_REG_LOOP (0x0001)
#define DAC161P997_CONFIG2_REG_CHANNEL (0x0002)
#define DAC161P997_CONFIG2_REG_PARITY (0x0004)
#define DAC161P997_CONFIG2_REG_FRAME (0x0008)
#define DAC161P997_CONFIG2_REG_ACK_EN (0x0010)
#define DAC161P997_CONFIG3_REG_RX_ERR_CNT_16 (0x000F)
#define DAC161P997_CONFIG3_REG_RX_ERR_CNT_8 (0x0007)
#define DAC161P997_CONFIG3_REG_RX_ERR_CNT_1 (0x0000)
// Tags
#define DACCODE_WRITE (0x00)
#define CONFIG_WRITE (0x01)
// Valid Symbols
#define ZERO_SYM (0x00)
#define ONE_SYM (0x01)
#define IDLE_SYM (0x02)
#define STATIC_LOW_SYM (0x03)
// DAC Codes for different currents
#define DACCODE_0mA (0x0000)
#define DACCODE_4mA (0x2AAA)
#define DACCODE_8mA (0x5555)
#define DACCODE_12mA (0x7FFF)
#define DACCODE_16mA (0xAAAA)
#define DACCODE_20mA (0xD555)
#define DACCODE_24mA (0xFFFF)
// cycles
// #define QUARTER_CYCLES (625)
// #define HALF_CYCLES (1250)
// #define THREE_CYCLES (1875)
// #define FULL_CYCLES (2500)
typedef struct
{
gpio_t *io;
} dac161p997_t;
void dac161p997_output_0(void);
void dac161p997_output_1(void);
void dac161p997_output_d(void);
void dac161p997_output_symbol(uint8_t sym);
void dac161p997_swif_write_reg(uint16_t data, uint8_t tag);
extern void dac161p997_output_current(float32 current);
extern void dac161p997_init(void);
#endif

219
User/lib/driver/eeprom_fm24.c Normal file
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@ -0,0 +1,219 @@
/**
* @file eeprom_fm24.c
* @author xxx
* @date 2023-08-29 07:58:27
* @brief 用于实现FM24 EEPROM相关的读写操作
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/
#include "entity.h"
#include "board.h"
#include "eeprom_fm24.h"
#include "delay.h"
#define FM24_SPI SPI1
#define EEPROM_FM24_CS_PORT EE3_CS_GPIO_Port
#define EEPROM_FM24_CS_PIN EE3_CS_Pin
#define EEPROM_FM24_MOSI_PORT SPI_MOSI_GPIO_Port
#define EEPROM_FM24_MOSI_PIN SPI_MOSI_Pin
#define EEPROM_FM24_MISO_PORT SPI_MISO_GPIO_Port
#define EEPROM_FM24_MISO_PIN SPI_MISO_Pin
#define EEPROM_FM24_SCK_PORT SPI_CLK_GPIO_Port
#define EEPROM_FM24_SCK_PIN SPI_CLK_Pin
static fm24_t _eeprom_fm24;
void eeprom_fm24_init(void)
{
spi_gpio_group_t gpios;
spi_normal_config_t cfg;
osel_memset((uint8_t *)&cfg, 0, sizeof(spi_normal_config_t));
// 创建CS引脚
gpios.cs = gpio_create(EEPROM_FM24_CS_PORT, EEPROM_FM24_CS_PIN);
gpios.mosi = gpio_create(EEPROM_FM24_MOSI_PORT, EEPROM_FM24_MOSI_PIN);
gpios.sck = gpio_create(EEPROM_FM24_SCK_PORT, EEPROM_FM24_SCK_PIN);
gpios.miso = gpio_create(EEPROM_FM24_MISO_PORT, EEPROM_FM24_MISO_PIN);
gpios.rst = gpio_create(NULL, 0);
gpios.rdy = gpio_create(NULL, 0);
// 创建SPI对象
eeprom_fm24_get()->spi = spi_create(SPI_TYPE_NORMAL, gpios, 0);
DBG_ASSERT(eeprom_fm24_get() != NULL __DBG_LINE);
cfg.cmd_rdsr = FM24_CMD_RDSR;
cfg.cmd_wrsr = FM24_CMD_WRSR;
cfg.cmd_wren = FM24_CMD_WREN;
cfg.cmd_wrdi = FM24_CMD_WRDI;
cfg.cmd_write = FM24_CMD_WRITE;
cfg.cmd_read = FM24_CMD_READ;
cfg.dummy_byte = FM24_DUMMY_BYTE;
cfg.address_bytes = 2;
cfg.page_size = FM24_PAGE_SIZE;
cfg.total_size = FM24_SIZE;
cfg.continuous_write = FALSE;
osel_memcpy((uint8_t *)&eeprom_fm24_get()->spi->cfg, (uint8_t *)&cfg, sizeof(spi_normal_config_t));
// 使能SPI
eeprom_fm24_get()->spi->interface.hardware_enable(eeprom_fm24_get()->spi, FM24_SPI);
// 这里需要复位下SPI，否则读出的数据不对
eeprom_fm24_get()->spi->interface.u.normal.spi_reset(eeprom_fm24_get()->spi);
eeprom_fm24_write_protection_close();
// eeprom_fm24_test();
}
fm24_t *eeprom_fm24_get(void)
{
return &_eeprom_fm24;
}
void eeprom_fm24_dinit(void)
{
LL_SPI_Disable(FM24_SPI);
GPIO_SET_ANALOG(eeprom_fm24_get()->spi->gpios.mosi->port, eeprom_fm24_get()->spi->gpios.mosi->pin);
GPIO_SET_ANALOG(eeprom_fm24_get()->spi->gpios.miso->port, eeprom_fm24_get()->spi->gpios.miso->pin);
GPIO_SET_ANALOG(eeprom_fm24_get()->spi->gpios.sck->port, eeprom_fm24_get()->spi->gpios.sck->pin);
GPIO_SET_ANALOG(eeprom_fm24_get()->spi->gpios.cs->port, eeprom_fm24_get()->spi->gpios.cs->pin);
}
void eeprom_fm24_enable(void)
{
uint16_t count = 100;
LL_SPI_Enable(FM24_SPI);
// 判断SPI是否使能成功
while (LL_SPI_IsEnabled(FM24_SPI) != 1)
{
if (count-- == 0)
{
return;
}
else
{
__NOP();
}
}
}
void eeprom_fm24_disable(void)
{
uint16_t count = 100;
LL_SPI_Disable(FM24_SPI);
// 判断SPI是否关闭成功
while (LL_SPI_IsEnabled(FM24_SPI) != 0)
{
if (count-- == 0)
{
return;
}
else
{
__NOP();
}
}
}
/**
* @brief 关闭EEPROM FM24的写保护
*
* 此函数用于关闭EEPROM FM24的写保护功能，允许对其进行写操作。
*
* 调用此函数前，应确保EEPROM FM24的SPI接口已正确初始化。
*/
void eeprom_fm24_write_protection_close(void)
{
DBG_ASSERT(eeprom_fm24_get()->spi != NULL __DBG_LINE);
eeprom_fm24_enable();
eeprom_fm24_get()->spi->interface.u.normal.spi_write_reg(eeprom_fm24_get()->spi, eeprom_fm24_get()->spi->cfg.cmd_wrsr, 0);
eeprom_fm24_disable();
}
/**
* @brief 获取EEPROM FM24的写保护状态
*
* 获取EEPROM FM24的写保护状态。
*
* @return BOOL 返回TRUE表示没有写保护，返回FALSE表示有写保护
*/
BOOL eeprom_fm24_write_protection_state(void)
{
DBG_ASSERT(eeprom_fm24_get()->spi != NULL __DBG_LINE);
eeprom_fm24_enable();
eeprom_fm24_get()->write_protection.data = eeprom_fm24_get()->spi->interface.u.normal.spi_read_reg(eeprom_fm24_get()->spi, eeprom_fm24_get()->spi->cfg.cmd_rdsr);
eeprom_fm24_disable();
if (eeprom_fm24_get()->write_protection.bits.bp0 == 1 ||
eeprom_fm24_get()->write_protection.bits.bp1 == 1 ||
eeprom_fm24_get()->write_protection.bits.wpen == 1)
{
return FALSE;
}
else
{
return TRUE;
}
}
BOOL eeprom_fm24_write(uint32_t write_addr, uint8_t *data, uint16_t length)
{
BOOL ret = FALSE;
if (length == 0)
{
return ret;
}
// 开启和关闭SPI对读写实时性有影响
eeprom_fm24_enable();
ret = eeprom_fm24_get()->spi->interface.u.normal.spi_write(eeprom_fm24_get()->spi, write_addr, data, length);
eeprom_fm24_disable();
return ret;
}
BOOL eeprom_fm24_read(uint32_t read_addr, uint8_t *data, uint16_t length)
{
BOOL ret = FALSE;
if (length == 0)
{
return ret;
}
// 开启和关闭SPI对读写实时性有影响
eeprom_fm24_enable();
ret = eeprom_fm24_get()->spi->interface.u.normal.spi_read(eeprom_fm24_get()->spi, read_addr, data, length);
eeprom_fm24_disable();
return ret;
}
BOOL eeprom_fm24_test(void)
{
const uint8_t buf_size = 5;
uint16_t test_address = FM24_TEST_PAGE * FM24_PAGE_SIZE;
uint8_t buf[buf_size];
uint8_t rbuf[buf_size];
osel_memset(buf, 0, buf_size);
osel_memset(rbuf, 0, buf_size);
buf[0] = 0xD5;
buf[1] = 0xC8;
buf[2] = 0x00;
buf[3] = 0x01;
buf[4] = 0x02;
buf[buf_size - 1] = 0xfe;
eeprom_fm24_write(test_address, buf, buf_size);
__NOP();
eeprom_fm24_read(test_address, rbuf, buf_size);
if (osel_memcmp(buf, rbuf, buf_size) == 0)
{
return TRUE;
}
else
{
return FALSE;
}
}
/**
* @brief 获取FM24 EEPROM的状态
*
* 获取FM24 EEPROM的当前状态。该函数始终返回TRUE，表示EEPROM正常工作。
*
* @return BOOL 始终返回TRUE
*/
BOOL eeprom_fm24_status_get(void)
{
return TRUE;
}

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/**
* @file eeprom_fm24.h
* @author xxx
* @date 2023-08-30 14:05:55
* @brief FM24系列EEPROM驱动 https://zhuanlan.zhihu.com/p/598934638
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/
#ifndef __EEPROM_FM24_H__
#define __EEPROM_FM24_H__
#include "main.h"
#include "spis.h"
// High-endurance 100 trillion (1014) read/writes
//========在此设定芯片地址=============
#define W_ADD_COM 0xa0 // 写字节命令及器件地址(根据地址实际情况改变), 1010 A2 A1 A0 0
#define R_ADD_COM 0xa1 // 读命令字节及器件地址(根据地址实际情况改变), 1010 A2 A1 A0 1
//=======在此设定芯片型号, 1代表24C01; 16代表24C16; 512代表24C512
//=======在此设定芯片型号, 1代表24C01; 16代表24C16; 512代表24C512
#define e2prom 256 //
#if e2prom == 1
#define FM24_PAGE_SIZE 16
#define FM24_SIZE (128 * 8)
#elif e2prom == 2
#define FM24_PAGE_SIZE 16
#define FM24_SIZE (256 * 8)
#elif e2prom == 4
#define FM24_PAGE_SIZE 32
#define FM24_SIZE (512 * 8)
#elif e2prom == 8
#define FM24_PAGE_SIZE 64
#define FM24_SIZE (1024 * 8)
#elif e2prom == 16
#define FM24_PAGE_SIZE 128
#define FM24_SIZE (2048 * 8)
#elif e2prom == 32
#define FM24_PAGE_SIZE 128
#define FM24_SIZE (4096 * 8)
#elif e2prom == 64
#define FM24_PAGE_SIZE 256
#define FM24_SIZE (8192 * 8)
#elif e2prom == 128
#define FM24_PAGE_SIZE 256
#define FM24_SIZE (16384)
#elif e2prom == 256
#define FM24_PAGE_SIZE 256
#define FM24_SIZE (32768) // 32K 128页
#elif e2prom == 512
#define FM24_PAGE_SIZE 512
#define FM24_SIZE (65536)
#endif
#define FM24_CMD_RDSR 0x05 /*!< Read Status Register instruction */
#define FM24_CMD_WRSR 0x01 /*!< Write Status Register instruction */
#define FM24_CMD_WREN 0x06 /*!< Write enable instruction */
#define FM24_CMD_WRDI 0x04 /*!< Write disable instruction */
#define FM24_CMD_READ 0x03 /*!< Read from Memory instruction */
#define FM24_CMD_WRITE 0x02 /*!< Write to Memory instruction */
#define FM24_DUMMY_BYTE 0x00 ///< 无用数据
#define FM24_TEST_PAGE 0 ///< 测试页地址
typedef union
{
uint8_t data;
struct
{
uint8_t reserve1 : 1;
uint8_t wel : 1; ///< Write enable latch
uint8_t bp0 : 1; ///< Block protect 0
uint8_t bp1 : 1; ///< Block protect 1
uint8_t reserve2 : 3;
uint8_t wpen : 1; ///< Write protect enable
} bits;
} fm24_write_protection_u;
typedef struct
{
fm24_write_protection_u write_protection;
spi_t *spi;
} fm24_t;
/**
* @brief Initializes the FM24 EEPROM module.
*/
extern void eeprom_fm24_init(void);
/**
* @brief Deinitializes the FM24 EEPROM module.
*/
extern void eeprom_fm24_dinit(void);
/**
* @brief Gets the fm24_t handle of the FM24 EEPROM module.
* @return The fm24_t handle of the FM24 EEPROM module.
*/
extern fm24_t *eeprom_fm24_get(void);
/**
* @brief Enables the FM24 EEPROM module.
*/
extern void eeprom_fm24_enable(void);
/**
* @brief Disables the FM24 EEPROM module.
*/
extern void eeprom_fm24_disable(void);
/**
* @brief Reads data from the FM24 EEPROM module.
* @param read_addr The starting address to read from.
* @param data Pointer to the buffer to store the read data.
* @param length The number of bytes to read.
* @return TRUE if the read operation is successful, FALSE otherwise.
*/
extern BOOL eeprom_fm24_read(uint32_t read_addr, uint8_t *data, uint16_t length);
/**
* @brief Writes data to the FM24 EEPROM module.
* @param write_addr The starting address to write to.
* @param data Pointer to the data to be written.
* @param length The number of bytes to write.
* @return TRUE if the write operation is successful, FALSE otherwise.
*/
extern BOOL eeprom_fm24_write(uint32_t write_addr, uint8_t *data, uint16_t length);
/**
* @brief Closes the write protection of the FM24 EEPROM module.
*/
extern void eeprom_fm24_write_protection_close(void);
/**
* @brief Gets the write protection state of the FM24 EEPROM module.
* @return TRUE if the FM24 EEPROM module is not write-protected, FALSE otherwise.
*/
extern BOOL eeprom_fm24_write_protection_state(void);
/**
* @brief Performs a test on the FM24 EEPROM module.
*/
extern BOOL eeprom_fm24_test(void);
/**
* @brief Gets the status of the FM24 EEPROM module.
* @return TRUE if the FM24 EEPROM module is ready, FALSE otherwise.
*/
extern BOOL eeprom_fm24_status_get(void);
#endif // __EEPROM_FM24_H__

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#include "eeprom_lc02b.h"
#include "delay.h"
#define W_ADD_COM 0xa8 // 写字节命令及器件地址(根据地址实际情况改变), 1010 A2 A1 A0 0
#define R_ADD_COM 0xa9 // 读命令字节及器件地址(根据地址实际情况改变), 1010 A2 A1 A0 1
#define PAGE_SIZE 8U
#define SIZE 256U
#define EEPROM_LC02B_SDA_PORT I2C1_SDA_GPIO_Port
#define EEPROM_LC02B_SDA_PIN I2C1_SDA_Pin
#define EEPROM_LC02B_SCL_PORT I2C1_SCL_GPIO_Port
#define EEPROM_LC02B_SCL_PIN I2C1_SCL_Pin
static i2c_t *eeprom_24lc028bt_i2c;
void eeprom_lc02b_test(void)
{
#define TEST_SIZE 15
uint16_t test_address = SIZE - TEST_SIZE;
uint8_t buf[TEST_SIZE];
for (uint8_t i = 0; i < TEST_SIZE; i++)
{
buf[i] = i + 1;
}
eeprom_lc02b_write(test_address, buf, TEST_SIZE);
LL_mDelay(10);
osel_memset(buf, 0, ARRAY_LEN(buf));
eeprom_lc02b_read(test_address, buf, TEST_SIZE);
__NOP();
}
/**
* @brief 获取EEPROM LC02B的状态
*
* 此函数用于获取EEPROM LC02B的当前状态。
*
* @return 如果EEPROM LC02B处于正常状态，则返回TRUE；否则返回FALSE。
* 注意：在本实现中，总是返回TRUE，因为这是一个简单的示例函数。
*/
BOOL eeprom_lc02b_status_get(void)
{
return TRUE;
}
/**
* @brief EEPROM LC02B初始化
* @return {*}
* @note
*/
void eeprom_lc02b_init(void)
{
i2c_gpio_group_t gpios;
gpios.scl = gpio_create(EEPROM_LC02B_SCL_PORT, EEPROM_LC02B_SCL_PIN);
gpios.sda = gpio_create(EEPROM_LC02B_SDA_PORT, EEPROM_LC02B_SDA_PIN);
eeprom_24lc028bt_i2c = i2c_create(gpios, 10);
// eeprom_lc02b_test();
}
/**
* @brief EEPROM LC02B反初始化
* @return {*}
* @note
*/
void eeprom_lc02b_dinit(void)
{
GPIO_SET_ANALOG(EEPROM_LC02B_SDA_PORT, EEPROM_LC02B_SDA_PIN);
GPIO_SET_ANALOG(EEPROM_LC02B_SCL_PORT, EEPROM_LC02B_SCL_PIN);
}
/**
* @brief 写入数据
* @param {uint32_t} write_addr
* @param {uint8_t} *data
* @param {uint16_t} length
* @return {*}
* @note
*/
void eeprom_lc02b_write(uint32_t write_addr, uint8_t *data, uint16_t length)
{
// 发送开始信号
eeprom_24lc028bt_i2c->interface.start(eeprom_24lc028bt_i2c);
// 发送写入地址命令
eeprom_24lc028bt_i2c->interface.write_byte(eeprom_24lc028bt_i2c, W_ADD_COM);
// 等待写入地址命令响应
eeprom_24lc028bt_i2c->interface.wait_ack(eeprom_24lc028bt_i2c);
// 发送要写入的地址
eeprom_24lc028bt_i2c->interface.write_byte(eeprom_24lc028bt_i2c, (uint8_t)write_addr);
eeprom_24lc028bt_i2c->interface.wait_ack(eeprom_24lc028bt_i2c);
// 循环写入数据
for (uint16_t i = 0; i < length; i++)
{
// 写入一个字节数据
eeprom_24lc028bt_i2c->interface.write_byte(eeprom_24lc028bt_i2c, *data++);
// 等待响应
eeprom_24lc028bt_i2c->interface.wait_ack(eeprom_24lc028bt_i2c);
write_addr++;
if (write_addr % PAGE_SIZE == 0)
{
eeprom_24lc028bt_i2c->interface.stop(eeprom_24lc028bt_i2c);
LL_mDelay(10); // 延时10ms，等待写入完成
eeprom_24lc028bt_i2c->interface.start(eeprom_24lc028bt_i2c);
eeprom_24lc028bt_i2c->interface.write_byte(eeprom_24lc028bt_i2c, W_ADD_COM);
eeprom_24lc028bt_i2c->interface.wait_ack(eeprom_24lc028bt_i2c);
eeprom_24lc028bt_i2c->interface.write_byte(eeprom_24lc028bt_i2c, (uint8_t)write_addr);
eeprom_24lc028bt_i2c->interface.wait_ack(eeprom_24lc028bt_i2c);
}
}
// 写入完成，停止I2C总线
eeprom_24lc028bt_i2c->interface.stop(eeprom_24lc028bt_i2c);
}
/**
* @brief 读取数据
* @param {uint32_t} read_addr
* @param {uint8_t} *data
* @param {uint16_t} length
* @return {*}
* @note
*/
void eeprom_lc02b_read(uint32_t read_addr, uint8_t *data, uint16_t length)
{
// 发送开始信号
eeprom_24lc028bt_i2c->interface.start(eeprom_24lc028bt_i2c);
// 发送写入地址命令
eeprom_24lc028bt_i2c->interface.write_byte(eeprom_24lc028bt_i2c, W_ADD_COM);
// 等待写入地址命令响应
eeprom_24lc028bt_i2c->interface.wait_ack(eeprom_24lc028bt_i2c);
// 发送要读取的地址
eeprom_24lc028bt_i2c->interface.write_byte(eeprom_24lc028bt_i2c, (uint8_t)read_addr);
eeprom_24lc028bt_i2c->interface.wait_ack(eeprom_24lc028bt_i2c);
// 发送开始信号
eeprom_24lc028bt_i2c->interface.start(eeprom_24lc028bt_i2c);
// 发送读取地址命令
eeprom_24lc028bt_i2c->interface.write_byte(eeprom_24lc028bt_i2c, R_ADD_COM);
// 等待读取地址命令响应
eeprom_24lc028bt_i2c->interface.wait_ack(eeprom_24lc028bt_i2c);
// 循环读取数据
for (uint16_t i = 0; i < length - 1; i++)
{
// 读取一个字节数据
*data++ = eeprom_24lc028bt_i2c->interface.read_byte(eeprom_24lc028bt_i2c, TRUE);
}
*data++ = eeprom_24lc028bt_i2c->interface.read_byte(eeprom_24lc028bt_i2c, FALSE);
// 停止I2C总线
eeprom_24lc028bt_i2c->interface.stop(eeprom_24lc028bt_i2c);
}

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/**
* @file eeprom_lc02b.h
* @author xxx
* @date 2023-12-27 14:44:02
* @brief
* @copyright Copyright (c) 2024 by xxx, All Rights Reserved.
*/
#ifndef __EEPROM_LC02B_H
#define __EEPROM_LC02B_H
#include "main.h"
#include "entity.h"
#define PRRESSURE_CALIBRATION_ADDRESS 0x00 ///< 压力校准地址
/**
* @brief Initializes the LC02B EEPROM module.
*/
void eeprom_lc02b_init(void);
/**
* @brief Deinitializes the LC02B EEPROM module.
*/
void eeprom_lc02b_dinit(void);
/**
* @brief Writes data to the LC02B EEPROM module.
*
* @param write_addr The starting address to write the data.
* @param data The pointer to the data to be written.
* @param length The length of the data to be written.
*/
void eeprom_lc02b_write(uint32_t write_addr, uint8_t *data, uint16_t length);
/**
* @brief Reads data from the LC02B EEPROM module.
*
* @param read_addr The starting address to read the data.
* @param data The pointer to store the read data.
* @param length The length of the data to be read.
*/
void eeprom_lc02b_read(uint32_t read_addr, uint8_t *data, uint16_t length);
/**
* @brief Performs a test on the LC02B EEPROM module.
*/
void eeprom_lc02b_test(void);
/**
* @brief Gets the LC02B EEPROM status.
*
* This function is used to get the current status of the LC02B EEPROM.
*
* @return TRUE if the LC02B EEPROM is in normal status, FALSE otherwise.
*/
BOOL eeprom_lc02b_status_get(void);
#endif ///< !__EEPROM_LC02B_H

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/**
* @file eeprom_m95.c
* @author xxx
* @date 2023-08-30 08:58:43
* @brief 用于实现M95 EEPROM相关的读写操作
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/
#include "eeprom_m95.h"
#include "spis.h"
#include "delay.h"
#include "entity.h"
#include "board.h"
#include "diagnosis.h"
#include "storage.h"
#define M95_SPI SPI1
#define EEPROM_M95_1_CS_PORT EE1_CS_GPIO_Port
#define EEPROM_M95_1_CS_PIN EE1_CS_Pin
#define EEPROM_M95_2_CS_PORT EE2_CS_GPIO_Port
#define EEPROM_M95_2_CS_PIN EE2_CS_Pin
// 下面宏定义为2个EEPROM_M95的引脚定义
#define EEPROM_M95_MOSI_PORT SPI_MOSI_GPIO_Port
#define EEPROM_M95_MOSI_PIN SPI_MOSI_Pin
#define EEPROM_M95_MISO_PORT SPI_MISO_GPIO_Port
#define EEPROM_M95_MISO_PIN SPI_MISO_Pin
#define EEPROM_M95_SCK_PORT SPI_CLK_GPIO_Port
#define EEPROM_M95_SCK_PIN SPI_CLK_Pin
m95_number_t eeprom_m95s[M95_MAX];
/**
* @brief 初始化EEPROM_M95eeprom_m95s
* @param {m95_number_e} num
* @return {*}
* @note 初始化函数对板卡上不同的芯片定义了块大小
*/
void eeprom_m95_init(m95_number_e num)
{
DBG_ASSERT(num < M95_MAX __DBG_LINE);
spi_gpio_group_t gpios;
spi_t *eeprom_m95_spi;
spi_normal_config_t cfg;
osel_memset((uint8_t *)&cfg, 0, sizeof(spi_normal_config_t));
cfg.cmd_rdsr = M95_CMD_RDSR;
cfg.cmd_wrsr = M95_CMD_WRSR;
cfg.cmd_wren = M95_CMD_WREN;
cfg.cmd_wrdi = M95_CMD_WRDI;
cfg.cmd_write = M95_CMD_WRITE;
cfg.cmd_read = M95_CMD_READ;
cfg.dummy_byte = M95_DUMMY_BYTE;
cfg.continuous_write = FALSE;
// 128 byte
if (num == M95_1)
{
// 创建CS引脚
gpios.cs = gpio_create(EEPROM_M95_1_CS_PORT, EEPROM_M95_1_CS_PIN);
cfg.address_bytes = 3;
cfg.page_size = M95_PAGE_SIZE_256;
cfg.total_size = _M95M02_;
}
// 256 byte
else if (num == M95_2)
{
// 创建CS引脚
gpios.cs = gpio_create(EEPROM_M95_2_CS_PORT, EEPROM_M95_2_CS_PIN);
cfg.address_bytes = 3;
cfg.page_size = M95_PAGE_SIZE_256;
cfg.total_size = _M95M02_;
}
else
{
DBG_ASSERT(FALSE __DBG_LINE);
}
gpios.mosi = gpio_create(EEPROM_M95_MOSI_PORT, EEPROM_M95_MOSI_PIN);
gpios.sck = gpio_create(EEPROM_M95_SCK_PORT, EEPROM_M95_SCK_PIN);
gpios.miso = gpio_create(EEPROM_M95_MISO_PORT, EEPROM_M95_MISO_PIN);
gpios.rst = gpio_create(NULL, 0);
gpios.rdy = gpio_create(NULL, 0);
// 创建SPI对象
eeprom_m95_spi = spi_create(SPI_TYPE_NORMAL, gpios, 10);
DBG_ASSERT(eeprom_m95_spi != NULL __DBG_LINE);
osel_memcpy((uint8_t *)&eeprom_m95_spi->cfg, (uint8_t *)&cfg, sizeof(spi_normal_config_t));
// 使能SPI
eeprom_m95_spi->interface.hardware_enable(eeprom_m95_spi, M95_SPI);
eeprom_m95s[num].num = num;
eeprom_m95s[num].spi = eeprom_m95_spi;
// 这里需要设置，否则读出的数据不对
eeprom_m95_spi->interface.u.normal.spi_reset(eeprom_m95_spi);
eeprom_m95_write_protection_close(num); // 关闭写保护
// eeprom_m95_test(num);
}
/**
* @brief 反初始化EEPROM_M95
* @param {m95_number_e} num
* @return {*}
* @note
*/
void eeprom_m95_dinit(m95_number_e num)
{
LL_SPI_Disable(M95_SPI);
GPIO_SET_ANALOG(eeprom_m95s[num].spi->gpios.mosi->port, eeprom_m95s[num].spi->gpios.mosi->pin);
GPIO_SET_ANALOG(eeprom_m95s[num].spi->gpios.miso->port, eeprom_m95s[num].spi->gpios.miso->pin);
GPIO_SET_ANALOG(eeprom_m95s[num].spi->gpios.sck->port, eeprom_m95s[num].spi->gpios.sck->pin);
GPIO_SET_ANALOG(eeprom_m95s[num].spi->gpios.cs->port, eeprom_m95s[num].spi->gpios.cs->pin);
}
/**
* @brief M95 EEPROM使能
* @return {*}
* @note
*/
void eeprom_m95_enable(void)
{
uint16_t count = 100;
LL_SPI_Enable(M95_SPI);
// 判断SPI是否使能成功
while (LL_SPI_IsEnabled(M95_SPI) != 1)
{
if (count-- == 0)
{
return;
}
else
{
__NOP();
}
}
}
/**
* @brief M95 EEPROM失能
* @return {*}
* @note
*/
void eeprom_m95_disable(void)
{
uint16_t count = 100;
LL_SPI_Disable(M95_SPI);
// 判断SPI是否关闭成功
while (LL_SPI_IsEnabled(M95_SPI) != 0)
{
if (count-- == 0)
{
return;
}
else
{
__NOP();
}
}
}
/**
* @brief 关闭EEPROM M95写保护
*
* 关闭指定M95 EEPROM的写保护功能。
*
* @param num 指定M95 EEPROM的编号
*/
void eeprom_m95_write_protection_close(m95_number_e num)
{
spi_t *handle = eeprom_m95s[num].spi;
DBG_ASSERT(handle != NULL __DBG_LINE);
eeprom_m95_enable();
handle->interface.u.normal.spi_write_reg(handle, handle->cfg.cmd_wrsr, 0);
eeprom_m95_disable();
}
/**
* @brief 获取M95 EEPROM写保护状态(软件)
*
* 根据传入的M95编号获取其写保护状态。
*
* @param num M95编号
* @return 如果M95 EEPROM处于写保护状态，则返回FALSE；否则返回TRUE。
*/
BOOL eeprom_m95_write_protection_state(m95_number_e num)
{
spi_t *handle = eeprom_m95s[num].spi;
DBG_ASSERT(handle != NULL __DBG_LINE);
eeprom_m95_enable();
eeprom_m95s[num].write_protection.data = handle->interface.u.normal.spi_read_reg(handle, handle->cfg.cmd_rdsr);
eeprom_m95_disable();
if (eeprom_m95s[num].write_protection.bits.bp0 == 1 ||
eeprom_m95s[num].write_protection.bits.bp1 == 1 ||
eeprom_m95s[num].write_protection.bits.srwd == 1)
{
return FALSE;
}
else
{
return TRUE;
}
}
/**
* @brief 读取M95 EEPROM内存数据
* @param num EEPROM模块编号（0或1）
* @param read_addr 要读取的地址
* @param data 存储读取数据的缓冲区
* @param length 要读取的数据长度
* @return {*}
*/
BOOL eeprom_m95_read(m95_number_e num, uint32_t read_addr, uint8_t *data, uint16_t length)
{
BOOL ret = FALSE;
if (length == 0)
{
return ret;
}
spi_t *eeprom_m95_spi = eeprom_m95s[num].spi; // 获取EEPROM模块的SPI配置
DBG_ASSERT(eeprom_m95_spi != NULL __DBG_LINE);
// 开启和关闭SPI对读写实时性有影响
eeprom_m95_enable();
ret = eeprom_m95_spi->interface.u.normal.spi_read(eeprom_m95_spi, read_addr, data, length);
eeprom_m95_disable();
return ret;
}
/**
* @brief 向M95 EEPROM内存写入数据
* @param num EEPROM模块编号（0或1）
* @param write_addr 要写入的地址
* @param data 包含要写入数据的缓冲区
* @param length 要写入的数据长度
* @return {*}
*/
BOOL eeprom_m95_write(m95_number_e num, uint32_t write_addr, uint8_t *data, uint16_t length)
{
BOOL ret = FALSE;
if (length == 0)
{
return ret;
}
spi_t *eeprom_m95_spi = eeprom_m95s[num].spi;
DBG_ASSERT(eeprom_m95_spi != NULL __DBG_LINE);
// 开启和关闭SPI对读写实时性有影响
eeprom_m95_enable();
ret = eeprom_m95_spi->interface.u.normal.spi_write(eeprom_m95_spi, write_addr, data, length);
eeprom_m95_disable();
return ret;
}
BOOL eeprom_m95_1_read(uint32_t addr, uint8_t *buf, uint16_t size)
{
return eeprom_m95_read(M95_1, addr, buf, size);
}
BOOL eeprom_m95_1_write(uint32_t addr, uint8_t *buf, uint16_t size)
{
return eeprom_m95_write(M95_1, addr, (uint8_t *)buf, size);
}
BOOL eeprom_m95_2_read(uint32_t addr, uint8_t *buf, uint16_t size)
{
return eeprom_m95_read(M95_2, addr, buf, size);
}
BOOL eeprom_m95_2_write(uint32_t addr, uint8_t *buf, uint16_t size)
{
return eeprom_m95_write(M95_2, addr, (uint8_t *)buf, size);
}
/**
* @brief 用于M95 EEPROM测试
* @param {m95_number_e} num
* @return {*}
* @note
*/
BOOL eeprom_m95_test(m95_number_e num)
{
const uint8_t buf_size = 5;
storage_t *st = storage_init(M95_TEST_PAGE * M95_PAGE_SIZE_256, M95_PAGE_SIZE_256);
DBG_ASSERT(st != NULL __DBG_LINE);
if (num == M95_1)
{
st->ops.read = eeprom_m95_1_read;
st->ops.write = eeprom_m95_1_write;
}
else
{
st->ops.read = eeprom_m95_2_read;
st->ops.write = eeprom_m95_2_write;
}
uint8_t buf[buf_size];
uint8_t rbuf[buf_size];
storage_add_node(st, 0, buf_size);
osel_memset(buf, 0, buf_size);
buf[0] = 0xD5;
buf[1] = 0xC8;
buf[2] = num;
buf[3] = 0xaa;
buf[4] = 0xbb;
storage_write(st, 0, buf);
__NOP();
storage_read(st, 0, rbuf);
storage_destroy(st);
if (osel_memcmp(buf, rbuf, buf_size) == 0)
{
return TRUE;
}
else
{
return FALSE;
}
}
/**
* @brief 获取EEPROM M95状态
*
* 获取EEPROM M95设备的工作状态。
*
* @param num EEPROM M95设备编号
*
* @return 如果EEPROM M95设备正常工作，返回TRUE；否则返回FALSE
*/
BOOL eeprom_m95_status_get(m95_number_e num)
{
return TRUE;
}

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/**
* @file eeprom_m95.h
* @author xxx
* @date 2023-08-30 14:05:55
* @brief 头文件 eeprom_m95.h
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/
#ifndef __EEPROM_M95_H
#define __EEPROM_M95_H
#include "main.h"
#include "spis.h"
#define _M95010_ 128
#define _M95020_ 256
#define _M95040_ 512
#define _M95080_ 1024
#define _M95160_ 2048
#define _M95320_ 4096
#define _M95640_ 8192
#define _M95128_ 16384
#define _M95256_ 32768
#define _M95512_ 65536 ///< 65K
#define _M95M02_ 262144 ///< 256K
#define _M95_SIZE _M95512_
#define M95_CMD_RDSR 0x05 /*!< Read Status Register instruction */
#define M95_CMD_WRSR 0x01 /*!< Write Status Register instruction */
#define M95_CMD_WREN 0x06 /*!< Write enable instruction */
#define M95_CMD_WRDI 0x04 /*!< Write disable instruction */
#define M95_CMD_READ 0x03 /*!< Read from Memory instruction */
#define M95_CMD_WRITE 0x02 /*!< Write to Memory instruction */
///< Instruction available only for the M95_2-D device.
#define M95_CMD_RDID 0x83 /*!< Read identification page*/
#define M95_CMD_WRID 0x82 /*!< Write identification page*/
#define M95_CMD_RDLS 0x83 /*!< Reads the Identification page lock status*/
#define M95_CMD_LID 0x82 /*!< Locks the Identification page in read-only mode*/
#define M95_DUMMY_BYTE 0xA5 ///< 虚拟字节
#define M95_TEST_PAGE 0 ///< 测试页地址
///< 定义存储器大小(Bytes)
typedef enum
{
M95_PAGE_SIZE_16 = 16, ///< _M95010_ 、_M95020_ 、_M95040_
M95_PAGE_SIZE_32 = 32, ///< _M95080_ 、_M95160_、_M95320_、_M95640_
M95_PAGE_SIZE_64 = 64, ///< _M95128_、_M95256_
M95_PAGE_SIZE_128 = 128, ///< _M95512_
M95_PAGE_SIZE_256 = 256, ///< _M95M02_
} m95_page_size_e;
typedef enum
{
M95_1,
M95_2,
M95_MAX,
} m95_number_e; ///< 板卡上2块m95芯片定义
typedef union
{
uint8_t data;
struct
{
uint8_t wip : 1; ///< Write in progress
uint8_t wel : 1; ///< Write enable latch
uint8_t bp0 : 1; ///< Block protect 0
uint8_t bp1 : 1; ///< Block protect 1
uint8_t reserve : 3;
uint8_t srwd : 1; ///< Status register write protect
} bits;
} m95_write_protection_u;
typedef struct
{
m95_number_e num;
m95_write_protection_u write_protection;
spi_t *spi;
} m95_number_t;
extern m95_number_t eeprom_m95s[M95_MAX]; ///< m95芯片数组
/**
* @brief Initializes the M95 EEPROM module.
*
* @param num The M95 EEPROM number.
*/
extern void eeprom_m95_init(m95_number_e num);
/**
* @brief Deinitializes the M95 EEPROM module.
*
* @param num The M95 EEPROM number.
*/
extern void eeprom_m95_dinit(m95_number_e num);
/**
* @brief Enables the M95 EEPROM module.
*/
extern void eeprom_m95_enable(void);
/**
* @brief Disables the M95 EEPROM module.
*/
extern void eeprom_m95_disable(void);
/**
* @brief Closes the write protection of the M95 EEPROM module.
*
* @param num The M95 EEPROM number.
*/
extern void eeprom_m95_write_protection_close(m95_number_e num);
/**
* @brief write protection state of the M95 EEPROM module.
*
* @param num The M95 EEPROM number.
*/
extern BOOL eeprom_m95_write_protection_state(m95_number_e num);
/**
* @brief Reads data from the M95 EEPROM module.
*
* @param num The M95 EEPROM number.
* @param read_addr The address to read from.
* @param data The buffer to store the read data.
* @param length The number of bytes to read.
*/
extern BOOL eeprom_m95_read(m95_number_e num, uint32_t read_addr, uint8_t *data, uint16_t length);
/**
* @brief Writes data to the M95 EEPROM module.
*
* @param num The M95 EEPROM number.
* @param write_addr The address to write to.
* @param data The data to write.
* @param length The number of bytes to write.
*/
extern BOOL eeprom_m95_write(m95_number_e num, uint32_t write_addr, uint8_t *data, uint16_t length);
/**
* @brief Performs a test on the M95 EEPROM module.
*
* @param num The M95 EEPROM number.
*/
extern BOOL eeprom_m95_test(m95_number_e num);
/**
* @brief Gets the status of the M95 EEPROM module.
*
* @param num The M95 EEPROM number.
*/
extern BOOL eeprom_m95_status_get(m95_number_e num);
extern BOOL eeprom_m95_1_read(uint32_t addr, uint8_t *buf, uint16_t size);
extern BOOL eeprom_m95_1_write(uint32_t addr, uint8_t *buf, uint16_t size);
extern BOOL eeprom_m95_2_read(uint32_t addr, uint8_t *buf, uint16_t size);
extern BOOL eeprom_m95_2_write(uint32_t addr, uint8_t *buf, uint16_t size);
#endif ///< __EEPROM_M95_H

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/**
* @file ntc_3950.c
* @author xxx
* @date 2023-08-30 08:58:43
* @brief 用于实现NTC的应用功能
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/
#include "ntc_3950.h"
#define CPU_VREF 2.5
#define NTC_VREF 2.5
#define TABLE_SIZE 185
#define NTC_SERIES_RESISTOR 200000 ///< 200K
#define BASE_TEMP -55
const uint32_t _table[TABLE_SIZE] = {
8989000, 8242680, 7592960, 7021380, 6513750, // -55,-54,-53,-52,-51
6059060, 5648680, 5275800, 4935020, 4621990, 4333220, 4065840, 3817520, 3586310, 3370600, // -50,-49,-48,-47,-46,-45,-44,-43,-42,-41
3169000, 2980330, 2803600, 2637910, 2482470, 2336580, 2199620, 2071020, 1950230, 1836790, // -40,-39,-38,-37,-36,-35,-34,-33,-32,-31
1730230, 1630150, 1536140, 1447840, 1364900, 1287000, 1213820, 1145090, 1080530, 1019890, // -30,-29,-28,-27,-26,-25,-24,-23,-22,-21
962912, 909379, 859074, 811797, 767359, 725581, 686296, 649348, 614590, 581883, // -20,-19,-18,-17,-16,-15,-14,-13,-12,-11
551100, 522117, 494824, 469113, 444886, 422050, 400518, 380209, 361048, 342963, // -10,-9,-8,-7,-6,-5,-4,-3,-2,-1
326560, 309764, 294529, 280131, 266520, 253647, 241470, 229946, 219036, 208706, // 0,1, 2, 3,4,5,6,7,8,9
198920, 189647, 180857, 172523, 164618, 157118, 150000, 143243, 136827, 130731, // 10,11 ,12, 13,14,15,16,17,18,19
124940, 119435, 114202, 109225, 104491, 100000, 95699, 91617, 87731, 84028, // 20,21, 22, 23,24,25,26,27,28,29
80501, 77140, 73936, 70881, 67968, 65188, 62537, 60006, 57590, 55283, // 30,31, 32, 33,34,35,36,37,38,39
53080, 50976, 48965, 47044, 45207, 43451, 41771, 40165, 38628, 37157, // 40,41, 42, 43,34,35,36,37,38,39
35750, 34402, 33112, 31876, 30692, 29558, 28471, 27429, 26430, 25472, // 50,51, 52, 53,54,55,56,57,58,59
24554, 23672, 22827, 22016, 21237, 20489, 19771, 19082, 18420, 17784, // 60,61, 62, 63,64,65,66,67,68,69
17172, 16585, 16020, 15477, 14955, 14453, 13970, 13505, 13058, 12628, // 70,71, 72, 73,74,75,76,77,78,79
12213, 11815, 11431, 11061, 10705, 10362, 10031, 9712, 9405, 9110, // 80,81, 82, 83,84,85,86,87,88,89
8824, 8549, 8284, 8028, 7782, 7544, 7314, 7093, 6879, 6673, // 90,91, 92, 93,94,95,96,97,98,99
6474, 6281, 6096, 5916, 5743, 5576, 5415, 5259, 5108, 4963, // 101,102, 103,104,105,106,107,108,109
4822, 4687, 4555, 4428, 4306, 4187, 4073, 3962, 3855, 3751, // 111,112, 113,114,115,116,117,118,119
3651, 3555, 3461, 3371, 3283, 3199, 3100, 3099, 2899, 2799, // 121,122, 123,124,125,126,127,128,129
};
/**
* @brief 温度查表
* @param {uint32_t} *list
* @param {uint32_t} rt
* @return {*}
* @note
*/
static uint8_t ntc_lookup(const uint32_t *list, uint32_t rt)
{
uint8_t middle = 0;
uint8_t indexL = 0;
uint8_t indexR = TABLE_SIZE - 1;
if (rt >= *(list + 0))
return 0;
if (rt <= *(list + TABLE_SIZE - 1))
return TABLE_SIZE - 1;
while ((indexR - indexL) > 1)
{
middle = (indexL + indexR) >> 1;
if (rt == *(list + middle))
return middle;
else if (rt > *(list + middle))
indexR = middle;
else if (rt < *(list + middle))
indexL = middle;
}
return indexL;
}
/**
* @brief 获取温度值，单位为0.1摄氏度
* @param {uint16_t} adc采集值
* @return {float32_u} 温度值
* @note
*/
float32_u ntc_get_temp(uint16_t adc)
{
uint8_t index = 0;
int16_t data = 0;
int16_t t = 0;
int16_t result = 0;
uint32_t rt = 0;
const int16_t base = BASE_TEMP * 10;
float32_u res;
res.f = BASE_TEMP;
/**
* ad = (4095*rt)/(rt+10000)
*
* rt = (ad*NTC_SERIES_RESISTOR*CPU_VREF)/(NTC_VREF*4095-CPU_VREF*ad)
*/
rt = (adc * NTC_SERIES_RESISTOR * CPU_VREF) / (NTC_VREF * 4095 - CPU_VREF * adc);
index = ntc_lookup(_table, rt);
if (rt >= _table[0])
return res;
if (rt <= *(_table + TABLE_SIZE - 1))
{
result = (TABLE_SIZE - 1) * 10 + base;
}
else
{
data = _table[index] - _table[index + 1];
t = 10 * (_table[index] - rt) / data;
result = base + index * 10 + t;
}
res.f = result / 10.0;
return res;
}

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/**
* @file ntc_3950.h
* @author xxx
* @date 2023-08-30 14:05:55
* @brief 头文件 ntc_3950.h
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/
#ifndef __NTC_B3950_H__
#define __NTC_B3950_H__
#include "main.h"
extern float32_u ntc_get_temp(uint16_t adc); ///< 获取温度值
#endif ///< __NTC_B3950_H__

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/**
* @file rtc_rx8010.c
* @author xxx
* @date 2023-08-30 08:58:43
* @brief 用于实现RTC芯片RX8010的应用功能
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/
#include "rtc_rx8010.h"
#include "i2cs.h"
#include "delay.h"
#define RTC_RX8010_SDA_PORT RTC_SDA_GPIO_Port
#define RTC_RX8010_SDA_PIN RTC_SDA_Pin
#define RTC_RX8010_SCL_PORT RTC_SCL_GPIO_Port
#define RTC_RX8010_SCL_PIN RTC_SCL_Pin
static i2c_t *rtc;
/* sec, min, hour, week, day, month, year */
// static uint8_t calendar[7] = {0, 0, 0, 1, 29, 2, 98};
/**
* @brief 从RTC芯片的指定地址读取一个字节数据
* @param {uint8_t} *read_buf
* @param {uint8_t} addr
* @return {*}
*/
static BOOL rtc_read_byte(uint8_t *read_buf, uint8_t addr)
{
uint8_t *p = read_buf;
/* 发送起始信号 */
rtc->interface.start(rtc);
/* 发送从机地址 + 读写方向 */
rtc->interface.write_byte(rtc, RTC_WR_ADDR); /* 此处是写方向，因为要发送读地址 */
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 发送读地址 */
rtc->interface.write_byte(rtc, addr);
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 重新发送起始信号。前面的代码的目的向RTC传送地址，下面开始读取数据 */
rtc->interface.start(rtc);
/* 发送从机地址 + 读写方向 */
rtc->interface.write_byte(rtc, RTC_RD_ADDR); /* 此处是读方向，因为要开始读数据了 */
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 读取数据 */
*p = rtc->interface.read_byte(rtc, FALSE); /* 读1个字节 */
/* 命令执行成功，发送I2C总线停止信号 */
rtc->interface.stop(rtc);
return TRUE;
}
/**
* @brief 从RTC芯片的指定地址读取若干数据
* @param {uint8_t} *read_buf
* @param {uint8_t} addr
* @param {int} size
* @return {*}
*/
static BOOL rtc_read_bytes(uint8_t *read_buf, uint8_t addr, int size)
{
int i = 0;
/* 发送起始信号 */
rtc->interface.start(rtc);
/* 发送从机地址 + 读写方向 */
rtc->interface.write_byte(rtc, RTC_WR_ADDR); /* 此处是写方向，因为要发送读地址 */
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 发送读地址 */
rtc->interface.write_byte(rtc, addr);
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 重新发送起始信号。前面的代码的目的向RTC传送地址，下面开始读取数据 */
rtc->interface.start(rtc);
/* 发送从机地址 + 读写方向 */
rtc->interface.write_byte(rtc, RTC_RD_ADDR); /* 此处是读方向，因为要开始读数据了 */
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 循环读取数据，RTC芯片地址自动自增 */
for (i = 0; i < size; i++)
{
/* 每读完1个字节后，需要发送Ack， 最后一个字节需要发Nack */
if (i != (size - 1))
{
read_buf[i] = rtc->interface.read_byte(rtc, TRUE); /* 读1个字节 */
}
else
{
read_buf[i] = rtc->interface.read_byte(rtc, FALSE); /* 读1个字节 */
}
}
/* 命令执行成功，发送I2C总线停止信号 */
rtc->interface.stop(rtc);
return TRUE;
}
/**
* @brief 向RTC芯片的指定地址写入一个数据
* @param {uint8_t} data
* @param {uint8_t} addr
* @return {*}
* @note
*/
static BOOL rtc_write_byte(uint8_t data, uint8_t addr)
{
int retry = 0;
/* 尝试与RTC芯片建立I2C通讯 */
for (retry = 0; retry < 100; retry++)
{
rtc->interface.start(rtc); /* 发送起始信号 */
rtc->interface.write_byte(rtc, RTC_WR_ADDR); /* 发送从机地址 + 读写方向 */
if (rtc->interface.wait_ack(rtc) == TRUE)
{
break;
}
}
if (retry == 100)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 发送起始写地址 */
rtc->interface.write_byte(rtc, addr);
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 写入数据 */
rtc->interface.write_byte(rtc, data);
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 命令执行成功，发送I2C总线停止信号 */
rtc->interface.stop(rtc);
return TRUE;
}
/**
* @brief 向RTC芯片的指定地址写入若干数据
* @param {uint8_t} *write_buf
* @param {uint8_t} addr
* @param {int} size
* @return {*}
* @note
*/
static BOOL rtc_write_bytes(uint8_t *write_buf, uint8_t addr, int size)
{
int i = 0;
int retry = 0;
for (i = 0; i < size; i++)
{
if (i == 0)
{
/* 尝试与RTC芯片建立I2C通讯 */
for (retry = 0; retry < 100; retry++)
{
rtc->interface.start(rtc); /* 发送起始信号 */
rtc->interface.write_byte(rtc, RTC_WR_ADDR); /* 发送从机地址 + 读写方向 */
if (rtc->interface.wait_ack(rtc) == TRUE)
{
break;
}
}
if (retry == 100)
{
rtc->interface.stop(rtc);
return FALSE;
}
/* 发送起始写地址 */
rtc->interface.write_byte(rtc, addr);
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
}
/* 循环写入数据，RTC芯片地址自动自增 */
rtc->interface.write_byte(rtc, write_buf[i]);
if (rtc->interface.wait_ack(rtc) != TRUE)
{
rtc->interface.stop(rtc);
return FALSE;
}
}
/* 命令执行成功，发送I2C总线停止信号 */
rtc->interface.stop(rtc);
return TRUE;
}
/**
* @brief 假读RTC芯片，任意读地址，不判断RTC响应
* @return {*}
* @note
*/
static void rtc_dummy_read(void)
{
rtc->interface.start(rtc);
rtc->interface.write_byte(rtc, RTC_WR_ADDR);
rtc->interface.write_byte(rtc, 0x20);
rtc->interface.start(rtc);
rtc->interface.write_byte(rtc, RTC_RD_ADDR);
rtc->interface.read_byte(rtc, FALSE);
rtc->interface.stop(rtc);
}
/**
* @brief 用于检查VLF，寄存器地址：0x1e bit[1]
* @return {uint8_t} 0 = VLF位为0，1 = VLF位为1
* @note
*/
static uint8_t rtc_check_vlf(void)
{
uint8_t flag_register = 1;
uint8_t vlf = 0;
rtc_read_byte(&flag_register, RTC_FLAG_ADDR);
vlf = (flag_register & 0x02);
if (vlf == 0)
{
return 0;
}
else
{
return 1;
}
}
/**
* @brief 等待VLF位清除，寄存器地址：0x1e bit[1]
* @return {uint8_t} 0 = 清零成功，1 = 清零失败，2 = 无需清零
*/
static uint8_t rtc_wait_vlf_clear(void)
{
uint8_t ret = 1;
uint8_t i = 0;
uint8_t vlf;
for (i = 0; i < 10; i++)
{
vlf = rtc_check_vlf();
if (vlf == 0)
{
ret = ((i > 0) ? 0 : 2);
return ret;
}
/* 清除VLF */
rtc_write_byte(0, RTC_FLAG_ADDR);
}
return ret;
}
/**
* @brief 复位
* @return {BOOL} FALSE = 复位成功，TRUE = 复位失败
*/
static BOOL rtc_soft_reset(void)
{
BOOL ret = FALSE;
ret = rtc_write_byte(0x00, 0x1f);
ret = rtc_write_byte(0x80, 0x1f);
ret = rtc_write_byte(0xd3, 0x60);
ret = rtc_write_byte(0x03, 0x66);
ret = rtc_write_byte(0x02, 0x6b);
ret = rtc_write_byte(0x01, 0x6b);
if (ret == 0)
{
LL_mDelay(2);
}
return ret;
}
/**
* @brief 时钟寄存器初始化函数
* @return {BOOL} TRUE = 初始化成功，FALSE = 初始化失败
*/
static BOOL rtc_clock_reginit(void)
{
BOOL ret = FALSE;
/* set reserve register */
ret = rtc_write_byte(RTC_REG17_DATA, RTC_REG17_ADDR);
ret = rtc_write_byte(RTC_REG30_DATA, RTC_REG30_ADDR);
ret = rtc_write_byte(RTC_REG31_DATA, RTC_REG31_ADDR);
ret = rtc_write_byte(RTC_IRQ_DATA, RTC_IRQ_ADDR);
/* write 0x04 to reg_0x1d */
ret = rtc_write_byte(0x04, 0x1d);
/* write 0x00 to reg_0x1e */
ret = rtc_write_byte(0x00, 0x1e);
/* stop clock */
ret = rtc_write_byte(0x40, RTC_CONTROL_ADDR);
/* set the present time */
// ret = rtc_write_bytes(calendar, RTC_CLOCK_ADDR, sizeof(calendar));
/* start clock */
ret = rtc_write_byte(0x00, RTC_CONTROL_ADDR);
return ret;
}
/**
* @brief RTC芯片初始化
* @return {BOOL} TRUE = 成功，FALSE = 失败
* @note
*/
BOOL rtc_init(void)
{
i2c_gpio_group_t gpios;
int ret = 1;
gpios.scl = gpio_create(RTC_RX8010_SCL_PORT, RTC_RX8010_SCL_PIN);
gpios.sda = gpio_create(RTC_RX8010_SDA_PORT, RTC_RX8010_SDA_PIN);
rtc = i2c_create(gpios, 10);
rtc_dummy_read();
/* wait for VLF bit clear */
ret = rtc_wait_vlf_clear();
if (ret == 0)
{
/* software reset */
ret = rtc_soft_reset();
if (ret == FALSE)
{
return FALSE;
}
}
else if (ret == 1)
{
return FALSE;
}
/* register initialize */
return rtc_clock_reginit();
}
/**
* @brief RTC芯片反初始化
* @return {*}
* @note
*/
BOOL rtc_dinit(void)
{
GPIO_SET_ANALOG(RTC_RX8010_SCL_PORT, RTC_RX8010_SCL_PIN);
GPIO_SET_ANALOG(RTC_RX8010_SDA_PORT, RTC_RX8010_SDA_PIN);
return TRUE;
}
/**
* @brief 从RTC芯片读取时间
* @param {uint8_t} *read_buf - 接收缓存指针，用于接收读取到的数据
* @return {BOOL} TRUE = 成功，FALSE = 失败
* @note
*/
BOOL rtc_get_clock_time(uint8_t *read_buf)
{
return rtc_read_bytes(read_buf, RTC_CLOCK_ADDR, 7);
}
/**
* @brief 向RTC芯片写入时间
* @param {rtc_date} *data - 发送缓存指针，用于存储要发送的数据
* @return {BOOL} TRUE = 成功，FALSE = 失败
* @note
*/
BOOL rtc_set_clock_time(rtc_date *data)
{
BOOL ret = FALSE;
uint8_t tmp[7];
tmp[0] = data->second;
tmp[1] = data->minute;
tmp[2] = data->hour;
tmp[3] = data->weekday;
tmp[4] = data->day;
tmp[5] = data->month;
tmp[6] = data->year;
tmp[3] = (rtc_week_e)tmp[3]; // 改成星期几
/* stop clock */
ret = rtc_write_byte(0x40, RTC_CONTROL_ADDR);
/* set the present time */
ret = rtc_write_bytes(tmp, RTC_CLOCK_ADDR, sizeof(tmp));
/* start clock */
ret = rtc_write_byte(0x00, RTC_CONTROL_ADDR);
return ret;
}
/**
* 获取实时时钟（RTC）的时间戳
*
* 该函数从RTC设备中获取当前的日期和时间，并将其转换为自1970年1月1日以来的秒数（时间戳）。
* 如果无法从RTC设备中获取时间，则返回0。
*
* @return 返回从1970年1月1日以来的秒数（时间戳），如果无法获取时间则返回0。
*/
uint32_t rtc_timestamp(void)
{
BOOL ret = FALSE;
uint8_t tmp[7];
rtc_date_t date;
rtc_time_t time;
ret = rtc_get_clock_time(tmp);
if (ret == FALSE)
{
return 0;
}
date.year = hex_format_dec(tmp[6]);
date.month = hex_format_dec(tmp[5]);
date.day = hex_format_dec(tmp[4]);
time.hour = hex_format_dec(tmp[2]);
time.minute = hex_format_dec(tmp[1]);
time.second = hex_format_dec(tmp[0]);
return time2stamp(&date, &time);
}
/**
* @brief 将星期转为星期码
* @param {uint8_t} *weekday 星期几
* @return {*}
* @note
*/
void rtc_weekday_convert(uint8_t *weekday)
{
switch (*weekday)
{
case 1:
*weekday = MON;
break;
case 2:
*weekday = TUE;
break;
case 3:
*weekday = WED;
break;
case 4:
*weekday = THUR;
break;
case 5:
*weekday = FRI;
break;
case 6:
*weekday = SAT;
break;
case 7:
*weekday = SUN;
break;
default:
*weekday = 0;
break;
}
}
/**
* @brief 将星期码转为星期
* @param {uint8_t} *weekday 星期码
* @return {*}
* @note
*/
void rtc_weekday_rconvert(uint8_t *weekday)
{
switch (*weekday)
{
case MON:
*weekday = 1;
break;
case TUE:
*weekday = 2;
break;
case WED:
*weekday = 3;
break;
case THUR:
*weekday = 4;
break;
case FRI:
*weekday = 5;
break;
case SAT:
*weekday = 6;
break;
case SUN:
*weekday = 7;
break;
default:
*weekday = 0;
break;
}
}

99
User/lib/driver/rtc_rx8010.h Normal file
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@ -0,0 +1,99 @@
/**
* @file rtc_rx8010.h
* @author xxx
* @date 2023-08-30 14:05:55
* @brief 头文件 rtc_rx8010.h
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/
#ifndef __RTC_RX8010_H__
#define __RTC_RX8010_H__
#include "main.h"
#define RTC_DEVICE_ADDR 0x32
#define RTC_WR_ADDR ((RTC_DEVICE_ADDR << 1) | 0)
#define RTC_RD_ADDR ((RTC_DEVICE_ADDR << 1) | 1)
#define RTC_FLAG_ADDR 0x1e
#define RTC_CLOCK_ADDR 0x10
#define RTC_CONTROL_ADDR 0x1f
#define RTC_REG17_ADDR 0x17
#define RTC_REG17_DATA 0xd8
#define RTC_REG30_ADDR 0x30
#define RTC_REG30_DATA 0x00
#define RTC_REG31_ADDR 0x31
#define RTC_REG31_DATA 0x08
#define RTC_IRQ_ADDR 0x32
#define RTC_IRQ_DATA 0x00
typedef enum
{
SUN = BIT0,
MON = BIT1,
TUE = BIT2,
WED = BIT3,
THUR = BIT4,
FRI = BIT5,
SAT = BIT6
} rtc_week_e; ///< 星期码
typedef struct
{
uint8_t year; ///< 7 bit - 1 63
uint8_t month; ///< 4 bit
uint8_t day; ///< 5 bit
uint8_t weekday; ///< rtc_week_e
uint8_t hour; ///< 5 bit
uint8_t minute; ///< 6 bit
uint8_t second; ///< 6 bit
} rtc_date;
/**
* @brief Initializes the RTC module.
* @return TRUE if the initialization is successful, FALSE otherwise.
*/
extern BOOL rtc_init(void);
/**
* @brief Deinitializes the RTC module.
* @return TRUE if the deinitialization is successful, FALSE otherwise.
*/
extern BOOL rtc_dinit(void);
/**
* @brief Retrieves the current clock time from the RTC module.
* @param read_buf Pointer to the buffer to store the clock time.
* @return TRUE if the clock time is successfully retrieved, FALSE otherwise.
*/
extern BOOL rtc_get_clock_time(uint8_t *read_buf);
/**
* @brief Sets the clock time in the RTC module.
* @param data Pointer to the RTC date structure containing the new clock time.
* @return TRUE if the clock time is successfully set, FALSE otherwise.
*/
extern BOOL rtc_set_clock_time(rtc_date *data);
/**
* @brief Retrieves the current alarm time from the RTC module.
* @param read_buf Pointer to the buffer to store the alarm time.
* @return TRUE if the alarm time is successfully retrieved, FALSE otherwise.
*/
extern uint32_t rtc_timestamp(void);
/**
* @brief Converts the weekday value to a human-readable format.
* @param weekday Pointer to the weekday value to be converted.
*/
extern void rtc_weekday_convert(uint8_t *weekday);
/**
* @brief Converts the weekday value from a human-readable format to the RTC format.
* @param weekday Pointer to the weekday value to be converted.
*/
extern void rtc_weekday_rconvert(uint8_t *weekday);
#endif ///< !__RTC_RX8010_H__

160
User/lib/driver/sht40.c Normal file
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@ -0,0 +1,160 @@
#include "sht40.h"
#include "i2cs.h"
#define SHT40_SDA_PORT I2C1_SDA_GPIO_Port
#define SHT40_SDA_PIN I2C1_SDA_Pin
#define SHT40_SCL_PORT I2C1_SCL_GPIO_Port
#define SHT40_SCL_PIN I2C1_SCL_Pin
#define SHT40_I2C_ADDRESS 0x44
#define SHT40_MEASURE_CMD 0xFD // 2*8-bit T-data:8-bit CRC:2*8-bit RH-data: 8-bit CRC
static i2c_t *sht40_i2c;
static uint8_t crc8(uint8_t *data, uint8_t len);
void sht40_test(void)
{
float32 temperature = 0;
float32 humidity = 0;
sht40_read(&temperature, &humidity);
__NOP();
}
/**
* @brief 初始化 SHT40 传感器
*
* 该函数用于初始化 SHT40 传感器，包括创建 I2C 通讯所需的 GPIO 引脚和 I2C 通讯对象。
*
* 初始化完成后，sht40_i2c 变量将用于后续的 SHT40 传感器通信。
*/
void sht40_init(void)
{
i2c_gpio_group_t gpios;
gpios.scl = gpio_create(SHT40_SCL_PORT, SHT40_SCL_PIN);
gpios.sda = gpio_create(SHT40_SDA_PORT, SHT40_SDA_PIN);
sht40_i2c = i2c_create(gpios, 10);
DBG_ASSERT(sht40_i2c != NULL __DBG_LINE);
// sht40_test(); // 测试 SHT40
}
/**
* @brief 初始化 SHT40 传感器
*
* 此函数用于初始化 SHT40 温湿度传感器，以便进行后续的温度和湿度测量。
*
* 注意：该函数没有返回值，也不接受任何参数。
*/
void sht40_dinit(void)
{
GPIO_SET_ANALOG(SHT40_SDA_PORT, SHT40_SDA_PIN);
GPIO_SET_ANALOG(SHT40_SCL_PORT, SHT40_SCL_PIN);
}
/**
* @brief 读取温湿度传感器数据
*
* 从温湿度传感器读取温度和湿度数据，并将读取到的数据存储在传入的浮点数指针指向的位置。
*
* @param temperature 用于存储读取到的温度值的浮点数指针
* @param humidity 用于存储读取到的湿度值的浮点数指针
*/
BOOL sht40_read(float32 *temperature, float32 *humidity)
{
uint8_t data[6];
osel_memset(data, 0, ARRAY_LEN(data));
// 发送开始信号
sht40_i2c->interface.start(sht40_i2c);
// 发送写入地址命令
sht40_i2c->interface.write_byte(sht40_i2c, SHT40_I2C_ADDRESS << 1);
// 等待写入地址命令响应
if (sht40_i2c->interface.wait_ack(sht40_i2c) == FALSE)
{
return FALSE;
}
// 发送测量命令
sht40_i2c->interface.write_byte(sht40_i2c, SHT40_MEASURE_CMD);
// 等待测量命令响应
if (sht40_i2c->interface.wait_ack(sht40_i2c) == FALSE)
{
return FALSE;
}
// 停止I2C总线
sht40_i2c->interface.stop(sht40_i2c);
LL_mDelay(10); // 根据 SHT40 数据手册，等待至少 10ms
// 发送开始信号
sht40_i2c->interface.start(sht40_i2c);
// 发送写入地址命令
sht40_i2c->interface.write_byte(sht40_i2c, (SHT40_I2C_ADDRESS << 1) | 1);
// 等待写入地址命令响应
if (sht40_i2c->interface.wait_ack(sht40_i2c) == FALSE)
{
return FALSE;
}
for (uint8_t i = 0; i < ARRAY_LEN(data); i++)
{
if (i == 5)
{
data[i] = sht40_i2c->interface.read_byte(sht40_i2c, FALSE);
}
else
{
data[i] = sht40_i2c->interface.read_byte(sht40_i2c, TRUE);
}
}
// 停止I2C总线
sht40_i2c->interface.stop(sht40_i2c);
*temperature = 0;
*humidity = 0;
if (crc8(&data[0], 2) != data[2] || crc8(&data[3], 2) != data[5])
{
return FALSE;
}
else
{
*temperature = (float32)((uint16_t)data[0] << 8 | data[1]) * 175 / 65535 - 45;
*humidity = (float32)((uint16_t)data[3] << 8 | data[4]) * 125 / 65535 - 6;
if (*humidity > 100)
{
*humidity = 100;
}
if (*humidity < 0)
{
*humidity = 0;
}
return TRUE;
}
}
/**
* @brief crc8校验函数，多项式为 x^8 + x^5 + x^4 + 1
* @param data 要校验的数据
* @param len 要校验的数据的字节数
* @retval 校验结果
* @note 该校验适合SHT3温湿度传感器的数据校验
*/
static uint8_t crc8(uint8_t *data, uint8_t len)
{
const uint8_t polynomial = 0x31;
uint8_t crc = 0xFF;
int i, j;
for (i = 0; i < len; ++i)
{
crc ^= *data++;
for (j = 0; j < 8; ++j)
{
crc = (crc & 0x80) ? (crc << 1) ^ polynomial : (crc << 1);
}
}
return crc;
}

9
User/lib/driver/sht40.h Normal file
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@ -0,0 +1,9 @@
#ifndef __SHT40_H
#define __SHT40_H
#include "main.h"
void sht40_init(void); ///< 初始化 SHT40 传感器
void sht40_dinit(void); ///< 反初始化 SHT40 传感器
BOOL sht40_read(float32 *temperature, float32 *humidity); ///< 读取温湿度传感器数据
#endif ///< !__SHT40_H

0
User/board/ssd1306_oled.c → User/lib/driver/ssd1306_oled.c
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0
User/board/ssd1306_oled.h → User/lib/driver/ssd1306_oled.h
View File

2
User/lib/inc/malloc.h
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@ -20,7 +20,7 @@
// mem2内存参数设定.mem2的内存池处于外部SRAM里面 // mem2内存参数设定.mem2的内存池处于外部SRAM里面
#define MEM2_BLOCK_SIZE 8 // 一个内存块大小为32字节 #define MEM2_BLOCK_SIZE 8 // 一个内存块大小为32字节
#define MEM2_MAX_SIZE 0 * 1024 // 因为精英版没有外扩内存,故这里设置一个最小值 #define MEM2_MAX_SIZE 4 * 1024 // 因为精英版没有外扩内存,故这里设置一个最小值
#define MEM2_ALLOC_TABLE_SIZE MEM2_MAX_SIZE / MEM2_BLOCK_SIZE // 内存表大小 #define MEM2_ALLOC_TABLE_SIZE MEM2_MAX_SIZE / MEM2_BLOCK_SIZE // 内存表大小
// 内存管理控制器结构体 // 内存管理控制器结构体

4
User/lib/src/debug.c
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@ -33,9 +33,7 @@ BOOL DBG_ASSERT(uint8_t cond _DBG_LINE_)
if ((cond) == FALSE) if ((cond) == FALSE)
{ {
// dbg_assert_line = line; // dbg_assert_line = line;
#if DEBUG_ENABLE == FALSE
sys_soft_reset();
#endif
GPIO_TOGGLE(LED_GREEN_GPIO_Port, LED_GREEN_Pin); GPIO_TOGGLE(LED_GREEN_GPIO_Port, LED_GREEN_Pin);
while (1) while (1)
{ {

4
User/lib/src/malloc.c
View File

@ -47,8 +47,8 @@ sizeof(B) = 8(内存空间大小8个字节)
// 内存池(32字节对齐) // 内存池(32字节对齐)
// 可控制的内存大小 // 可控制的内存大小
__attribute__((aligned(32))) uint8_t mem1base[MEM1_MAX_SIZE]; // 内部SRAM内存池 __attribute__((aligned(32))) uint8_t mem1base[MEM1_MAX_SIZE]; // 内部SRAM内存池
__attribute__((aligned(32))) uint8_t mem2base[MEM2_MAX_SIZE]; // __attribute__((aligned(32))) uint8_t mem2base[MEM2_MAX_SIZE];
// __attribute__((aligned(32))) uint8_t mem2base[MEM2_MAX_SIZE] __attribute__((at(0X68000000))); // 外部SRAM内存池 __attribute__((aligned(32))) uint8_t mem2base[MEM2_MAX_SIZE] __attribute__((at(0x2001C000))); // 外部SRAM内存池
// 内存管理表 // 内存管理表
// 可控制的内存控制块个数(每个内存块大小为32字节) // 可控制的内存控制块个数(每个内存块大小为32字节)
uint16_t mem1mapbase[MEM1_ALLOC_TABLE_SIZE]; // 内部SRAM内存池MAP uint16_t mem1mapbase[MEM1_ALLOC_TABLE_SIZE]; // 内部SRAM内存池MAP

114
User/system/bsp/adcs.c
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@ -2,7 +2,7 @@
* @file adcs.c * @file adcs.c
* @author xxx * @author xxx
* @date 2023-09-04 15:59:16 * @date 2023-09-04 15:59:16
* @brief LL库ADC驱动 * @brief LL库ADC驱动 STM32F407
* @copyright Copyright (c) 2023 by xxx, All Rights Reserved. * @copyright Copyright (c) 2023 by xxx, All Rights Reserved.
*/ */
@ -23,7 +23,7 @@ static uint8_t adc_get_channels_count(uint32_t channnels); // 通过用户配置
* @return {*} * @return {*}
* @note TCONV(转换时间) = (采样时间 + 12.5 个周期)/(主频/ADC分频系数) * @note TCONV(转换时间) = (采样时间 + 12.5 个周期)/(主频/ADC分频系数)
*/ */
void adc_init(adcs_e num, ADC_TypeDef *adc, DMA_TypeDef *dma, uint32_t dma_channel, uint16_t adc_cct, uint32_t channels) void adc_init(adcs_e num, ADC_TypeDef *adc, DMA_TypeDef *dma, uint32_t dma_stream, uint32_t dma_channel, uint16_t adc_cct, uint32_t channels)
{ {
DBG_ASSERT(num < ADCS_MAX __DBG_LINE); DBG_ASSERT(num < ADCS_MAX __DBG_LINE);
DBG_ASSERT(adc != NULL __DBG_LINE); DBG_ASSERT(adc != NULL __DBG_LINE);
@ -34,6 +34,7 @@ void adc_init(adcs_e num, ADC_TypeDef *adc, DMA_TypeDef *dma, uint32_t dma_chann
osel_memset((uint8_t *)p, 0, sizeof(adcs_t)); osel_memset((uint8_t *)p, 0, sizeof(adcs_t));
p->adc = adc; p->adc = adc;
p->dma = dma; p->dma = dma;
p->dma_stream = dma_stream;
p->dma_channel = dma_channel; p->dma_channel = dma_channel;
p->channels.data = channels; p->channels.data = channels;
p->adc_cct = adc_cct; p->adc_cct = adc_cct;
@ -49,36 +50,40 @@ void adc_init(adcs_e num, ADC_TypeDef *adc, DMA_TypeDef *dma, uint32_t dma_chann
DBG_ASSERT(p->adc_value != NULL __DBG_LINE); DBG_ASSERT(p->adc_value != NULL __DBG_LINE);
osel_memset((uint8_t *)p->adc_value, 0, sizeof(uint16_t) * p->adc_sum); osel_memset((uint8_t *)p->adc_value, 0, sizeof(uint16_t) * p->adc_sum);
uint32_t backup_setting_adc_dma_transfer = 0U; LL_DMA_SetChannelSelection(p->dma, p->dma_stream, p->dma_channel);
backup_setting_adc_dma_transfer = LL_ADC_REG_GetDMATransfer(p->adc); LL_DMA_ConfigTransfer(p->dma, p->dma_stream,
LL_ADC_REG_SetDMATransfer(p->adc, LL_ADC_REG_DMA_TRANSFER_NONE); LL_DMA_DIRECTION_PERIPH_TO_MEMORY |
LL_DMA_MODE_CIRCULAR |
LL_DMA_PERIPH_NOINCREMENT |
LL_DMA_MEMORY_INCREMENT |
LL_DMA_PDATAALIGN_HALFWORD |
LL_DMA_MDATAALIGN_HALFWORD |
LL_DMA_PRIORITY_HIGH);
LL_DMA_ConfigAddresses(p->dma, p->dma_stream,
LL_ADC_DMA_GetRegAddr(p->adc, LL_ADC_DMA_REG_REGULAR_DATA),
(uint32_t)p->adc_value,
LL_DMA_GetDataTransferDirection(p->dma, p->dma_stream));
// ADC开始校准 LL_DMA_SetDataLength(p->dma, p->dma_stream, p->adc_sum);
LL_ADC_StartCalibration(p->adc, LL_ADC_SINGLE_ENDED); LL_DMA_EnableStream(p->dma, p->dma_stream);
// 等待校准完成
while (LL_ADC_IsCalibrationOnGoing(p->adc)) LL_ADC_REG_SetContinuousMode(p->adc, LL_ADC_REG_CONV_CONTINUOUS);
; LL_ADC_REG_SetDMATransfer(p->adc, LL_ADC_REG_DMA_TRANSFER_UNLIMITED);
LL_ADC_REG_SetDMATransfer(p->adc, backup_setting_adc_dma_transfer);
LL_mDelay(10);
LL_ADC_EnableIT_OVR(p->adc);
LL_ADC_Enable(p->adc);
LL_mDelay(10);
if (BIT_IS_SET(channels, INVREF)) if (BIT_IS_SET(channels, INVREF))
{ {
// 使能VREFINT // 使能VREFINT
LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(p->adc), LL_ADC_PATH_INTERNAL_VREFINT); LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(p->adc), LL_ADC_PATH_INTERNAL_VREFINT);
} }
if (BIT_IS_SET(channels, INTEMP))
LL_DMA_SetDataLength(p->dma, p->dma_channel, p->adc_sum);
LL_DMA_SetPeriphAddress(p->dma, p->dma_channel, LL_ADC_DMA_GetRegAddr(p->adc, LL_ADC_DMA_REG_REGULAR_DATA));
LL_DMA_SetMemoryAddress(p->dma, p->dma_channel, (uint32_t)p->adc_value);
LL_DMA_EnableChannel(p->dma, p->dma_channel);
if (backup_setting_adc_dma_transfer == LL_ADC_REG_DMA_TRANSFER_UNLIMITED)
{ {
LL_ADC_REG_StartConversion(p->adc); // 开始转换 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(p->adc), LL_ADC_PATH_INTERNAL_TEMPSENSOR);
} }
LL_mDelay(10);
// 启动 ADC 转换
LL_ADC_Enable(p->adc);
LL_ADC_REG_StartConversionSWStart(p->adc);
} }
/** /**
@ -91,18 +96,7 @@ void adc_init(adcs_e num, ADC_TypeDef *adc, DMA_TypeDef *dma, uint32_t dma_chann
void start_sample(adcs_e num) void start_sample(adcs_e num)
{ {
DBG_ASSERT(num < ADCS_MAX __DBG_LINE); DBG_ASSERT(num < ADCS_MAX __DBG_LINE);
adcs_t *p = &adcs[num]; // adcs_t *p = &adcs[num];
LL_DMA_SetDataLength(p->dma, p->dma_channel, p->adc_sum);
LL_DMA_SetPeriphAddress(p->dma, p->dma_channel, LL_ADC_DMA_GetRegAddr(p->adc, LL_ADC_DMA_REG_REGULAR_DATA));
LL_DMA_SetMemoryAddress(p->dma, p->dma_channel, (uint32_t)p->adc_value);
LL_DMA_EnableChannel(p->dma, p->dma_channel);
LL_ADC_ClearFlag_OVR(p->adc);
LL_ADC_ClearFlag_EOC(p->adc);
LL_ADC_REG_StartConversion(p->adc); // 开始转换
// ADC开始校准
LL_ADC_StartCalibration(p->adc, LL_ADC_SINGLE_ENDED);
} }
/** /**
@ -115,14 +109,7 @@ void start_sample(adcs_e num)
void stop_sample(adcs_e num) void stop_sample(adcs_e num)
{ {
DBG_ASSERT(num < ADCS_MAX __DBG_LINE); DBG_ASSERT(num < ADCS_MAX __DBG_LINE);
adcs_t *p = &adcs[num]; // adcs_t *p = &adcs[num];
LL_ADC_REG_StopConversion(p->adc);
while (LL_ADC_REG_IsConversionOngoing(p->adc) != 0)
;
LL_DMA_DisableChannel(p->dma, p->dma_channel);
DMA_CLEAR_FLAG_TC_CHANNEL(p->dma, p->dma_channel);
DMA_CLEAR_FLAG_TE_CHANNEL(p->dma, p->dma_channel);
} }
/** /**
@ -147,8 +134,6 @@ void adc_dinit(adcs_e num)
{ {
DBG_ASSERT(num < ADCS_MAX __DBG_LINE); DBG_ASSERT(num < ADCS_MAX __DBG_LINE);
adcs_t *p = &adcs[num]; adcs_t *p = &adcs[num];
LL_ADC_REG_StopConversion(p->adc);
LL_DMA_DisableChannel(p->dma, p->dma_channel);
LL_ADC_Disable(p->adc); LL_ADC_Disable(p->adc);
if (p->adc_value != NULL) if (p->adc_value != NULL)
{ {
@ -190,7 +175,7 @@ uint16_t adc_result_median_average(adcs_e num, uint8_t chan)
if (p->adc_cct <= 2) if (p->adc_cct <= 2)
return 0; // 如果adc_cct小于等于2，直接返回0 return 0; // 如果adc_cct小于等于2，直接返回0
p->median_average_ticks.uticks = sys_get_tick();
uint16_t adc_temp[p->adc_cct]; uint16_t adc_temp[p->adc_cct];
uint32_t adc_sum = 0; uint32_t adc_sum = 0;
uint16_t count = p->adc_cct >> 2; // 使用位移操作计算n的值 uint16_t count = p->adc_cct >> 2; // 使用位移操作计算n的值
@ -212,13 +197,6 @@ uint16_t adc_result_median_average(adcs_e num, uint8_t chan)
// 计算平均值，确保不会除以0 // 计算平均值，确保不会除以0
uint16_t res = adc_sum / (p->adc_cct - (count << 1)); uint16_t res = adc_sum / (p->adc_cct - (count << 1));
p->median_average_ticks.ticks_current = sys_get_tick() - p->median_average_ticks.uticks;
if (p->median_average_ticks.ticks_current > p->median_average_ticks.ticks_max)
{
p->median_average_ticks.ticks_max = p->median_average_ticks.ticks_current;
}
return res; return res;
} }
@ -236,8 +214,6 @@ uint16_t adc_result_median(adcs_e num, uint8_t chan)
adcs_t *p = &adcs[num]; adcs_t *p = &adcs[num];
DBG_ASSERT(p != NULL __DBG_LINE); DBG_ASSERT(p != NULL __DBG_LINE);
p->median_ticks.uticks = sys_get_tick();
uint16_t adc_temp[p->adc_cct]; uint16_t adc_temp[p->adc_cct];
// 减少重复计算，计算基础偏移量 // 减少重复计算，计算基础偏移量
uint16_t *adc_values = (uint16_t *)p->adc_value + chan; uint16_t *adc_values = (uint16_t *)p->adc_value + chan;
@ -247,12 +223,6 @@ uint16_t adc_result_median(adcs_e num, uint8_t chan)
} }
insertion_sort(adc_temp, p->adc_cct); insertion_sort(adc_temp, p->adc_cct);
res = adc_temp[p->adc_cct >> 1]; res = adc_temp[p->adc_cct >> 1];
p->median_ticks.ticks_current = sys_get_tick() - p->median_ticks.uticks;
if (p->median_ticks.ticks_current > p->median_ticks.ticks_max)
{
p->median_ticks.ticks_max = p->median_ticks.ticks_current;
}
return res; return res;
} }
@ -271,8 +241,6 @@ uint16_t adc_result_average(adcs_e num, uint8_t chan)
adcs_t *p = &adcs[num]; adcs_t *p = &adcs[num];
DBG_ASSERT(p != NULL __DBG_LINE); DBG_ASSERT(p != NULL __DBG_LINE);
p->average_ticks.uticks = sys_get_tick();
// 减少重复计算，计算基础偏移量 // 减少重复计算，计算基础偏移量
uint16_t *adc_values = (uint16_t *)p->adc_value + chan; uint16_t *adc_values = (uint16_t *)p->adc_value + chan;
for (uint16_t i = 0; i < p->adc_cct; ++i, adc_values += p->adc_chans_count) for (uint16_t i = 0; i < p->adc_cct; ++i, adc_values += p->adc_chans_count)
@ -281,12 +249,6 @@ uint16_t adc_result_average(adcs_e num, uint8_t chan)
} }
res = adc_sum / p->adc_cct; res = adc_sum / p->adc_cct;
p->average_ticks.ticks_current = sys_get_tick() - p->average_ticks.uticks;
if (p->average_ticks.ticks_current > p->average_ticks.ticks_max)
{
p->average_ticks.ticks_max = p->average_ticks.ticks_current;
}
return res; return res;
} }
@ -336,10 +298,6 @@ void adc_dma_callback(adcs_e num)
if (LL_DMA_IsActiveFlag_TC1(p->dma) != 0) if (LL_DMA_IsActiveFlag_TC1(p->dma) != 0)
{ {
LL_DMA_ClearFlag_TC1(p->dma); LL_DMA_ClearFlag_TC1(p->dma);
// 停止ADC转换
LL_ADC_REG_StopConversion(p->adc);
// 关闭ADC,可以不关闭但是校准无法清除
// LL_ADC_Disable(p->adc);
} }
// 检查DMA1的传输错误标志是否为1，如果是，则清除该标志 // 检查DMA1的传输错误标志是否为1，如果是，则清除该标志
if (LL_DMA_IsActiveFlag_TE1(p->dma) != 0) if (LL_DMA_IsActiveFlag_TE1(p->dma) != 0)
@ -361,17 +319,7 @@ void adc_env_callback(adcs_e num)
if (LL_ADC_IsActiveFlag_OVR(p->adc) != 0) if (LL_ADC_IsActiveFlag_OVR(p->adc) != 0)
{ {
p->ovr_count++; p->ovr_count++;
LL_ADC_REG_StopConversion(p->adc);
LL_DMA_DisableChannel(p->dma, p->dma_channel);
LL_DMA_SetDataLength(p->dma, p->dma_channel, p->adc_sum);
LL_DMA_SetPeriphAddress(p->dma, p->dma_channel, LL_ADC_DMA_GetRegAddr(p->adc, LL_ADC_DMA_REG_REGULAR_DATA));
LL_DMA_SetMemoryAddress(p->dma, p->dma_channel, (uint32_t)p->adc_value);
LL_DMA_EnableChannel(p->dma, p->dma_channel);
LL_ADC_ClearFlag_OVR(p->adc); LL_ADC_ClearFlag_OVR(p->adc);
LL_ADC_ClearFlag_EOC(p->adc);
LL_ADC_REG_StartConversion(p->adc); // 开始转换
} }
} }

9
User/system/bsp/adcs.h
View File

@ -17,9 +17,6 @@
#ifndef __ADCS_H__ #ifndef __ADCS_H__
#define __ADCS_H__ #define __ADCS_H__
#include "lib.h"
#include "main.h"
#include "sys.h" #include "sys.h"
#define ADC_CHANNEL_MAX 18 ///< Maximum number of ADC channels #define ADC_CHANNEL_MAX 18 ///< Maximum number of ADC channels
@ -85,6 +82,7 @@ typedef struct
{ {
ADC_TypeDef *adc; ///< ADC peripheral ADC_TypeDef *adc; ///< ADC peripheral
DMA_TypeDef *dma; ///< DMA peripheral DMA_TypeDef *dma; ///< DMA peripheral
uint32_t dma_stream; ///< DMA stream
uint32_t dma_channel; ///< DMA channel uint32_t dma_channel; ///< DMA channel
adcs_channels_u channels; ///< ADC channels adcs_channels_u channels; ///< ADC channels
uint32_t ovr_count; ///< ADC overflow count uint32_t ovr_count; ///< ADC overflow count
@ -94,9 +92,6 @@ typedef struct
uint16_t adc_sum; ///< Channel acquisition count uint16_t adc_sum; ///< Channel acquisition count
__IO uint16_t *adc_value; ///< Address to store ADC conversion results __IO uint16_t *adc_value; ///< Address to store ADC conversion results
utime_ticks_t median_average_ticks; ///< Median average filtering ticks
utime_ticks_t median_ticks; ///< Median filtering ticks
utime_ticks_t average_ticks; ///< Average filtering ticks
} adcs_t; } adcs_t;
/** /**
@ -111,7 +106,7 @@ typedef struct
* @param adc_cct The ADC continuous conversion mode. * @param adc_cct The ADC continuous conversion mode.
* @param channels The number of ADC channels to be converted. * @param channels The number of ADC channels to be converted.
*/ */
extern void adc_init(adcs_e num, ADC_TypeDef *adc, DMA_TypeDef *dma, uint32_t dma_channel, uint16_t adc_cct, uint32_t channels); extern void adc_init(adcs_e num, ADC_TypeDef *adc, DMA_TypeDef *dma, uint32_t dma_stream, uint32_t dma_channel, uint16_t adc_cct, uint32_t channels);
/** /**
* @brief Starts the ADC conversion. * @brief Starts the ADC conversion.

2
User/system/bsp/bsp.h
View File

@ -13,7 +13,7 @@
#define __BSP_H__ #define __BSP_H__
#include "gpios.h" #include "gpios.h"
// #include "adcs.h" #include "adcs.h"
// #include "dacs.h" // #include "dacs.h"
// #include "dmas.h" // #include "dmas.h"
#include "tims.h" #include "tims.h"

53
motor.ioc
View File

@ -1,36 +1,67 @@
#MicroXplorer Configuration settings - do not modify #MicroXplorer Configuration settings - do not modify
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR
ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_VREFINT
ADC1.ContinuousConvMode=ENABLE
ADC1.DMAContinuousRequests=ENABLE
ADC1.EOCSelection=ADC_EOC_SEQ_CONV
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,master,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,NbrOfConversion,ContinuousConvMode,DMAContinuousRequests,EOCSelection
ADC1.NbrOfConversion=2
ADC1.NbrOfConversionFlag=1
ADC1.Rank-0\#ChannelRegularConversion=1
ADC1.Rank-1\#ChannelRegularConversion=2
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_28CYCLES
ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_28CYCLES
ADC1.master=1
CAD.formats= CAD.formats=
CAD.pinconfig= CAD.pinconfig=
CAD.provider= CAD.provider=
Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.ADC1.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.ADC1.0.Instance=DMA2_Stream0
Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
Dma.ADC1.0.Mode=DMA_CIRCULAR
Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
Dma.ADC1.0.Priority=DMA_PRIORITY_LOW
Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.Request0=ADC1
Dma.RequestsNb=1
File.Version=6 File.Version=6
GPIO.groupedBy=Group By Peripherals GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false KeepUserPlacement=false
Mcu.CPN=STM32F407IGT7 Mcu.CPN=STM32F407IGT7
Mcu.Family=STM32F4 Mcu.Family=STM32F4
Mcu.IP0=NVIC Mcu.IP0=ADC1
Mcu.IP1=RCC Mcu.IP1=DMA
Mcu.IP2=SYS Mcu.IP2=NVIC
Mcu.IP3=TIM6 Mcu.IP3=RCC
Mcu.IPNb=4 Mcu.IP4=SYS
Mcu.IP5=TIM6
Mcu.IPNb=6
Mcu.Name=STM32F407I(E-G)Tx Mcu.Name=STM32F407I(E-G)Tx
Mcu.Package=LQFP176 Mcu.Package=LQFP176
Mcu.Pin0=PC14-OSC32_IN Mcu.Pin0=PC14-OSC32_IN
Mcu.Pin1=PC15-OSC32_OUT Mcu.Pin1=PC15-OSC32_OUT
Mcu.Pin10=VP_SYS_VS_Systick
Mcu.Pin11=VP_TIM6_VS_ClockSourceINT
Mcu.Pin2=PH0-OSC_IN Mcu.Pin2=PH0-OSC_IN
Mcu.Pin3=PH1-OSC_OUT Mcu.Pin3=PH1-OSC_OUT
Mcu.Pin4=PA13 Mcu.Pin4=PA13
Mcu.Pin5=PA14 Mcu.Pin5=PA14
Mcu.Pin6=PE0 Mcu.Pin6=PE0
Mcu.Pin7=PE1 Mcu.Pin7=PE1
Mcu.Pin8=VP_SYS_VS_Systick Mcu.Pin8=VP_ADC1_TempSens_Input
Mcu.Pin9=VP_TIM6_VS_ClockSourceINT Mcu.Pin9=VP_ADC1_Vref_Input
Mcu.PinsNb=10 Mcu.PinsNb=12
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32F407IGTx Mcu.UserName=STM32F407IGTx
MxCube.Version=6.9.2 MxCube.Version=6.9.2
MxDb.Version=DB.6.0.92 MxDb.Version=DB.6.0.92
NVIC.ADC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DMA2_Stream0_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@ -95,7 +126,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath= ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_TIM6_Init-TIM6-false-LL-true ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_DMA_Init-DMA-false-LL-true,4-MX_TIM6_Init-TIM6-false-LL-true,5-MX_ADC1_Init-ADC1-false-LL-true
RCC.48MHZClocksFreq_Value=84000000 RCC.48MHZClocksFreq_Value=84000000
RCC.AHBFreq_Value=168000000 RCC.AHBFreq_Value=168000000
RCC.APB1CLKDivider=RCC_HCLK_DIV4 RCC.APB1CLKDivider=RCC_HCLK_DIV4
@ -131,6 +162,10 @@ RCC.VcooutputI2S=192000000
TIM6.IPParameters=Prescaler,Period TIM6.IPParameters=Prescaler,Period
TIM6.Period=99 TIM6.Period=99
TIM6.Prescaler=16799 TIM6.Prescaler=16799
VP_ADC1_TempSens_Input.Mode=IN-TempSens
VP_ADC1_TempSens_Input.Signal=ADC1_TempSens_Input
VP_ADC1_Vref_Input.Mode=IN-Vrefint
VP_ADC1_Vref_Input.Signal=ADC1_Vref_Input
VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer