108 lines
3.7 KiB
C
108 lines
3.7 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file adc.c
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* @brief This file provides code for the configuration
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* of the ADC instances.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2024 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "adc.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* ADC1 init function */
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void MX_ADC1_Init(void)
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{
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/* USER CODE BEGIN ADC1_Init 0 */
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/* USER CODE END ADC1_Init 0 */
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LL_ADC_InitTypeDef ADC_InitStruct = {0};
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LL_ADC_REG_InitTypeDef ADC_REG_InitStruct = {0};
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LL_ADC_CommonInitTypeDef ADC_CommonInitStruct = {0};
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/* Peripheral clock enable */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC1);
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/* ADC1 DMA Init */
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/* ADC1 Init */
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LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_0, LL_DMA_CHANNEL_0);
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LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_0, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
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LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_0, LL_DMA_PRIORITY_LOW);
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LL_DMA_SetMode(DMA2, LL_DMA_STREAM_0, LL_DMA_MODE_CIRCULAR);
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LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_0, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_0, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_0, LL_DMA_PDATAALIGN_HALFWORD);
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LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_0, LL_DMA_MDATAALIGN_HALFWORD);
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LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_0);
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/* ADC1 interrupt Init */
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NVIC_SetPriority(ADC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
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NVIC_EnableIRQ(ADC_IRQn);
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/* USER CODE BEGIN ADC1_Init 1 */
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/* USER CODE END ADC1_Init 1 */
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/** Common config
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*/
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ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B;
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ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
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ADC_InitStruct.SequencersScanMode = LL_ADC_SEQ_SCAN_ENABLE;
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LL_ADC_Init(ADC1, &ADC_InitStruct);
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ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;
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ADC_REG_InitStruct.SequencerLength = LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS;
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ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
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ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_CONTINUOUS;
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ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_UNLIMITED;
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LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct);
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LL_ADC_REG_SetFlagEndOfConversion(ADC1, LL_ADC_REG_FLAG_EOC_SEQUENCE_CONV);
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ADC_CommonInitStruct.CommonClock = LL_ADC_CLOCK_SYNC_PCLK_DIV4;
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ADC_CommonInitStruct.Multimode = LL_ADC_MULTI_INDEPENDENT;
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LL_ADC_CommonInit(__LL_ADC_COMMON_INSTANCE(ADC1), &ADC_CommonInitStruct);
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/** Configure Regular Channel
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*/
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LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_TEMPSENSOR);
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LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_TEMPSENSOR, LL_ADC_SAMPLINGTIME_28CYCLES);
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LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_TEMPSENSOR);
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/** Configure Regular Channel
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*/
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LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_2, LL_ADC_CHANNEL_VREFINT);
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LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_VREFINT, LL_ADC_SAMPLINGTIME_28CYCLES);
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LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_VREFINT);
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/* USER CODE BEGIN ADC1_Init 2 */
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/* USER CODE END ADC1_Init 2 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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