diff --git a/freertos/.git-blame-ignore-revs b/freertos/.git-blame-ignore-revs deleted file mode 100644 index 00b3458..0000000 --- a/freertos/.git-blame-ignore-revs +++ /dev/null @@ -1,11 +0,0 @@ -# Normalize line endings and whitespace -ddd1e30018e74ad293cda0635018d636a6657f57 - -# Convert tabs to spaces (4) -8c77117c32e49a5070cd85e8920c36723997e465 - -# Apply uncrustify rules -587a83d647619bb0a508661c7bb4d6df89851582 -2c530ba5c352fdf420d1b13709a3970f04e9e6c6 -718178c68a1c863dd1a2eac7aea326a789d3bc52 -a5dbc2b1de17e5468420d5a928d7392d799780e2 diff --git a/freertos/.gitattributes b/freertos/.gitattributes deleted file mode 100644 index 756b5d9..0000000 --- a/freertos/.gitattributes +++ /dev/null @@ -1 +0,0 @@ -* text=auto diff --git a/freertos/.gitmodules b/freertos/.gitmodules deleted file mode 100644 index aaa2390..0000000 --- a/freertos/.gitmodules +++ /dev/null @@ -1,6 +0,0 @@ -[submodule "ThirdParty/FreeRTOS-Kernel-Partner-Supported-Ports"] - path = portable/ThirdParty/Partner-Supported-Ports - url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports -[submodule "ThirdParty/FreeRTOS-Kernel-Community-Supported-Ports"] - path = portable/ThirdParty/Community-Supported-Ports - url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Community-Supported-Ports diff --git a/freertos/CMakeLists.txt b/freertos/CMakeLists.txt deleted file mode 100644 index 6fd1ff5..0000000 --- a/freertos/CMakeLists.txt +++ /dev/null @@ -1,269 +0,0 @@ -cmake_minimum_required(VERSION 3.15) - -# User is responsible to one mandatory option: -# FREERTOS_PORT, if not specified and native port detected, uses the native compile. -# -# User is responsible for one library target: -# freertos_config ,typically an INTERFACE library -# -# DEPRECATED: FREERTOS_CONFIG_FILE_DIRECTORY - but still supported if no freertos_config defined for now. -# May be removed at some point in the future. -# -# User can choose which heap implementation to use (either the implementations -# included with FreeRTOS [1..5] or a custom implementation) by providing the -# option FREERTOS_HEAP. When dynamic allocation is used, the user must specify a -# heap implementation. If the option is not set, the cmake will use no heap -# implementation (e.g. when only static allocation is used). - -# `freertos_config` target defines the path to FreeRTOSConfig.h and optionally other freertos based config files -if(NOT TARGET freertos_config ) - if (NOT DEFINED FREERTOS_CONFIG_FILE_DIRECTORY ) - - message(FATAL_ERROR " freertos_config target not specified. Please specify a cmake target that defines the include directory for FreeRTOSConfig.h:\n" - " add_library(freertos_config INTERFACE)\n" - " target_include_directories(freertos_config SYSTEM\n" - " INTERFACE\n" - " include) # The config file directory\n" - " target_compile_definitions(freertos_config\n" - " PUBLIC\n" - " projCOVERAGE_TEST=0)\n") - else() - message(WARNING " Using deprecated 'FREERTOS_CONFIG_FILE_DIRECTORY' - please update your project CMakeLists.txt file:\n" - " add_library(freertos_config INTERFACE)\n" - " target_include_directories(freertos_config SYSTEM\n" - " INTERFACE\n" - " include) # The config file directory\n" - " target_compile_definitions(freertos_config\n" - " PUBLIC\n" - " projCOVERAGE_TEST=0)\n") - endif() -endif() - -# FreeRTOS port option -if(NOT FREERTOS_PORT) - message(WARNING " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):\n" - " set(FREERTOS_PORT GCC_ARM_CM4F CACHE STRING \"\")\n" - " or from CMake command line option:\n" - " -DFREERTOS_PORT=GCC_ARM_CM4F\n" - " \n" - " Available port options:\n" - " A_CUSTOM_PORT - Compiler: User Defined Target: User Defined\n" - " BCC_16BIT_DOS_FLSH186 - Compiler: BCC Target: 16 bit DOS Flsh186\n" - " BCC_16BIT_DOS_PC - Compiler: BCC Target: 16 bit DOS PC\n" - " CCS_ARM_CM3 - Compiler: CCS Target: ARM Cortex-M3\n" - " CCS_ARM_CM4F - Compiler: CCS Target: ARM Cortex-M4 with FPU\n" - " CCS_ARM_CR4 - Compiler: CCS Target: ARM Cortex-R4\n" - " CCS_MSP430X - Compiler: CCS Target: MSP430X\n" - " CODEWARRIOR_COLDFIRE_V1 - Compiler: CoreWarrior Target: ColdFire V1\n" - " CODEWARRIOR_COLDFIRE_V2 - Compiler: CoreWarrior Target: ColdFire V2\n" - " CODEWARRIOR_HCS12 - Compiler: CoreWarrior Target: HCS12\n" - " GCC_ARM_CA9 - Compiler: GCC Target: ARM Cortex-A9\n" - " GCC_ARM_AARCH64 - Compiler: GCC Target: ARM v8-A\n" - " GCC_ARM_AARCH64_SRE - Compiler: GCC Target: ARM v8-A SRE\n" - " GCC_ARM_CM0 - Compiler: GCC Target: ARM Cortex-M0\n" - " GCC_ARM_CM3 - Compiler: GCC Target: ARM Cortex-M3\n" - " GCC_ARM_CM3_MPU - Compiler: GCC Target: ARM Cortex-M3 with MPU\n" - " GCC_ARM_CM4_MPU - Compiler: GCC Target: ARM Cortex-M4 with MPU\n" - " GCC_ARM_CM4F - Compiler: GCC Target: ARM Cortex-M4 with FPU\n" - " GCC_ARM_CM7 - Compiler: GCC Target: ARM Cortex-M7\n" - " GCC_ARM_CM23_NONSECURE - Compiler: GCC Target: ARM Cortex-M23 non-secure\n" - " GCC_ARM_CM23_SECURE - Compiler: GCC Target: ARM Cortex-M23 secure\n" - " GCC_ARM_CM23_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M23 non-trustzone non-secure\n" - " GCC_ARM_CM33_NONSECURE - Compiler: GCC Target: ARM Cortex-M33 non-secure\n" - " GCC_ARM_CM33_SECURE - Compiler: GCC Target: ARM Cortex-M33 secure\n" - " GCC_ARM_CM33_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M33 non-trustzone non-secure\n" - " GCC_ARM_CM33_TFM - Compiler: GCC Target: ARM Cortex-M33 non-secure for TF-M\n" - " GCC_ARM_CM35P_NONSECURE - Compiler: GCC Target: ARM Cortex-M35P non-secure\n" - " GCC_ARM_CM35P_SECURE - Compiler: GCC Target: ARM Cortex-M35P secure\n" - " GCC_ARM_CM35P_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M35P non-trustzone non-secure\n" - " GCC_ARM_CM55_NONSECURE - Compiler: GCC Target: ARM Cortex-M55 non-secure\n" - " GCC_ARM_CM55_SECURE - Compiler: GCC Target: ARM Cortex-M55 secure\n" - " GCC_ARM_CM55_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M55 non-trustzone non-secure\n" - " GCC_ARM_CM55_TFM - Compiler: GCC Target: ARM Cortex-M55 non-secure for TF-M\n" - " GCC_ARM_CM85_NONSECURE - Compiler: GCC Target: ARM Cortex-M85 non-secure\n" - " GCC_ARM_CM85_SECURE - Compiler: GCC Target: ARM Cortex-M85 secure\n" - " GCC_ARM_CM85_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M85 non-trustzone non-secure\n" - " GCC_ARM_CM85_TFM - Compiler: GCC Target: ARM Cortex-M85 non-secure for TF-M\n" - " GCC_ARM_CR5 - Compiler: GCC Target: ARM Cortex-R5\n" - " GCC_ARM_CRX_MPU - Compiler: GCC Target: ARM Cortex-Rx with MPU\n" - " GCC_ARM_CRX_NOGIC - Compiler: GCC Target: ARM Cortex-Rx no GIC\n" - " GCC_ARM7_AT91FR40008 - Compiler: GCC Target: ARM7 Atmel AT91R40008\n" - " GCC_ARM7_AT91SAM7S - Compiler: GCC Target: ARM7 Atmel AT91SAM7S\n" - " GCC_ARM7_LPC2000 - Compiler: GCC Target: ARM7 LPC2000\n" - " GCC_ARM7_LPC23XX - Compiler: GCC Target: ARM7 LPC23xx\n" - " GCC_ATMEGA323 - Compiler: GCC Target: ATMega323\n" - " GCC_AVR32_UC3 - Compiler: GCC Target: AVR32 UC3\n" - " GCC_COLDFIRE_V2 - Compiler: GCC Target: ColdFire V2\n" - " GCC_CORTUS_APS3 - Compiler: GCC Target: CORTUS APS3\n" - " GCC_H8S2329 - Compiler: GCC Target: H8S2329\n" - " GCC_HCS12 - Compiler: GCC Target: HCS12\n" - " GCC_IA32_FLAT - Compiler: GCC Target: IA32 flat\n" - " GCC_MICROBLAZE - Compiler: GCC Target: MicroBlaze\n" - " GCC_MICROBLAZE_V8 - Compiler: GCC Target: MicroBlaze V8\n" - " GCC_MICROBLAZE_V9 - Compiler: GCC Target: MicroBlaze V9\n" - " GCC_MSP430F449 - Compiler: GCC Target: MSP430F449\n" - " GCC_NIOSII - Compiler: GCC Target: NiosII\n" - " GCC_PPC405_XILINX - Compiler: GCC Target: Xilinx PPC405\n" - " GCC_PPC440_XILINX - Compiler: GCC Target: Xilinx PPC440\n" - " GCC_RISC_V - Compiler: GCC Target: RISC-V\n" - " GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiler: GCC Target: RISC-V Pulpino Vega RV32M1RM\n" - " GCC_RISC_V_GENERIC - Compiler: GCC Target: RISC-V with FREERTOS_RISCV_EXTENSION\n" - " GCC_RL78 - Compiler: GCC Target: Renesas RL78\n" - " GCC_RX100 - Compiler: GCC Target: Renesas RX100\n" - " GCC_RX200 - Compiler: GCC Target: Renesas RX200\n" - " GCC_RX600 - Compiler: GCC Target: Renesas RX600\n" - " GCC_RX600_V2 - Compiler: GCC Target: Renesas RX600 v2\n" - " GCC_RX700_V3_DPFPU - Compiler: GCC Target: Renesas RX700 v3 with DPFPU\n" - " GCC_STR75X - Compiler: GCC Target: STR75x\n" - " GCC_TRICORE_1782 - Compiler: GCC Target: TriCore 1782\n" - " GCC_ARC_EM_HS - Compiler: GCC Target: DesignWare ARC EM HS\n" - " GCC_ARC_V1 - Compiler: GCC Target: DesignWare ARC v1\n" - " GCC_ATMEGA - Compiler: GCC Target: ATmega\n" - " GCC_POSIX - Compiler: GCC Target: Posix\n" - " GCC_RP2040 - Compiler: GCC Target: RP2040 ARM Cortex-M0+\n" - " GCC_XTENSA_ESP32 - Compiler: GCC Target: Xtensa ESP32\n" - " GCC_AVRDX - Compiler: GCC Target: AVRDx\n" - " GCC_AVR_MEGA0 - Compiler: GCC Target: AVR Mega0\n" - " IAR_78K0K - Compiler: IAR Target: Renesas 78K0K\n" - " IAR_ARM_CA5_NOGIC - Compiler: IAR Target: ARM Cortex-A5 no GIC\n" - " IAR_ARM_CA9 - Compiler: IAR Target: ARM Cortex-A9\n" - " IAR_ARM_CM0 - Compiler: IAR Target: ARM Cortex-M0\n" - " IAR_ARM_CM3 - Compiler: IAR Target: ARM Cortex-M3\n" - " IAR_ARM_CM4F - Compiler: IAR Target: ARM Cortex-M4 with FPU\n" - " IAR_ARM_CM4F_MPU - Compiler: IAR Target: ARM Cortex-M4 with FPU and MPU\n" - " IAR_ARM_CM7 - Compiler: IAR Target: ARM Cortex-M7\n" - " IAR_ARM_CM23_NONSECURE - Compiler: IAR Target: ARM Cortex-M23 non-secure\n" - " IAR_ARM_CM23_SECURE - Compiler: IAR Target: ARM Cortex-M23 secure\n" - " IAR_ARM_CM23_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M23 non-trustzone non-secure\n" - " IAR_ARM_CM33_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-secure\n" - " IAR_ARM_CM33_SECURE - Compiler: IAR Target: ARM Cortex-M33 secure\n" - " IAR_ARM_CM33_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-trustzone non-secure\n" - " IAR_ARM_CM35P_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-secure\n" - " IAR_ARM_CM35P_SECURE - Compiler: IAR Target: ARM Cortex-M35P secure\n" - " IAR_ARM_CM35P_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-trustzone non-secure\n" - " IAR_ARM_CM55_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-secure\n" - " IAR_ARM_CM55_SECURE - Compiler: IAR Target: ARM Cortex-M55 secure\n" - " IAR_ARM_CM55_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-trustzone non-secure\n" - " IAR_ARM_CM85_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-secure\n" - " IAR_ARM_CM85_SECURE - Compiler: IAR Target: ARM Cortex-M85 secure\n" - " IAR_ARM_CM85_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-trustzone non-secure\n" - " IAR_ARM_CRX_NOGIC - Compiler: IAR Target: ARM Cortex-Rx no GIC\n" - " IAR_ATMEGA323 - Compiler: IAR Target: ATMega323\n" - " IAR_ATMEL_SAM7S64 - Compiler: IAR Target: Atmel SAM7S64\n" - " IAR_ATMEL_SAM9XE - Compiler: IAR Target: Atmel SAM9XE\n" - " IAR_AVR_AVRDX - Compiler: IAR Target: AVRDx\n" - " IAR_AVR_MEGA0 - Compiler: IAR Target: AVR Mega0\n" - " IAR_AVR32_UC3 - Compiler: IAR Target: AVR32 UC3\n" - " IAR_LPC2000 - Compiler: IAR Target: LPC2000\n" - " IAR_MSP430 - Compiler: IAR Target: MSP430\n" - " IAR_MSP430X - Compiler: IAR Target: MSP430X\n" - " IAR_RISC_V - Compiler: IAR Target: RISC-V\n" - " IAR_RISC_V_GENERIC - Compiler: IAR Target: RISC-V with FREERTOS_RISCV_EXTENSION\n" - " IAR_RL78 - Compiler: IAR Target: Renesas RL78\n" - " IAR_RX100 - Compiler: IAR Target: Renesas RX100\n" - " IAR_RX600 - Compiler: IAR Target: Renesas RX600\n" - " IAR_RX700_V3_DPFPU - Compiler: IAR Target: Renesas RX700 v3 with DPFPU\n" - " IAR_RX_V2 - Compiler: IAR Target: Renesas RX v2\n" - " IAR_STR71X - Compiler: IAR Target: STR71x\n" - " IAR_STR75X - Compiler: IAR Target: STR75x\n" - " IAR_STR91X - Compiler: IAR Target: STR91x\n" - " IAR_V850ES_FX3 - Compiler: IAR Target: Renesas V850ES/Fx3\n" - " IAR_V850ES_HX3 - Compiler: IAR Target: Renesas V850ES/Hx3\n" - " MIKROC_ARM_CM4F - Compiler: MikroC Target: ARM Cortex-M4 with FPU\n" - " MPLAB_PIC18F - Compiler: MPLAB Target: PIC18F\n" - " MPLAB_PIC24 - Compiler: MPLAB Target: PIC24\n" - " MPLAB_PIC32MEC14XX - Compiler: MPLAB Target: PIC32MEC14xx\n" - " MPLAB_PIC32MX - Compiler: MPLAB Target: PIC32MX\n" - " MPLAB_PIC32MZ - Compiler: MPLAB Target: PIC32MZ\n" - " MSVC_MINGW - Compiler: MSVC or MinGW Target: x86\n" - " OWATCOM_16BIT_DOS_FLSH186 - Compiler: Open Watcom Target: 16 bit DOS Flsh186\n" - " OWATCOM_16BIT_DOS_PC - Compiler: Open Watcom Target: 16 bit DOS PC\n" - " PARADIGM_TERN_EE_LARGE - Compiler: Paradigm Target: Tern EE large\n" - " PARADIGM_TERN_EE_SMALL - Compiler: Paradigm Target: Tern EE small\n" - " RENESAS_RX100 - Compiler: Renesas Target: RX100\n" - " RENESAS_RX200 - Compiler: Renesas Target: RX200\n" - " RENESAS_RX600 - Compiler: Renesas Target: RX600\n" - " RENESAS_RX600_V2 - Compiler: Renesas Target: RX600 v2\n" - " RENESAS_RX700_V3_DPFPU - Compiler: Renesas Target: RX700 v3 with DPFPU\n" - " RENESAS_SH2A_FPU - Compiler: Renesas Target: SH2A with FPU\n" - " ROWLEY_MSP430F449 - Compiler: Rowley Target: MSP430F449\n" - " RVDS_ARM_CA9 - Compiler: RVDS Target: ARM Cortex-A9\n" - " RVDS_ARM_CM0 - Compiler: RVDS Target: ARM Cortex-M0\n" - " RVDS_ARM_CM3 - Compiler: RVDS Target: ARM Cortex-M3\n" - " RVDS_ARM_CM4_MPU - Compiler: RVDS Target: ARM Cortex-M4 with MPU\n" - " RVDS_ARM_CM4F - Compiler: RVDS Target: ARM Cortex-M4 with FPU\n" - " RVDS_ARM_CM7 - Compiler: RVDS Target: ARM Cortex-M7\n" - " RVDS_ARM7_LPC21XX - Compiler: RVDS Target: ARM7 LPC21xx\n" - " SDCC_CYGNAL - Compiler: SDCC Target: Cygnal\n" - " SOFTUNE_MB91460 - Compiler: Softune Target: MB91460\n" - " SOFTUNE_MB96340 - Compiler: Softune Target: MB96340\n" - " TASKING_ARM_CM4F - Compiler: Tasking Target: ARM Cortex-M4 with FPU\n" - " TEMPLATE - Compiler: HOST Target: None\n" - " CDK_THEAD_CK802 - Compiler: CDK Target: T-head CK802\n" - " XCC_XTENSA - Compiler: XCC Target: Xtensa\n" - " WIZC_PIC18 - Compiler: WizC Target: PIC18") - # Native FREERTOS_PORT for Linux and Windows MINGW builds - if(UNIX) - message(STATUS " Auto-Detected Unix, setting FREERTOS_PORT=GCC_POSIX") - set(FREERTOS_PORT GCC_POSIX CACHE STRING "FreeRTOS port name") - elseif(MINGW) - message(STATUS " Auto-Detected MINGW, setting FREERTOS_PORT=MSVC_MINGW") - set(FREERTOS_PORT MSVC_MINGW CACHE STRING "FreeRTOS port name") - endif() -elseif((FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") AND (NOT TARGET freertos_kernel_port) ) - message(FATAL_ERROR " FREERTOS_PORT is set to A_CUSTOM_PORT. Please specify the custom port target with all necessary files. For example:\n" - " Assuming a directory of:\n" - " FreeRTOSCustomPort/\n" - " CMakeLists.txt\n" - " port.c\n" - " portmacro.h\n" - " Where FreeRTOSCustomPort/CMakeLists.txt is a modified version of:\n" - " add_library(freertos_kernel_port OBJECT)\n" - " target_sources(freertos_kernel_port\n" - " PRIVATE\n" - " port.c\n" - " portmacro.h)\n" - " add_library(freertos_kernel_port_headers INTERFACE)\n" - " target_include_directories(freertos_kernel_port_headers INTERFACE \n" - " .)\n" - " target_link_libraries(freertos_kernel_port\n" - " PRIVATE\n" - " freertos_kernel_port_headers\n" - " freertos_kernel_include)") -endif() - -add_library(freertos_kernel STATIC) - -######################################################################## -add_subdirectory(include) -add_subdirectory(portable) - -target_sources(freertos_kernel PRIVATE - croutine.c - event_groups.c - list.c - queue.c - stream_buffer.c - tasks.c - timers.c -) - -if (DEFINED FREERTOS_HEAP ) - # User specified a heap implementation add heap implementation to freertos_kernel. - target_sources(freertos_kernel PRIVATE - # If FREERTOS_HEAP is digit between 1 .. 5 - it is heap number, otherwise - it is path to custom heap source file - $>,${FREERTOS_HEAP},portable/MemMang/heap_${FREERTOS_HEAP}.c> - ) -endif() - - -target_link_libraries(freertos_kernel - PUBLIC - freertos_kernel_include - freertos_kernel_port_headers - PRIVATE - freertos_kernel_port - -) - -######################################################################## diff --git a/freertos/MISRA.md b/freertos/MISRA.md deleted file mode 100644 index 4355ec6..0000000 --- a/freertos/MISRA.md +++ /dev/null @@ -1,126 +0,0 @@ -# MISRA Compliance - -FreeRTOS-Kernel conforms to [MISRA C:2012](https://www.misra.org.uk/misra-c) -guidelines, with the deviations listed below. Compliance is checked with -Coverity static analysis version 2023.6.1. Since the FreeRTOS kernel is -designed for small-embedded devices, it needs to have a very small memory -footprint and has to be efficient. To achieve that and to increase the -performance, it deviates from some MISRA rules. The specific deviations, -suppressed inline, are listed below. - -Additionally, [MISRA configuration file](examples/coverity/coverity_misra.config) -contains project wide deviations. - -### Suppressed with Coverity Comments -To find the violation references in the source files run grep on the source code -with ( Assuming rule 8.4 violation; with justification in point 1 ): -``` -grep 'MISRA Ref 8.4.1' . -rI -``` - -#### Dir 4.7 -MISRA C:2012 Dir 4.7: If a function returns error information, then that error -information shall be tested. - -_Ref 4.7.1_ - - `taskENTER_CRITICAL_FROM_ISR` returns the interrupt mask and not any error - information. Therefore, there is no need test the return value. - -#### Rule 8.4 - -MISRA C:2012 Rule 8.4: A compatible declaration shall be visible when an -object or function with external linkage is defined. - -_Ref 8.4.1_ - - pxCurrentTCB(s) is defined with external linkage but it is only referenced - from the assembly code in the port files. Therefore, adding a declaration in - header file is not useful as the assembly code will still need to declare it - separately. - -_Ref 8.4.2_ - - xQueueRegistry is defined with external linkage because it is accessed by the - kernel unit tests. It is not meant to be directly accessed by the application - and therefore, not declared in a header file. - -#### Rule 8.6 - -MISRA C:2012 Rule 8.6: An identifier with external linkage shall have exactly -one external definition. - -_Ref 8.6.1_ - - This rule prohibits an identifier with external linkage to have multiple - definitions or no definition. FreeRTOS hook functions are implemented in - the application and therefore, have no definition in the Kernel code. - -#### Rule 11.1 -MISRA C:2012 Rule 11.1: Conversions shall not be performed between a pointer to -function and any other type. - -_Ref 11.1.1_ - - The pointer to function is casted into void to avoid unused parameter - compiler warning when Stream Buffer's Tx and Rx Completed callback feature is - not used. - -#### Rule 11.3 - -MISRA C:2012 Rule 11.3: A cast shall not be performed between a pointer to -object type and a pointer to a different object type. - -_Ref 11.3.1_ - - This rule prohibits casting a pointer to object into a pointer to a - different object because it may result in an incorrectly aligned pointer, - leading to undefined behavior. Even if the casting produces a correctly - aligned pointer, the behavior may be still undefined if the pointer is - used to access an object. FreeRTOS deliberately creates external aliases - for all the kernel object types (StaticEventGroup_t, StaticQueue_t, - StaticStreamBuffer_t, StaticTimer_t and StaticTask_t) for data hiding - purposes. The internal object types and the corresponding external - aliases are guaranteed to have the same size and alignment which is - checked using configASSERT. - - -#### Rule 11.5 - -MISRA C:2012 Rule 11.5: A conversion should not be performed from pointer to -void into pointer to object. -This rule prohibits conversion of a pointer to void into a pointer to -object because it may result in an incorrectly aligned pointer leading -to undefined behavior. - -_Ref 11.5.1_ - - The memory blocks returned by pvPortMalloc() are guaranteed to meet the - architecture alignment requirements specified by portBYTE_ALIGNMENT. - The casting of the pointer to void returned by pvPortMalloc() is, - therefore, safe because it is guaranteed to be aligned. - -_Ref 11.5.2_ - - The conversion from a pointer to void into a pointer to EventGroup_t is - safe because it is a pointer to EventGroup_t, which is returned to the - application at the time of event group creation for data hiding - purposes. - -_Ref 11.5.3_ - - The conversion from a pointer to void in list macros for list item owner - is safe because the type of the pointer stored and retrieved is the - same. - -_Ref 11.5.4_ - - The conversion from a pointer to void into a pointer to EventGroup_t is - safe because it is a pointer to EventGroup_t, which is passed as a - parameter to the xTimerPendFunctionCallFromISR API when the callback is - pended. - -_Ref 11.5.5_ - - The conversion from a pointer to void into a pointer to uint8_t is safe - because data storage buffers are implemented as uint8_t arrays for the - ease of sizing, alignment and access. - -#### Rule 21.6 - -MISRA C-2012 Rule 21.6: The Standard Library input/output functions shall not -be used. - -_Ref 21.6.1_ - - The Standard Library function snprintf is used in vTaskListTasks and - vTaskGetRunTimeStatistics APIs, both of which are utility functions only and - are not considered part of core kernel implementation. diff --git a/freertos/cspell.config.yaml b/freertos/cspell.config.yaml deleted file mode 100644 index 911ce1d..0000000 --- a/freertos/cspell.config.yaml +++ /dev/null @@ -1,31 +0,0 @@ ---- -$schema: https://raw.githubusercontent.com/streetsidesoftware/cspell/main/cspell.schema.json -version: '0.2' -# Allows things like stringLength -allowCompoundWords: true - -# Read files not to spell check from the git ignore -useGitignore: true - -# Language settings for C -languageSettings: - - caseSensitive: false - enabled: true - languageId: c - locale: "*" - -# Add a dictionary, and the path to the word list -dictionaryDefinitions: - - name: freertos-words - path: '.github/.cSpellWords.txt' - addWords: true - -dictionaries: - - freertos-words - -# Paths and files to ignore -ignorePaths: - - 'dependency' - - 'docs' - - 'ThirdParty' - - 'History.txt' diff --git a/freertos/include/CMakeLists.txt b/freertos/inc/CMakeLists.txt similarity index 100% rename from freertos/include/CMakeLists.txt rename to freertos/inc/CMakeLists.txt diff --git a/freertos/include/FreeRTOS.h b/freertos/inc/FreeRTOS.h similarity index 100% rename from freertos/include/FreeRTOS.h rename to freertos/inc/FreeRTOS.h diff --git a/freertos/inc/FreeRTOSConfig.h b/freertos/inc/FreeRTOSConfig.h new file mode 100644 index 0000000..4ea7a91 --- /dev/null +++ b/freertos/inc/FreeRTOSConfig.h @@ -0,0 +1,86 @@ +/* + * FreeRTOS V202411.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html + *----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ((unsigned long)72000000) +#define configTICK_RATE_HZ ((TickType_t)1000) +#define configMAX_PRIORITIES (5) +#define configMINIMAL_STACK_SIZE ((unsigned short)128) +#define configTOTAL_HEAP_SIZE ((size_t)(8 * 1024)) +#define configMAX_TASK_NAME_LEN (16) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES (2) + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 + +/* This is the raw value as per the Cortex-M3 NVIC. Values can be 255 +(lowest) to 0 (1?) (highest). */ +#define configKERNEL_INTERRUPT_PRIORITY 255 +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 191 /* equivalent to 0xb0, or priority 11. */ + +/* This is the value being used as per the ST library which permits 16 +priority values, 0 to 15. This must correspond to the +configKERNEL_INTERRUPT_PRIORITY setting. Here 15 corresponds to the lowest +NVIC value of 255. */ +#define configLIBRARY_KERNEL_INTERRUPT_PRIORITY 15 + +#define xPortPendSVHandler PendSV_Handler +#define vPortSVCHandler SVC_Handler +#define xPortSysTickHandler SysTick_Handler +#endif /* FREERTOS_CONFIG_H */ diff --git a/freertos/include/StackMacros.h b/freertos/inc/StackMacros.h similarity index 100% rename from freertos/include/StackMacros.h rename to freertos/inc/StackMacros.h diff --git a/freertos/include/atomic.h b/freertos/inc/atomic.h similarity index 100% rename from freertos/include/atomic.h rename to freertos/inc/atomic.h diff --git a/freertos/include/croutine.h b/freertos/inc/croutine.h similarity index 100% rename from freertos/include/croutine.h rename to freertos/inc/croutine.h diff --git a/freertos/include/deprecated_definitions.h b/freertos/inc/deprecated_definitions.h similarity index 100% rename from freertos/include/deprecated_definitions.h rename to freertos/inc/deprecated_definitions.h diff --git a/freertos/include/event_groups.h b/freertos/inc/event_groups.h similarity index 100% rename from freertos/include/event_groups.h rename to freertos/inc/event_groups.h diff --git a/freertos/include/list.h b/freertos/inc/list.h similarity index 100% rename from freertos/include/list.h rename to freertos/inc/list.h diff --git a/freertos/include/message_buffer.h b/freertos/inc/message_buffer.h similarity index 100% rename from freertos/include/message_buffer.h rename to freertos/inc/message_buffer.h diff --git a/freertos/include/mpu_prototypes.h b/freertos/inc/mpu_prototypes.h similarity index 100% rename from freertos/include/mpu_prototypes.h rename to freertos/inc/mpu_prototypes.h diff --git a/freertos/include/mpu_syscall_numbers.h b/freertos/inc/mpu_syscall_numbers.h similarity index 100% rename from freertos/include/mpu_syscall_numbers.h rename to freertos/inc/mpu_syscall_numbers.h diff --git a/freertos/include/mpu_wrappers.h b/freertos/inc/mpu_wrappers.h similarity index 100% rename from freertos/include/mpu_wrappers.h rename to freertos/inc/mpu_wrappers.h diff --git a/freertos/include/newlib-freertos.h b/freertos/inc/newlib-freertos.h similarity index 100% rename from freertos/include/newlib-freertos.h rename to freertos/inc/newlib-freertos.h diff --git a/freertos/include/picolibc-freertos.h b/freertos/inc/picolibc-freertos.h similarity index 100% rename from freertos/include/picolibc-freertos.h rename to freertos/inc/picolibc-freertos.h diff --git a/freertos/include/portable.h b/freertos/inc/portable.h similarity index 100% rename from freertos/include/portable.h rename to freertos/inc/portable.h diff --git a/freertos/include/projdefs.h b/freertos/inc/projdefs.h similarity index 100% rename from freertos/include/projdefs.h rename to freertos/inc/projdefs.h diff --git a/freertos/include/queue.h b/freertos/inc/queue.h similarity index 100% rename from freertos/include/queue.h rename to freertos/inc/queue.h diff --git a/freertos/include/semphr.h b/freertos/inc/semphr.h similarity index 100% rename from freertos/include/semphr.h rename to freertos/inc/semphr.h diff --git a/freertos/include/stack_macros.h b/freertos/inc/stack_macros.h similarity index 100% rename from freertos/include/stack_macros.h rename to freertos/inc/stack_macros.h diff --git a/freertos/include/stdint.readme b/freertos/inc/stdint.readme similarity index 100% rename from freertos/include/stdint.readme rename to freertos/inc/stdint.readme diff --git a/freertos/include/stream_buffer.h b/freertos/inc/stream_buffer.h similarity index 100% rename from freertos/include/stream_buffer.h rename to freertos/inc/stream_buffer.h diff --git a/freertos/include/task.h b/freertos/inc/task.h similarity index 100% rename from freertos/include/task.h rename to freertos/inc/task.h diff --git a/freertos/include/timers.h b/freertos/inc/timers.h similarity index 100% rename from freertos/include/timers.h rename to freertos/inc/timers.h diff --git a/freertos/manifest.yml b/freertos/manifest.yml deleted file mode 100644 index d25723f..0000000 --- a/freertos/manifest.yml +++ /dev/null @@ -1,4 +0,0 @@ -name : "FreeRTOS-Kernel" -version: "v11.1.0" -description: "FreeRTOS Kernel." -license: "MIT" diff --git a/freertos/os.h b/freertos/os.h new file mode 100644 index 0000000..105c4b3 --- /dev/null +++ b/freertos/os.h @@ -0,0 +1,7 @@ +#ifndef __OS_H__ +#define __OS_H__ + +#include "FreeRTOS.h" +#include "task.h" + +#endif // __OS_H__ diff --git a/freertos/port/MemMang/ReadMe.url b/freertos/port/MemMang/ReadMe.url new file mode 100644 index 0000000..28c9937 --- /dev/null +++ b/freertos/port/MemMang/ReadMe.url @@ -0,0 +1,5 @@ +[{000214A0-0000-0000-C000-000000000046}] +Prop3=19,2 +[InternetShortcut] +URL=https://www.FreeRTOS.org/a00111.html +IDList= diff --git a/freertos/port/MemMang/heap_1.c b/freertos/port/MemMang/heap_1.c new file mode 100644 index 0000000..59b82c7 --- /dev/null +++ b/freertos/port/MemMang/heap_1.c @@ -0,0 +1,165 @@ +/* + * FreeRTOS Kernel V11.1.0 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +/* + * The simplest possible implementation of pvPortMalloc(). Note that this + * implementation does NOT allow allocated memory to be freed again. + * + * See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the + * memory management pages of https://www.FreeRTOS.org for more information. + */ +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining + * all the API functions to use the MPU wrappers. That should only be done when + * task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +/* A few bytes might be lost to byte aligning the heap start address. */ +#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT ) + +/* Allocate the memory for the heap. */ +#if ( configAPPLICATION_ALLOCATED_HEAP == 1 ) + +/* The application writer has already defined the array used for the RTOS +* heap - probably so it can be placed in a special segment or address. */ + extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#else + static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#endif /* configAPPLICATION_ALLOCATED_HEAP */ + +/* Index into the ucHeap array. */ +static size_t xNextFreeByte = ( size_t ) 0U; + +/*-----------------------------------------------------------*/ + +void * pvPortMalloc( size_t xWantedSize ) +{ + void * pvReturn = NULL; + static uint8_t * pucAlignedHeap = NULL; + + /* Ensure that blocks are always aligned. */ + #if ( portBYTE_ALIGNMENT != 1 ) + { + if( xWantedSize & portBYTE_ALIGNMENT_MASK ) + { + /* Byte alignment required. Check for overflow. */ + if( ( xWantedSize + ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ) ) > xWantedSize ) + { + xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); + } + else + { + xWantedSize = 0; + } + } + } + #endif /* if ( portBYTE_ALIGNMENT != 1 ) */ + + vTaskSuspendAll(); + { + if( pucAlignedHeap == NULL ) + { + /* Ensure the heap starts on a correctly aligned boundary. */ + pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT - 1 ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); + } + + /* Check there is enough room left for the allocation and. */ + if( ( xWantedSize > 0 ) && /* valid size */ + ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) && + ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) ) /* Check for overflow. */ + { + /* Return the next free byte then increment the index past this + * block. */ + pvReturn = pucAlignedHeap + xNextFreeByte; + xNextFreeByte += xWantedSize; + } + + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if ( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + vApplicationMallocFailedHook(); + } + } + #endif + + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void * pv ) +{ + /* Memory cannot be freed using this scheme. See heap_2.c, heap_3.c and + * heap_4.c for alternative implementations, and the memory management pages of + * https://www.FreeRTOS.org for more information. */ + ( void ) pv; + + /* Force an assert as it is invalid to call this function. */ + configASSERT( pv == NULL ); +} +/*-----------------------------------------------------------*/ + +void vPortInitialiseBlocks( void ) +{ + /* Only required when static memory is not cleared. */ + xNextFreeByte = ( size_t ) 0; +} +/*-----------------------------------------------------------*/ + +size_t xPortGetFreeHeapSize( void ) +{ + return( configADJUSTED_HEAP_SIZE - xNextFreeByte ); +} + +/*-----------------------------------------------------------*/ + +/* + * Reset the state in this file. This state is normally initialized at start up. + * This function must be called by the application before restarting the + * scheduler. + */ +void vPortHeapResetState( void ) +{ + xNextFreeByte = ( size_t ) 0U; +} +/*-----------------------------------------------------------*/ diff --git a/freertos/port/MemMang/heap_2.c b/freertos/port/MemMang/heap_2.c new file mode 100644 index 0000000..59d91ad --- /dev/null +++ b/freertos/port/MemMang/heap_2.c @@ -0,0 +1,401 @@ +/* + * FreeRTOS Kernel V11.1.0 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* + * A sample implementation of pvPortMalloc() and vPortFree() that permits + * allocated blocks to be freed, but does not combine adjacent free blocks + * into a single larger block (and so will fragment memory). See heap_4.c for + * an equivalent that does combine adjacent blocks into single larger blocks. + * + * See heap_1.c, heap_3.c and heap_4.c for alternative implementations, and the + * memory management pages of https://www.FreeRTOS.org for more information. + */ +#include +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining + * all the API functions to use the MPU wrappers. That should only be done when + * task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +#ifndef configHEAP_CLEAR_MEMORY_ON_FREE + #define configHEAP_CLEAR_MEMORY_ON_FREE 0 +#endif + +/* A few bytes might be lost to byte aligning the heap start address. */ +#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT ) + +/* Assumes 8bit bytes! */ +#define heapBITS_PER_BYTE ( ( size_t ) 8 ) + +/* Max value that fits in a size_t type. */ +#define heapSIZE_MAX ( ~( ( size_t ) 0 ) ) + +/* Check if multiplying a and b will result in overflow. */ +#define heapMULTIPLY_WILL_OVERFLOW( a, b ) ( ( ( a ) > 0 ) && ( ( b ) > ( heapSIZE_MAX / ( a ) ) ) ) + +/* Check if adding a and b will result in overflow. */ +#define heapADD_WILL_OVERFLOW( a, b ) ( ( a ) > ( heapSIZE_MAX - ( b ) ) ) + +/* MSB of the xBlockSize member of an BlockLink_t structure is used to track + * the allocation status of a block. When MSB of the xBlockSize member of + * an BlockLink_t structure is set then the block belongs to the application. + * When the bit is free the block is still part of the free heap space. */ +#define heapBLOCK_ALLOCATED_BITMASK ( ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ) ) +#define heapBLOCK_SIZE_IS_VALID( xBlockSize ) ( ( ( xBlockSize ) & heapBLOCK_ALLOCATED_BITMASK ) == 0 ) +#define heapBLOCK_IS_ALLOCATED( pxBlock ) ( ( ( pxBlock->xBlockSize ) & heapBLOCK_ALLOCATED_BITMASK ) != 0 ) +#define heapALLOCATE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) |= heapBLOCK_ALLOCATED_BITMASK ) +#define heapFREE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) &= ~heapBLOCK_ALLOCATED_BITMASK ) + +/*-----------------------------------------------------------*/ + +/* Allocate the memory for the heap. */ +#if ( configAPPLICATION_ALLOCATED_HEAP == 1 ) + +/* The application writer has already defined the array used for the RTOS +* heap - probably so it can be placed in a special segment or address. */ + extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#else + PRIVILEGED_DATA static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#endif /* configAPPLICATION_ALLOCATED_HEAP */ + + +/* Define the linked list structure. This is used to link free blocks in order + * of their size. */ +typedef struct A_BLOCK_LINK +{ + struct A_BLOCK_LINK * pxNextFreeBlock; /*<< The next free block in the list. */ + size_t xBlockSize; /*<< The size of the free block. */ +} BlockLink_t; + + +static const size_t xHeapStructSize = ( ( sizeof( BlockLink_t ) + ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK ) ); +#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize * 2 ) ) + +/* Create a couple of list links to mark the start and end of the list. */ +PRIVILEGED_DATA static BlockLink_t xStart, xEnd; + +/* Keeps track of the number of free bytes remaining, but says nothing about + * fragmentation. */ +PRIVILEGED_DATA static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE; + +/* Indicates whether the heap has been initialised or not. */ +PRIVILEGED_DATA static BaseType_t xHeapHasBeenInitialised = pdFALSE; + +/*-----------------------------------------------------------*/ + +/* + * Initialises the heap structures before their first use. + */ +static void prvHeapInit( void ) PRIVILEGED_FUNCTION; + +/*-----------------------------------------------------------*/ + +/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ + +/* + * Insert a block into the list of free blocks - which is ordered by size of + * the block. Small blocks at the start of the list and large blocks at the end + * of the list. + */ +#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ + { \ + BlockLink_t * pxIterator; \ + size_t xBlockSize; \ + \ + xBlockSize = pxBlockToInsert->xBlockSize; \ + \ + /* Iterate through the list until a block is found that has a larger size */ \ + /* than the block we are inserting. */ \ + for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ + { \ + /* There is nothing to do here - just iterate to the correct position. */ \ + } \ + \ + /* Update the list to include the block being inserted in the correct */ \ + /* position. */ \ + pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ + pxIterator->pxNextFreeBlock = pxBlockToInsert; \ + } +/*-----------------------------------------------------------*/ + +void * pvPortMalloc( size_t xWantedSize ) +{ + BlockLink_t * pxBlock; + BlockLink_t * pxPreviousBlock; + BlockLink_t * pxNewBlockLink; + void * pvReturn = NULL; + size_t xAdditionalRequiredSize; + + if( xWantedSize > 0 ) + { + /* The wanted size must be increased so it can contain a BlockLink_t + * structure in addition to the requested amount of bytes. */ + if( heapADD_WILL_OVERFLOW( xWantedSize, xHeapStructSize ) == 0 ) + { + xWantedSize += xHeapStructSize; + + /* Ensure that blocks are always aligned to the required number + * of bytes. */ + if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 ) + { + /* Byte alignment required. */ + xAdditionalRequiredSize = portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ); + + if( heapADD_WILL_OVERFLOW( xWantedSize, xAdditionalRequiredSize ) == 0 ) + { + xWantedSize += xAdditionalRequiredSize; + } + else + { + xWantedSize = 0; + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + xWantedSize = 0; + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + vTaskSuspendAll(); + { + /* If this is the first call to malloc then the heap will require + * initialisation to setup the list of free blocks. */ + if( xHeapHasBeenInitialised == pdFALSE ) + { + prvHeapInit(); + xHeapHasBeenInitialised = pdTRUE; + } + + /* Check the block size we are trying to allocate is not so large that the + * top bit is set. The top bit of the block size member of the BlockLink_t + * structure is used to determine who owns the block - the application or + * the kernel, so it must be free. */ + if( heapBLOCK_SIZE_IS_VALID( xWantedSize ) != 0 ) + { + if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) + { + /* Blocks are stored in byte order - traverse the list from the start + * (smallest) block until one of adequate size is found. */ + pxPreviousBlock = &xStart; + pxBlock = xStart.pxNextFreeBlock; + + while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) + { + pxPreviousBlock = pxBlock; + pxBlock = pxBlock->pxNextFreeBlock; + } + + /* If we found the end marker then a block of adequate size was not found. */ + if( pxBlock != &xEnd ) + { + /* Return the memory space - jumping over the BlockLink_t structure + * at its start. */ + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + + /* This block is being returned for use so must be taken out of the + * list of free blocks. */ + pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; + + /* If the block is larger than required it can be split into two. */ + if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) + { + /* This block is to be split into two. Create a new block + * following the number of bytes requested. The void cast is + * used to prevent byte alignment warnings from the compiler. */ + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + + /* Calculate the sizes of two blocks split from the single + * block. */ + pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; + pxBlock->xBlockSize = xWantedSize; + + /* Insert the new block into the list of free blocks. + * The list of free blocks is sorted by their size, we have to + * iterate to find the right place to insert new block. */ + prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); + } + + xFreeBytesRemaining -= pxBlock->xBlockSize; + + /* The block is being returned - it is allocated and owned + * by the application and has no "next" block. */ + heapALLOCATE_BLOCK( pxBlock ); + pxBlock->pxNextFreeBlock = NULL; + } + } + } + + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if ( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + vApplicationMallocFailedHook(); + } + } + #endif + + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void * pv ) +{ + uint8_t * puc = ( uint8_t * ) pv; + BlockLink_t * pxLink; + + if( pv != NULL ) + { + /* The memory being freed will have an BlockLink_t structure immediately + * before it. */ + puc -= xHeapStructSize; + + /* This unexpected casting is to keep some compilers from issuing + * byte alignment warnings. */ + pxLink = ( void * ) puc; + + configASSERT( heapBLOCK_IS_ALLOCATED( pxLink ) != 0 ); + configASSERT( pxLink->pxNextFreeBlock == NULL ); + + if( heapBLOCK_IS_ALLOCATED( pxLink ) != 0 ) + { + if( pxLink->pxNextFreeBlock == NULL ) + { + /* The block is being returned to the heap - it is no longer + * allocated. */ + heapFREE_BLOCK( pxLink ); + #if ( configHEAP_CLEAR_MEMORY_ON_FREE == 1 ) + { + ( void ) memset( puc + xHeapStructSize, 0, pxLink->xBlockSize - xHeapStructSize ); + } + #endif + + vTaskSuspendAll(); + { + /* Add this block to the list of free blocks. */ + prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); + xFreeBytesRemaining += pxLink->xBlockSize; + traceFREE( pv, pxLink->xBlockSize ); + } + ( void ) xTaskResumeAll(); + } + } + } +} +/*-----------------------------------------------------------*/ + +size_t xPortGetFreeHeapSize( void ) +{ + return xFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +void vPortInitialiseBlocks( void ) +{ + /* This just exists to keep the linker quiet. */ +} +/*-----------------------------------------------------------*/ + +void * pvPortCalloc( size_t xNum, + size_t xSize ) +{ + void * pv = NULL; + + if( heapMULTIPLY_WILL_OVERFLOW( xNum, xSize ) == 0 ) + { + pv = pvPortMalloc( xNum * xSize ); + + if( pv != NULL ) + { + ( void ) memset( pv, 0, xNum * xSize ); + } + } + + return pv; +} +/*-----------------------------------------------------------*/ + +static void prvHeapInit( void ) /* PRIVILEGED_FUNCTION */ +{ + BlockLink_t * pxFirstFreeBlock; + uint8_t * pucAlignedHeap; + + /* Ensure the heap starts on a correctly aligned boundary. */ + pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT - 1 ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); + + /* xStart is used to hold a pointer to the first item in the list of free + * blocks. The void cast is used to prevent compiler warnings. */ + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; + + /* xEnd is used to mark the end of the list of free blocks. */ + xEnd.xBlockSize = configADJUSTED_HEAP_SIZE; + xEnd.pxNextFreeBlock = NULL; + + /* To start with there is a single free block that is sized to take up the + * entire heap space. */ + pxFirstFreeBlock = ( BlockLink_t * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = configADJUSTED_HEAP_SIZE; + pxFirstFreeBlock->pxNextFreeBlock = &xEnd; +} +/*-----------------------------------------------------------*/ + +/* + * Reset the state in this file. This state is normally initialized at start up. + * This function must be called by the application before restarting the + * scheduler. + */ +void vPortHeapResetState( void ) +{ + xFreeBytesRemaining = configADJUSTED_HEAP_SIZE; + + xHeapHasBeenInitialised = pdFALSE; +} +/*-----------------------------------------------------------*/ diff --git a/freertos/port/MemMang/heap_3.c b/freertos/port/MemMang/heap_3.c new file mode 100644 index 0000000..8524fd7 --- /dev/null +++ b/freertos/port/MemMang/heap_3.c @@ -0,0 +1,106 @@ +/* + * FreeRTOS Kernel V11.1.0 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +/* + * Implementation of pvPortMalloc() and vPortFree() that relies on the + * compilers own malloc() and free() implementations. + * + * This file can only be used if the linker is configured to to generate + * a heap memory area. + * + * See heap_1.c, heap_2.c and heap_4.c for alternative implementations, and the + * memory management pages of https://www.FreeRTOS.org for more information. + */ + +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining + * all the API functions to use the MPU wrappers. That should only be done when + * task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +/*-----------------------------------------------------------*/ + +void * pvPortMalloc( size_t xWantedSize ) +{ + void * pvReturn; + + vTaskSuspendAll(); + { + pvReturn = malloc( xWantedSize ); + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if ( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + vApplicationMallocFailedHook(); + } + } + #endif + + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void * pv ) +{ + if( pv != NULL ) + { + vTaskSuspendAll(); + { + free( pv ); + traceFREE( pv, 0 ); + } + ( void ) xTaskResumeAll(); + } +} +/*-----------------------------------------------------------*/ + +/* + * Reset the state in this file. This state is normally initialized at start up. + * This function must be called by the application before restarting the + * scheduler. + */ +void vPortHeapResetState( void ) +{ + /* No state needs to be re-initialised in heap_3. */ +} +/*-----------------------------------------------------------*/ diff --git a/freertos/port/MemMang/heap_4.c b/freertos/port/MemMang/heap_4.c new file mode 100644 index 0000000..60cffb4 --- /dev/null +++ b/freertos/port/MemMang/heap_4.c @@ -0,0 +1,626 @@ +/* + * FreeRTOS Kernel V11.1.0 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* + * A sample implementation of pvPortMalloc() and vPortFree() that combines + * (coalescences) adjacent memory blocks as they are freed, and in so doing + * limits memory fragmentation. + * + * See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the + * memory management pages of https://www.FreeRTOS.org for more information. + */ +#include +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining + * all the API functions to use the MPU wrappers. That should only be done when + * task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +#ifndef configHEAP_CLEAR_MEMORY_ON_FREE + #define configHEAP_CLEAR_MEMORY_ON_FREE 0 +#endif + +/* Block sizes must not get too small. */ +#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) ) + +/* Assumes 8bit bytes! */ +#define heapBITS_PER_BYTE ( ( size_t ) 8 ) + +/* Max value that fits in a size_t type. */ +#define heapSIZE_MAX ( ~( ( size_t ) 0 ) ) + +/* Check if multiplying a and b will result in overflow. */ +#define heapMULTIPLY_WILL_OVERFLOW( a, b ) ( ( ( a ) > 0 ) && ( ( b ) > ( heapSIZE_MAX / ( a ) ) ) ) + +/* Check if adding a and b will result in overflow. */ +#define heapADD_WILL_OVERFLOW( a, b ) ( ( a ) > ( heapSIZE_MAX - ( b ) ) ) + +/* Check if the subtraction operation ( a - b ) will result in underflow. */ +#define heapSUBTRACT_WILL_UNDERFLOW( a, b ) ( ( a ) < ( b ) ) + +/* MSB of the xBlockSize member of an BlockLink_t structure is used to track + * the allocation status of a block. When MSB of the xBlockSize member of + * an BlockLink_t structure is set then the block belongs to the application. + * When the bit is free the block is still part of the free heap space. */ +#define heapBLOCK_ALLOCATED_BITMASK ( ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ) ) +#define heapBLOCK_SIZE_IS_VALID( xBlockSize ) ( ( ( xBlockSize ) & heapBLOCK_ALLOCATED_BITMASK ) == 0 ) +#define heapBLOCK_IS_ALLOCATED( pxBlock ) ( ( ( pxBlock->xBlockSize ) & heapBLOCK_ALLOCATED_BITMASK ) != 0 ) +#define heapALLOCATE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) |= heapBLOCK_ALLOCATED_BITMASK ) +#define heapFREE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) &= ~heapBLOCK_ALLOCATED_BITMASK ) + +/*-----------------------------------------------------------*/ + +/* Allocate the memory for the heap. */ +#if ( configAPPLICATION_ALLOCATED_HEAP == 1 ) + +/* The application writer has already defined the array used for the RTOS +* heap - probably so it can be placed in a special segment or address. */ + extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#else + PRIVILEGED_DATA static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#endif /* configAPPLICATION_ALLOCATED_HEAP */ + +/* Define the linked list structure. This is used to link free blocks in order + * of their memory address. */ +typedef struct A_BLOCK_LINK +{ + struct A_BLOCK_LINK * pxNextFreeBlock; /**< The next free block in the list. */ + size_t xBlockSize; /**< The size of the free block. */ +} BlockLink_t; + +/* Setting configENABLE_HEAP_PROTECTOR to 1 enables heap block pointers + * protection using an application supplied canary value to catch heap + * corruption should a heap buffer overflow occur. + */ +#if ( configENABLE_HEAP_PROTECTOR == 1 ) + +/** + * @brief Application provided function to get a random value to be used as canary. + * + * @param pxHeapCanary [out] Output parameter to return the canary value. + */ + extern void vApplicationGetRandomHeapCanary( portPOINTER_SIZE_TYPE * pxHeapCanary ); + +/* Canary value for protecting internal heap pointers. */ + PRIVILEGED_DATA static portPOINTER_SIZE_TYPE xHeapCanary; + +/* Macro to load/store BlockLink_t pointers to memory. By XORing the + * pointers with a random canary value, heap overflows will result + * in randomly unpredictable pointer values which will be caught by + * heapVALIDATE_BLOCK_POINTER assert. */ + #define heapPROTECT_BLOCK_POINTER( pxBlock ) ( ( BlockLink_t * ) ( ( ( portPOINTER_SIZE_TYPE ) ( pxBlock ) ) ^ xHeapCanary ) ) +#else + + #define heapPROTECT_BLOCK_POINTER( pxBlock ) ( pxBlock ) + +#endif /* configENABLE_HEAP_PROTECTOR */ + +/* Assert that a heap block pointer is within the heap bounds. */ +#define heapVALIDATE_BLOCK_POINTER( pxBlock ) \ + configASSERT( ( ( uint8_t * ) ( pxBlock ) >= &( ucHeap[ 0 ] ) ) && \ + ( ( uint8_t * ) ( pxBlock ) <= &( ucHeap[ configTOTAL_HEAP_SIZE - 1 ] ) ) ) + +/*-----------------------------------------------------------*/ + +/* + * Inserts a block of memory that is being freed into the correct position in + * the list of free memory blocks. The block being freed will be merged with + * the block in front it and/or the block behind it if the memory blocks are + * adjacent to each other. + */ +static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) PRIVILEGED_FUNCTION; + +/* + * Called automatically to setup the required heap structures the first time + * pvPortMalloc() is called. + */ +static void prvHeapInit( void ) PRIVILEGED_FUNCTION; + +/*-----------------------------------------------------------*/ + +/* The size of the structure placed at the beginning of each allocated memory + * block must by correctly byte aligned. */ +static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); + +/* Create a couple of list links to mark the start and end of the list. */ +PRIVILEGED_DATA static BlockLink_t xStart; +PRIVILEGED_DATA static BlockLink_t * pxEnd = NULL; + +/* Keeps track of the number of calls to allocate and free memory as well as the + * number of free bytes remaining, but says nothing about fragmentation. */ +PRIVILEGED_DATA static size_t xFreeBytesRemaining = ( size_t ) 0U; +PRIVILEGED_DATA static size_t xMinimumEverFreeBytesRemaining = ( size_t ) 0U; +PRIVILEGED_DATA static size_t xNumberOfSuccessfulAllocations = ( size_t ) 0U; +PRIVILEGED_DATA static size_t xNumberOfSuccessfulFrees = ( size_t ) 0U; + +/*-----------------------------------------------------------*/ + +void * pvPortMalloc( size_t xWantedSize ) +{ + BlockLink_t * pxBlock; + BlockLink_t * pxPreviousBlock; + BlockLink_t * pxNewBlockLink; + void * pvReturn = NULL; + size_t xAdditionalRequiredSize; + + if( xWantedSize > 0 ) + { + /* The wanted size must be increased so it can contain a BlockLink_t + * structure in addition to the requested amount of bytes. */ + if( heapADD_WILL_OVERFLOW( xWantedSize, xHeapStructSize ) == 0 ) + { + xWantedSize += xHeapStructSize; + + /* Ensure that blocks are always aligned to the required number + * of bytes. */ + if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 ) + { + /* Byte alignment required. */ + xAdditionalRequiredSize = portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ); + + if( heapADD_WILL_OVERFLOW( xWantedSize, xAdditionalRequiredSize ) == 0 ) + { + xWantedSize += xAdditionalRequiredSize; + } + else + { + xWantedSize = 0; + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + xWantedSize = 0; + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + vTaskSuspendAll(); + { + /* If this is the first call to malloc then the heap will require + * initialisation to setup the list of free blocks. */ + if( pxEnd == NULL ) + { + prvHeapInit(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Check the block size we are trying to allocate is not so large that the + * top bit is set. The top bit of the block size member of the BlockLink_t + * structure is used to determine who owns the block - the application or + * the kernel, so it must be free. */ + if( heapBLOCK_SIZE_IS_VALID( xWantedSize ) != 0 ) + { + if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) + { + /* Traverse the list from the start (lowest address) block until + * one of adequate size is found. */ + pxPreviousBlock = &xStart; + pxBlock = heapPROTECT_BLOCK_POINTER( xStart.pxNextFreeBlock ); + heapVALIDATE_BLOCK_POINTER( pxBlock ); + + while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != heapPROTECT_BLOCK_POINTER( NULL ) ) ) + { + pxPreviousBlock = pxBlock; + pxBlock = heapPROTECT_BLOCK_POINTER( pxBlock->pxNextFreeBlock ); + heapVALIDATE_BLOCK_POINTER( pxBlock ); + } + + /* If the end marker was reached then a block of adequate size + * was not found. */ + if( pxBlock != pxEnd ) + { + /* Return the memory space pointed to - jumping over the + * BlockLink_t structure at its start. */ + pvReturn = ( void * ) ( ( ( uint8_t * ) heapPROTECT_BLOCK_POINTER( pxPreviousBlock->pxNextFreeBlock ) ) + xHeapStructSize ); + heapVALIDATE_BLOCK_POINTER( pvReturn ); + + /* This block is being returned for use so must be taken out + * of the list of free blocks. */ + pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; + + /* If the block is larger than required it can be split into + * two. */ + configASSERT( heapSUBTRACT_WILL_UNDERFLOW( pxBlock->xBlockSize, xWantedSize ) == 0 ); + + if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) + { + /* This block is to be split into two. Create a new + * block following the number of bytes requested. The void + * cast is used to prevent byte alignment warnings from the + * compiler. */ + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 ); + + /* Calculate the sizes of two blocks split from the + * single block. */ + pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; + pxBlock->xBlockSize = xWantedSize; + + /* Insert the new block into the list of free blocks. */ + pxNewBlockLink->pxNextFreeBlock = pxPreviousBlock->pxNextFreeBlock; + pxPreviousBlock->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxNewBlockLink ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xFreeBytesRemaining -= pxBlock->xBlockSize; + + if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) + { + xMinimumEverFreeBytesRemaining = xFreeBytesRemaining; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* The block is being returned - it is allocated and owned + * by the application and has no "next" block. */ + heapALLOCATE_BLOCK( pxBlock ); + pxBlock->pxNextFreeBlock = NULL; + xNumberOfSuccessfulAllocations++; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if ( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + vApplicationMallocFailedHook(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* if ( configUSE_MALLOC_FAILED_HOOK == 1 ) */ + + configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 ); + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void * pv ) +{ + uint8_t * puc = ( uint8_t * ) pv; + BlockLink_t * pxLink; + + if( pv != NULL ) + { + /* The memory being freed will have an BlockLink_t structure immediately + * before it. */ + puc -= xHeapStructSize; + + /* This casting is to keep the compiler from issuing warnings. */ + pxLink = ( void * ) puc; + + heapVALIDATE_BLOCK_POINTER( pxLink ); + configASSERT( heapBLOCK_IS_ALLOCATED( pxLink ) != 0 ); + configASSERT( pxLink->pxNextFreeBlock == NULL ); + + if( heapBLOCK_IS_ALLOCATED( pxLink ) != 0 ) + { + if( pxLink->pxNextFreeBlock == NULL ) + { + /* The block is being returned to the heap - it is no longer + * allocated. */ + heapFREE_BLOCK( pxLink ); + #if ( configHEAP_CLEAR_MEMORY_ON_FREE == 1 ) + { + /* Check for underflow as this can occur if xBlockSize is + * overwritten in a heap block. */ + if( heapSUBTRACT_WILL_UNDERFLOW( pxLink->xBlockSize, xHeapStructSize ) == 0 ) + { + ( void ) memset( puc + xHeapStructSize, 0, pxLink->xBlockSize - xHeapStructSize ); + } + } + #endif + + vTaskSuspendAll(); + { + /* Add this block to the list of free blocks. */ + xFreeBytesRemaining += pxLink->xBlockSize; + traceFREE( pv, pxLink->xBlockSize ); + prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); + xNumberOfSuccessfulFrees++; + } + ( void ) xTaskResumeAll(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } +} +/*-----------------------------------------------------------*/ + +size_t xPortGetFreeHeapSize( void ) +{ + return xFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +size_t xPortGetMinimumEverFreeHeapSize( void ) +{ + return xMinimumEverFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +void vPortInitialiseBlocks( void ) +{ + /* This just exists to keep the linker quiet. */ +} +/*-----------------------------------------------------------*/ + +void * pvPortCalloc( size_t xNum, + size_t xSize ) +{ + void * pv = NULL; + + if( heapMULTIPLY_WILL_OVERFLOW( xNum, xSize ) == 0 ) + { + pv = pvPortMalloc( xNum * xSize ); + + if( pv != NULL ) + { + ( void ) memset( pv, 0, xNum * xSize ); + } + } + + return pv; +} +/*-----------------------------------------------------------*/ + +static void prvHeapInit( void ) /* PRIVILEGED_FUNCTION */ +{ + BlockLink_t * pxFirstFreeBlock; + portPOINTER_SIZE_TYPE uxStartAddress, uxEndAddress; + size_t xTotalHeapSize = configTOTAL_HEAP_SIZE; + + /* Ensure the heap starts on a correctly aligned boundary. */ + uxStartAddress = ( portPOINTER_SIZE_TYPE ) ucHeap; + + if( ( uxStartAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) + { + uxStartAddress += ( portBYTE_ALIGNMENT - 1 ); + uxStartAddress &= ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ); + xTotalHeapSize -= ( size_t ) ( uxStartAddress - ( portPOINTER_SIZE_TYPE ) ucHeap ); + } + + #if ( configENABLE_HEAP_PROTECTOR == 1 ) + { + vApplicationGetRandomHeapCanary( &( xHeapCanary ) ); + } + #endif + + /* xStart is used to hold a pointer to the first item in the list of free + * blocks. The void cast is used to prevent compiler warnings. */ + xStart.pxNextFreeBlock = ( void * ) heapPROTECT_BLOCK_POINTER( uxStartAddress ); + xStart.xBlockSize = ( size_t ) 0; + + /* pxEnd is used to mark the end of the list of free blocks and is inserted + * at the end of the heap space. */ + uxEndAddress = uxStartAddress + ( portPOINTER_SIZE_TYPE ) xTotalHeapSize; + uxEndAddress -= ( portPOINTER_SIZE_TYPE ) xHeapStructSize; + uxEndAddress &= ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ); + pxEnd = ( BlockLink_t * ) uxEndAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( NULL ); + + /* To start with there is a single free block that is sized to take up the + * entire heap space, minus the space taken by pxEnd. */ + pxFirstFreeBlock = ( BlockLink_t * ) uxStartAddress; + pxFirstFreeBlock->xBlockSize = ( size_t ) ( uxEndAddress - ( portPOINTER_SIZE_TYPE ) pxFirstFreeBlock ); + pxFirstFreeBlock->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxEnd ); + + /* Only one block exists - and it covers the entire usable heap space. */ + xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; +} +/*-----------------------------------------------------------*/ + +static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) /* PRIVILEGED_FUNCTION */ +{ + BlockLink_t * pxIterator; + uint8_t * puc; + + /* Iterate through the list until a block is found that has a higher address + * than the block being inserted. */ + for( pxIterator = &xStart; heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock ) < pxBlockToInsert; pxIterator = heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock ) ) + { + /* Nothing to do here, just iterate to the right position. */ + } + + if( pxIterator != &xStart ) + { + heapVALIDATE_BLOCK_POINTER( pxIterator ); + } + + /* Do the block being inserted, and the block it is being inserted after + * make a contiguous block of memory? */ + puc = ( uint8_t * ) pxIterator; + + if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) + { + pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; + pxBlockToInsert = pxIterator; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Do the block being inserted, and the block it is being inserted before + * make a contiguous block of memory? */ + puc = ( uint8_t * ) pxBlockToInsert; + + if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock ) ) + { + if( heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock ) != pxEnd ) + { + /* Form one big block from the two blocks. */ + pxBlockToInsert->xBlockSize += heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock )->xBlockSize; + pxBlockToInsert->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock )->pxNextFreeBlock; + } + else + { + pxBlockToInsert->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxEnd ); + } + } + else + { + pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; + } + + /* If the block being inserted plugged a gab, so was merged with the block + * before and the block after, then it's pxNextFreeBlock pointer will have + * already been set, and should not be set here as that would make it point + * to itself. */ + if( pxIterator != pxBlockToInsert ) + { + pxIterator->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxBlockToInsert ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } +} +/*-----------------------------------------------------------*/ + +void vPortGetHeapStats( HeapStats_t * pxHeapStats ) +{ + BlockLink_t * pxBlock; + size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */ + + vTaskSuspendAll(); + { + pxBlock = heapPROTECT_BLOCK_POINTER( xStart.pxNextFreeBlock ); + + /* pxBlock will be NULL if the heap has not been initialised. The heap + * is initialised automatically when the first allocation is made. */ + if( pxBlock != NULL ) + { + while( pxBlock != pxEnd ) + { + /* Increment the number of blocks and record the largest block seen + * so far. */ + xBlocks++; + + if( pxBlock->xBlockSize > xMaxSize ) + { + xMaxSize = pxBlock->xBlockSize; + } + + if( pxBlock->xBlockSize < xMinSize ) + { + xMinSize = pxBlock->xBlockSize; + } + + /* Move to the next block in the chain until the last block is + * reached. */ + pxBlock = heapPROTECT_BLOCK_POINTER( pxBlock->pxNextFreeBlock ); + } + } + } + ( void ) xTaskResumeAll(); + + pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize; + pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize; + pxHeapStats->xNumberOfFreeBlocks = xBlocks; + + taskENTER_CRITICAL(); + { + pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining; + pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations; + pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees; + pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining; + } + taskEXIT_CRITICAL(); +} +/*-----------------------------------------------------------*/ + +/* + * Reset the state in this file. This state is normally initialized at start up. + * This function must be called by the application before restarting the + * scheduler. + */ +void vPortHeapResetState( void ) +{ + pxEnd = NULL; + + xFreeBytesRemaining = ( size_t ) 0U; + xMinimumEverFreeBytesRemaining = ( size_t ) 0U; + xNumberOfSuccessfulAllocations = ( size_t ) 0U; + xNumberOfSuccessfulFrees = ( size_t ) 0U; +} +/*-----------------------------------------------------------*/ diff --git a/freertos/port/MemMang/heap_5.c b/freertos/port/MemMang/heap_5.c new file mode 100644 index 0000000..a88de10 --- /dev/null +++ b/freertos/port/MemMang/heap_5.c @@ -0,0 +1,730 @@ +/* + * FreeRTOS Kernel V11.1.0 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* + * A sample implementation of pvPortMalloc() that allows the heap to be defined + * across multiple non-contiguous blocks and combines (coalescences) adjacent + * memory blocks as they are freed. + * + * See heap_1.c, heap_2.c, heap_3.c and heap_4.c for alternative + * implementations, and the memory management pages of https://www.FreeRTOS.org + * for more information. + * + * Usage notes: + * + * vPortDefineHeapRegions() ***must*** be called before pvPortMalloc(). + * pvPortMalloc() will be called if any task objects (tasks, queues, event + * groups, etc.) are created, therefore vPortDefineHeapRegions() ***must*** be + * called before any other objects are defined. + * + * vPortDefineHeapRegions() takes a single parameter. The parameter is an array + * of HeapRegion_t structures. HeapRegion_t is defined in portable.h as + * + * typedef struct HeapRegion + * { + * uint8_t *pucStartAddress; << Start address of a block of memory that will be part of the heap. + * size_t xSizeInBytes; << Size of the block of memory. + * } HeapRegion_t; + * + * The array is terminated using a NULL zero sized region definition, and the + * memory regions defined in the array ***must*** appear in address order from + * low address to high address. So the following is a valid example of how + * to use the function. + * + * HeapRegion_t xHeapRegions[] = + * { + * { ( uint8_t * ) 0x80000000UL, 0x10000 }, << Defines a block of 0x10000 bytes starting at address 0x80000000 + * { ( uint8_t * ) 0x90000000UL, 0xa0000 }, << Defines a block of 0xa0000 bytes starting at address of 0x90000000 + * { NULL, 0 } << Terminates the array. + * }; + * + * vPortDefineHeapRegions( xHeapRegions ); << Pass the array into vPortDefineHeapRegions(). + * + * Note 0x80000000 is the lower address so appears in the array first. + * + */ +#include +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining + * all the API functions to use the MPU wrappers. That should only be done when + * task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +#ifndef configHEAP_CLEAR_MEMORY_ON_FREE + #define configHEAP_CLEAR_MEMORY_ON_FREE 0 +#endif + +/* Block sizes must not get too small. */ +#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) ) + +/* Assumes 8bit bytes! */ +#define heapBITS_PER_BYTE ( ( size_t ) 8 ) + +/* Max value that fits in a size_t type. */ +#define heapSIZE_MAX ( ~( ( size_t ) 0 ) ) + +/* Check if multiplying a and b will result in overflow. */ +#define heapMULTIPLY_WILL_OVERFLOW( a, b ) ( ( ( a ) > 0 ) && ( ( b ) > ( heapSIZE_MAX / ( a ) ) ) ) + +/* Check if adding a and b will result in overflow. */ +#define heapADD_WILL_OVERFLOW( a, b ) ( ( a ) > ( heapSIZE_MAX - ( b ) ) ) + +/* Check if the subtraction operation ( a - b ) will result in underflow. */ +#define heapSUBTRACT_WILL_UNDERFLOW( a, b ) ( ( a ) < ( b ) ) + +/* MSB of the xBlockSize member of an BlockLink_t structure is used to track + * the allocation status of a block. When MSB of the xBlockSize member of + * an BlockLink_t structure is set then the block belongs to the application. + * When the bit is free the block is still part of the free heap space. */ +#define heapBLOCK_ALLOCATED_BITMASK ( ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ) ) +#define heapBLOCK_SIZE_IS_VALID( xBlockSize ) ( ( ( xBlockSize ) & heapBLOCK_ALLOCATED_BITMASK ) == 0 ) +#define heapBLOCK_IS_ALLOCATED( pxBlock ) ( ( ( pxBlock->xBlockSize ) & heapBLOCK_ALLOCATED_BITMASK ) != 0 ) +#define heapALLOCATE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) |= heapBLOCK_ALLOCATED_BITMASK ) +#define heapFREE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) &= ~heapBLOCK_ALLOCATED_BITMASK ) + +/* Setting configENABLE_HEAP_PROTECTOR to 1 enables heap block pointers + * protection using an application supplied canary value to catch heap + * corruption should a heap buffer overflow occur. + */ +#if ( configENABLE_HEAP_PROTECTOR == 1 ) + +/* Macro to load/store BlockLink_t pointers to memory. By XORing the + * pointers with a random canary value, heap overflows will result + * in randomly unpredictable pointer values which will be caught by + * heapVALIDATE_BLOCK_POINTER assert. */ + #define heapPROTECT_BLOCK_POINTER( pxBlock ) ( ( BlockLink_t * ) ( ( ( portPOINTER_SIZE_TYPE ) ( pxBlock ) ) ^ xHeapCanary ) ) + +/* Assert that a heap block pointer is within the heap bounds. */ + #define heapVALIDATE_BLOCK_POINTER( pxBlock ) \ + configASSERT( ( pucHeapHighAddress != NULL ) && \ + ( pucHeapLowAddress != NULL ) && \ + ( ( uint8_t * ) ( pxBlock ) >= pucHeapLowAddress ) && \ + ( ( uint8_t * ) ( pxBlock ) < pucHeapHighAddress ) ) + +#else /* if ( configENABLE_HEAP_PROTECTOR == 1 ) */ + + #define heapPROTECT_BLOCK_POINTER( pxBlock ) ( pxBlock ) + + #define heapVALIDATE_BLOCK_POINTER( pxBlock ) + +#endif /* configENABLE_HEAP_PROTECTOR */ + +/*-----------------------------------------------------------*/ + +/* Define the linked list structure. This is used to link free blocks in order + * of their memory address. */ +typedef struct A_BLOCK_LINK +{ + struct A_BLOCK_LINK * pxNextFreeBlock; /**< The next free block in the list. */ + size_t xBlockSize; /**< The size of the free block. */ +} BlockLink_t; + +/*-----------------------------------------------------------*/ + +/* + * Inserts a block of memory that is being freed into the correct position in + * the list of free memory blocks. The block being freed will be merged with + * the block in front it and/or the block behind it if the memory blocks are + * adjacent to each other. + */ +static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) PRIVILEGED_FUNCTION; +void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION; + +#if ( configENABLE_HEAP_PROTECTOR == 1 ) + +/** + * @brief Application provided function to get a random value to be used as canary. + * + * @param pxHeapCanary [out] Output parameter to return the canary value. + */ + extern void vApplicationGetRandomHeapCanary( portPOINTER_SIZE_TYPE * pxHeapCanary ); +#endif /* configENABLE_HEAP_PROTECTOR */ + +/*-----------------------------------------------------------*/ + +/* The size of the structure placed at the beginning of each allocated memory + * block must by correctly byte aligned. */ +static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); + +/* Create a couple of list links to mark the start and end of the list. */ +PRIVILEGED_DATA static BlockLink_t xStart; +PRIVILEGED_DATA static BlockLink_t * pxEnd = NULL; + +/* Keeps track of the number of calls to allocate and free memory as well as the + * number of free bytes remaining, but says nothing about fragmentation. */ +PRIVILEGED_DATA static size_t xFreeBytesRemaining = ( size_t ) 0U; +PRIVILEGED_DATA static size_t xMinimumEverFreeBytesRemaining = ( size_t ) 0U; +PRIVILEGED_DATA static size_t xNumberOfSuccessfulAllocations = ( size_t ) 0U; +PRIVILEGED_DATA static size_t xNumberOfSuccessfulFrees = ( size_t ) 0U; + +#if ( configENABLE_HEAP_PROTECTOR == 1 ) + +/* Canary value for protecting internal heap pointers. */ + PRIVILEGED_DATA static portPOINTER_SIZE_TYPE xHeapCanary; + +/* Highest and lowest heap addresses used for heap block bounds checking. */ + PRIVILEGED_DATA static uint8_t * pucHeapHighAddress = NULL; + PRIVILEGED_DATA static uint8_t * pucHeapLowAddress = NULL; + +#endif /* configENABLE_HEAP_PROTECTOR */ + +/*-----------------------------------------------------------*/ + +void * pvPortMalloc( size_t xWantedSize ) +{ + BlockLink_t * pxBlock; + BlockLink_t * pxPreviousBlock; + BlockLink_t * pxNewBlockLink; + void * pvReturn = NULL; + size_t xAdditionalRequiredSize; + + /* The heap must be initialised before the first call to + * pvPortMalloc(). */ + configASSERT( pxEnd ); + + if( xWantedSize > 0 ) + { + /* The wanted size must be increased so it can contain a BlockLink_t + * structure in addition to the requested amount of bytes. */ + if( heapADD_WILL_OVERFLOW( xWantedSize, xHeapStructSize ) == 0 ) + { + xWantedSize += xHeapStructSize; + + /* Ensure that blocks are always aligned to the required number + * of bytes. */ + if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 ) + { + /* Byte alignment required. */ + xAdditionalRequiredSize = portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ); + + if( heapADD_WILL_OVERFLOW( xWantedSize, xAdditionalRequiredSize ) == 0 ) + { + xWantedSize += xAdditionalRequiredSize; + } + else + { + xWantedSize = 0; + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + xWantedSize = 0; + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + vTaskSuspendAll(); + { + /* Check the block size we are trying to allocate is not so large that the + * top bit is set. The top bit of the block size member of the BlockLink_t + * structure is used to determine who owns the block - the application or + * the kernel, so it must be free. */ + if( heapBLOCK_SIZE_IS_VALID( xWantedSize ) != 0 ) + { + if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) + { + /* Traverse the list from the start (lowest address) block until + * one of adequate size is found. */ + pxPreviousBlock = &xStart; + pxBlock = heapPROTECT_BLOCK_POINTER( xStart.pxNextFreeBlock ); + heapVALIDATE_BLOCK_POINTER( pxBlock ); + + while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != heapPROTECT_BLOCK_POINTER( NULL ) ) ) + { + pxPreviousBlock = pxBlock; + pxBlock = heapPROTECT_BLOCK_POINTER( pxBlock->pxNextFreeBlock ); + heapVALIDATE_BLOCK_POINTER( pxBlock ); + } + + /* If the end marker was reached then a block of adequate size + * was not found. */ + if( pxBlock != pxEnd ) + { + /* Return the memory space pointed to - jumping over the + * BlockLink_t structure at its start. */ + pvReturn = ( void * ) ( ( ( uint8_t * ) heapPROTECT_BLOCK_POINTER( pxPreviousBlock->pxNextFreeBlock ) ) + xHeapStructSize ); + heapVALIDATE_BLOCK_POINTER( pvReturn ); + + /* This block is being returned for use so must be taken out + * of the list of free blocks. */ + pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; + + /* If the block is larger than required it can be split into + * two. */ + configASSERT( heapSUBTRACT_WILL_UNDERFLOW( pxBlock->xBlockSize, xWantedSize ) == 0 ); + + if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) + { + /* This block is to be split into two. Create a new + * block following the number of bytes requested. The void + * cast is used to prevent byte alignment warnings from the + * compiler. */ + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 ); + + /* Calculate the sizes of two blocks split from the + * single block. */ + pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; + pxBlock->xBlockSize = xWantedSize; + + /* Insert the new block into the list of free blocks. */ + pxNewBlockLink->pxNextFreeBlock = pxPreviousBlock->pxNextFreeBlock; + pxPreviousBlock->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxNewBlockLink ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xFreeBytesRemaining -= pxBlock->xBlockSize; + + if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) + { + xMinimumEverFreeBytesRemaining = xFreeBytesRemaining; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* The block is being returned - it is allocated and owned + * by the application and has no "next" block. */ + heapALLOCATE_BLOCK( pxBlock ); + pxBlock->pxNextFreeBlock = NULL; + xNumberOfSuccessfulAllocations++; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if ( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + vApplicationMallocFailedHook(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* if ( configUSE_MALLOC_FAILED_HOOK == 1 ) */ + + configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 ); + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void * pv ) +{ + uint8_t * puc = ( uint8_t * ) pv; + BlockLink_t * pxLink; + + if( pv != NULL ) + { + /* The memory being freed will have an BlockLink_t structure immediately + * before it. */ + puc -= xHeapStructSize; + + /* This casting is to keep the compiler from issuing warnings. */ + pxLink = ( void * ) puc; + + heapVALIDATE_BLOCK_POINTER( pxLink ); + configASSERT( heapBLOCK_IS_ALLOCATED( pxLink ) != 0 ); + configASSERT( pxLink->pxNextFreeBlock == NULL ); + + if( heapBLOCK_IS_ALLOCATED( pxLink ) != 0 ) + { + if( pxLink->pxNextFreeBlock == NULL ) + { + /* The block is being returned to the heap - it is no longer + * allocated. */ + heapFREE_BLOCK( pxLink ); + #if ( configHEAP_CLEAR_MEMORY_ON_FREE == 1 ) + { + /* Check for underflow as this can occur if xBlockSize is + * overwritten in a heap block. */ + if( heapSUBTRACT_WILL_UNDERFLOW( pxLink->xBlockSize, xHeapStructSize ) == 0 ) + { + ( void ) memset( puc + xHeapStructSize, 0, pxLink->xBlockSize - xHeapStructSize ); + } + } + #endif + + vTaskSuspendAll(); + { + /* Add this block to the list of free blocks. */ + xFreeBytesRemaining += pxLink->xBlockSize; + traceFREE( pv, pxLink->xBlockSize ); + prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); + xNumberOfSuccessfulFrees++; + } + ( void ) xTaskResumeAll(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } +} +/*-----------------------------------------------------------*/ + +size_t xPortGetFreeHeapSize( void ) +{ + return xFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +size_t xPortGetMinimumEverFreeHeapSize( void ) +{ + return xMinimumEverFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +void * pvPortCalloc( size_t xNum, + size_t xSize ) +{ + void * pv = NULL; + + if( heapMULTIPLY_WILL_OVERFLOW( xNum, xSize ) == 0 ) + { + pv = pvPortMalloc( xNum * xSize ); + + if( pv != NULL ) + { + ( void ) memset( pv, 0, xNum * xSize ); + } + } + + return pv; +} +/*-----------------------------------------------------------*/ + +static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) /* PRIVILEGED_FUNCTION */ +{ + BlockLink_t * pxIterator; + uint8_t * puc; + + /* Iterate through the list until a block is found that has a higher address + * than the block being inserted. */ + for( pxIterator = &xStart; heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock ) < pxBlockToInsert; pxIterator = heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock ) ) + { + /* Nothing to do here, just iterate to the right position. */ + } + + if( pxIterator != &xStart ) + { + heapVALIDATE_BLOCK_POINTER( pxIterator ); + } + + /* Do the block being inserted, and the block it is being inserted after + * make a contiguous block of memory? */ + puc = ( uint8_t * ) pxIterator; + + if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) + { + pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; + pxBlockToInsert = pxIterator; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Do the block being inserted, and the block it is being inserted before + * make a contiguous block of memory? */ + puc = ( uint8_t * ) pxBlockToInsert; + + if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock ) ) + { + if( heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock ) != pxEnd ) + { + /* Form one big block from the two blocks. */ + pxBlockToInsert->xBlockSize += heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock )->xBlockSize; + pxBlockToInsert->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxIterator->pxNextFreeBlock )->pxNextFreeBlock; + } + else + { + pxBlockToInsert->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxEnd ); + } + } + else + { + pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; + } + + /* If the block being inserted plugged a gap, so was merged with the block + * before and the block after, then it's pxNextFreeBlock pointer will have + * already been set, and should not be set here as that would make it point + * to itself. */ + if( pxIterator != pxBlockToInsert ) + { + pxIterator->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxBlockToInsert ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } +} +/*-----------------------------------------------------------*/ + +void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) /* PRIVILEGED_FUNCTION */ +{ + BlockLink_t * pxFirstFreeBlockInRegion = NULL; + BlockLink_t * pxPreviousFreeBlock; + portPOINTER_SIZE_TYPE xAlignedHeap; + size_t xTotalRegionSize, xTotalHeapSize = 0; + BaseType_t xDefinedRegions = 0; + portPOINTER_SIZE_TYPE xAddress; + const HeapRegion_t * pxHeapRegion; + + /* Can only call once! */ + configASSERT( pxEnd == NULL ); + + #if ( configENABLE_HEAP_PROTECTOR == 1 ) + { + vApplicationGetRandomHeapCanary( &( xHeapCanary ) ); + } + #endif + + pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); + + while( pxHeapRegion->xSizeInBytes > 0 ) + { + xTotalRegionSize = pxHeapRegion->xSizeInBytes; + + /* Ensure the heap region starts on a correctly aligned boundary. */ + xAddress = ( portPOINTER_SIZE_TYPE ) pxHeapRegion->pucStartAddress; + + if( ( xAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) + { + xAddress += ( portBYTE_ALIGNMENT - 1 ); + xAddress &= ~( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK; + + /* Adjust the size for the bytes lost to alignment. */ + xTotalRegionSize -= ( size_t ) ( xAddress - ( portPOINTER_SIZE_TYPE ) pxHeapRegion->pucStartAddress ); + } + + xAlignedHeap = xAddress; + + /* Set xStart if it has not already been set. */ + if( xDefinedRegions == 0 ) + { + /* xStart is used to hold a pointer to the first item in the list of + * free blocks. The void cast is used to prevent compiler warnings. */ + xStart.pxNextFreeBlock = ( BlockLink_t * ) heapPROTECT_BLOCK_POINTER( xAlignedHeap ); + xStart.xBlockSize = ( size_t ) 0; + } + else + { + /* Should only get here if one region has already been added to the + * heap. */ + configASSERT( pxEnd != heapPROTECT_BLOCK_POINTER( NULL ) ); + + /* Check blocks are passed in with increasing start addresses. */ + configASSERT( ( size_t ) xAddress > ( size_t ) pxEnd ); + } + + #if ( configENABLE_HEAP_PROTECTOR == 1 ) + { + if( ( pucHeapLowAddress == NULL ) || + ( ( uint8_t * ) xAlignedHeap < pucHeapLowAddress ) ) + { + pucHeapLowAddress = ( uint8_t * ) xAlignedHeap; + } + } + #endif /* configENABLE_HEAP_PROTECTOR */ + + /* Remember the location of the end marker in the previous region, if + * any. */ + pxPreviousFreeBlock = pxEnd; + + /* pxEnd is used to mark the end of the list of free blocks and is + * inserted at the end of the region space. */ + xAddress = xAlignedHeap + ( portPOINTER_SIZE_TYPE ) xTotalRegionSize; + xAddress -= ( portPOINTER_SIZE_TYPE ) xHeapStructSize; + xAddress &= ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ); + pxEnd = ( BlockLink_t * ) xAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( NULL ); + + /* To start with there is a single free block in this region that is + * sized to take up the entire heap region minus the space taken by the + * free block structure. */ + pxFirstFreeBlockInRegion = ( BlockLink_t * ) xAlignedHeap; + pxFirstFreeBlockInRegion->xBlockSize = ( size_t ) ( xAddress - ( portPOINTER_SIZE_TYPE ) pxFirstFreeBlockInRegion ); + pxFirstFreeBlockInRegion->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxEnd ); + + /* If this is not the first region that makes up the entire heap space + * then link the previous region to this region. */ + if( pxPreviousFreeBlock != NULL ) + { + pxPreviousFreeBlock->pxNextFreeBlock = heapPROTECT_BLOCK_POINTER( pxFirstFreeBlockInRegion ); + } + + xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize; + + #if ( configENABLE_HEAP_PROTECTOR == 1 ) + { + if( ( pucHeapHighAddress == NULL ) || + ( ( ( ( uint8_t * ) pxFirstFreeBlockInRegion ) + pxFirstFreeBlockInRegion->xBlockSize ) > pucHeapHighAddress ) ) + { + pucHeapHighAddress = ( ( uint8_t * ) pxFirstFreeBlockInRegion ) + pxFirstFreeBlockInRegion->xBlockSize; + } + } + #endif + + /* Move onto the next HeapRegion_t structure. */ + xDefinedRegions++; + pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); + } + + xMinimumEverFreeBytesRemaining = xTotalHeapSize; + xFreeBytesRemaining = xTotalHeapSize; + + /* Check something was actually defined before it is accessed. */ + configASSERT( xTotalHeapSize ); +} +/*-----------------------------------------------------------*/ + +void vPortGetHeapStats( HeapStats_t * pxHeapStats ) +{ + BlockLink_t * pxBlock; + size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */ + + vTaskSuspendAll(); + { + pxBlock = heapPROTECT_BLOCK_POINTER( xStart.pxNextFreeBlock ); + + /* pxBlock will be NULL if the heap has not been initialised. The heap + * is initialised automatically when the first allocation is made. */ + if( pxBlock != NULL ) + { + while( pxBlock != pxEnd ) + { + /* Increment the number of blocks and record the largest block seen + * so far. */ + xBlocks++; + + if( pxBlock->xBlockSize > xMaxSize ) + { + xMaxSize = pxBlock->xBlockSize; + } + + /* Heap five will have a zero sized block at the end of each + * each region - the block is only used to link to the next + * heap region so it not a real block. */ + if( pxBlock->xBlockSize != 0 ) + { + if( pxBlock->xBlockSize < xMinSize ) + { + xMinSize = pxBlock->xBlockSize; + } + } + + /* Move to the next block in the chain until the last block is + * reached. */ + pxBlock = heapPROTECT_BLOCK_POINTER( pxBlock->pxNextFreeBlock ); + } + } + } + ( void ) xTaskResumeAll(); + + pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize; + pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize; + pxHeapStats->xNumberOfFreeBlocks = xBlocks; + + taskENTER_CRITICAL(); + { + pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining; + pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations; + pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees; + pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining; + } + taskEXIT_CRITICAL(); +} +/*-----------------------------------------------------------*/ + +/* + * Reset the state in this file. This state is normally initialized at start up. + * This function must be called by the application before restarting the + * scheduler. + */ +void vPortHeapResetState( void ) +{ + pxEnd = NULL; + + xFreeBytesRemaining = ( size_t ) 0U; + xMinimumEverFreeBytesRemaining = ( size_t ) 0U; + xNumberOfSuccessfulAllocations = ( size_t ) 0U; + xNumberOfSuccessfulFrees = ( size_t ) 0U; + + #if ( configENABLE_HEAP_PROTECTOR == 1 ) + pucHeapHighAddress = NULL; + pucHeapLowAddress = NULL; + #endif /* #if ( configENABLE_HEAP_PROTECTOR == 1 ) */ +} +/*-----------------------------------------------------------*/ diff --git a/freertos/port/port.c b/freertos/port/port.c new file mode 100644 index 0000000..366d4cd --- /dev/null +++ b/freertos/port/port.c @@ -0,0 +1,793 @@ +/* + * FreeRTOS Kernel V11.1.0 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/*----------------------------------------------------------- +* Implementation of functions defined in portable.h for the ARM CM3 port. +*----------------------------------------------------------*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 + #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ +#endif + +/* Legacy macro for backward compatibility only. This macro used to be used to + * replace the function that configures the clock used to generate the tick + * interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so + * the application writer can override it by simply defining a function of the + * same name (vApplicationSetupTickInterrupt()). */ +#ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION + #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0 +#endif + +/* Constants required to manipulate the core. Registers first... */ +#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) ) +#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) ) +#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) ) +#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) ) +/* ...then bits in the registers. */ +#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL ) +#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL ) +#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL ) +#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL ) +#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL ) +#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL ) +#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL ) + +#define portMIN_INTERRUPT_PRIORITY ( 255UL ) +#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 16UL ) +#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 24UL ) + +/* Constants required to check the validity of an interrupt priority. */ +#define portFIRST_USER_INTERRUPT_NUMBER ( 16 ) +#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 ) +#define portAIRCR_REG ( *( ( volatile uint32_t * ) 0xE000ED0C ) ) +#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff ) +#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 ) +#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 ) +#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL ) +#define portPRIGROUP_SHIFT ( 8UL ) + +/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */ +#define portVECTACTIVE_MASK ( 0xFFUL ) + +/* Constants required to set up the initial stack. */ +#define portINITIAL_XPSR ( 0x01000000 ) + +/* The systick is a 24-bit counter. */ +#define portMAX_24_BIT_NUMBER ( 0xffffffUL ) + +/* A fiddle factor to estimate the number of SysTick counts that would have + * occurred while the SysTick counter is stopped during tickless idle + * calculations. */ +#define portMISSED_COUNTS_FACTOR ( 94UL ) + +/* For strict compliance with the Cortex-M spec the task start address should + * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */ +#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL ) + +/* Let the user override the default SysTick clock rate. If defined by the + * user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the + * configuration register. */ +#ifndef configSYSTICK_CLOCK_HZ + #define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ ) + /* Ensure the SysTick is clocked at the same frequency as the core. */ + #define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT ) +#else + /* Select the option to clock SysTick not at the same frequency as the core. */ + #define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 ) +#endif + +/* + * Setup the timer to generate the tick interrupts. The implementation in this + * file is weak to allow application writers to change the timer used to + * generate the tick interrupt. + */ +void vPortSetupTimerInterrupt( void ); + +/* + * Exception handlers. + */ +void xPortPendSVHandler( void ); +void xPortSysTickHandler( void ); +void vPortSVCHandler( void ); + +/* + * Start first task is a separate function so it can be tested in isolation. + */ +static void prvStartFirstTask( void ); + +/* + * Used to catch tasks that attempt to return from their implementing function. + */ +static void prvTaskExitError( void ); + +/*-----------------------------------------------------------*/ + +/* Each task maintains its own interrupt status in the critical nesting + * variable. */ +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; + +/* + * The number of SysTick increments that make up one tick period. + */ +#if ( configUSE_TICKLESS_IDLE == 1 ) + static uint32_t ulTimerCountsForOneTick = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * The maximum number of tick periods that can be suppressed is limited by the + * 24 bit resolution of the SysTick timer. + */ +#if ( configUSE_TICKLESS_IDLE == 1 ) + static uint32_t xMaximumPossibleSuppressedTicks = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * Compensate for the CPU cycles that pass while the SysTick is stopped (low + * power functionality only. + */ +#if ( configUSE_TICKLESS_IDLE == 1 ) + static uint32_t ulStoppedTimerCompensation = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure + * FreeRTOS API functions are not called from interrupts that have been assigned + * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. + */ +#if ( configASSERT_DEFINED == 1 ) + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; + static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; +#endif /* configASSERT_DEFINED */ + +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + TaskFunction_t pxCode, + void * pvParameters ) +{ + /* Simulate the stack frame as it would be created by a context switch + * interrupt. */ + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ + pxTopOfStack--; + *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */ + + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ + pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +static void prvTaskExitError( void ) +{ + /* A function that implements a task must not exit or attempt to return to + * its caller as there is nothing to return to. If a task wants to exit it + * should instead call vTaskDelete( NULL ). + * + * Artificially force an assert() to be triggered if configASSERT() is + * defined, then stop here so application writers can catch the error. */ + configASSERT( uxCriticalNesting == ~0UL ); + portDISABLE_INTERRUPTS(); + + for( ; ; ) + { + } +} +/*-----------------------------------------------------------*/ + +__asm void vPortSVCHandler( void ) +{ +/* *INDENT-OFF* */ + PRESERVE8 + + ldr r3, = pxCurrentTCB /* Restore the context. */ + ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */ + ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ + ldmia r0 !, { r4 - r11 } /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */ + msr psp, r0 /* Restore the task stack pointer. */ + isb + mov r0, # 0 + msr basepri, r0 + orr r14, # 0xd + bx r14 +/* *INDENT-ON* */ +} +/*-----------------------------------------------------------*/ + +__asm void prvStartFirstTask( void ) +{ +/* *INDENT-OFF* */ + PRESERVE8 + + /* Use the NVIC offset register to locate the stack. */ + ldr r0, =0xE000ED08 + ldr r0, [ r0 ] + ldr r0, [ r0 ] + + /* Set the msp back to the start of the stack. */ + msr msp, r0 + /* Globally enable interrupts. */ + cpsie i + cpsie f + dsb + isb + /* Call SVC to start the first task. */ + svc 0 + nop + nop +/* *INDENT-ON* */ +} +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +BaseType_t xPortStartScheduler( void ) +{ + #if ( configASSERT_DEFINED == 1 ) + { + volatile uint8_t ucOriginalPriority; + volatile uint32_t ulImplementedPrioBits = 0; + volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); + volatile uint8_t ucMaxPriorityValue; + + /* Determine the maximum priority from which ISR safe FreeRTOS API + * functions can be called. ISR safe functions are those that end in + * "FromISR". FreeRTOS maintains separate thread and ISR API functions to + * ensure interrupt entry is as fast and simple as possible. + * + * Save the interrupt priority value that is about to be clobbered. */ + ucOriginalPriority = *pucFirstUserPriorityRegister; + + /* Determine the number of priority bits available. First write to all + * possible bits. */ + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + + /* Read the value back to see how many bits stuck. */ + ucMaxPriorityValue = *pucFirstUserPriorityRegister; + + /* Use the same mask on the maximum system call priority. */ + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + + /* Check that the maximum system call priority is nonzero after + * accounting for the number of priority bits supported by the + * hardware. A priority of 0 is invalid because setting the BASEPRI + * register to 0 unmasks all interrupts, and interrupts with priority 0 + * cannot be masked using BASEPRI. + * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ + configASSERT( ucMaxSysCallPriority ); + + /* Check that the bits not implemented in hardware are zero in + * configMAX_SYSCALL_INTERRUPT_PRIORITY. */ + configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U ); + + /* Calculate the maximum acceptable priority group value for the number + * of bits read back. */ + + while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) + { + ulImplementedPrioBits++; + ucMaxPriorityValue <<= ( uint8_t ) 0x01; + } + + if( ulImplementedPrioBits == 8 ) + { + /* When the hardware implements 8 priority bits, there is no way for + * the software to configure PRIGROUP to not have sub-priorities. As + * a result, the least significant bit is always used for sub-priority + * and there are 128 preemption priorities and 2 sub-priorities. + * + * This may cause some confusion in some cases - for example, if + * configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 5, both 5 and 4 + * priority interrupts will be masked in Critical Sections as those + * are at the same preemption priority. This may appear confusing as + * 4 is higher (numerically lower) priority than + * configMAX_SYSCALL_INTERRUPT_PRIORITY and therefore, should not + * have been masked. Instead, if we set configMAX_SYSCALL_INTERRUPT_PRIORITY + * to 4, this confusion does not happen and the behaviour remains the same. + * + * The following assert ensures that the sub-priority bit in the + * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned + * confusion. */ + configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & 0x1U ) == 0U ); + ulMaxPRIGROUPValue = 0; + } + else + { + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits; + } + + /* Shift the priority group value back to its position within the AIRCR + * register. */ + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + + /* Restore the clobbered interrupt priority register to its original + * value. */ + *pucFirstUserPriorityRegister = ucOriginalPriority; + } + #endif /* configASSERT_DEFINED */ + + /* Make PendSV and SysTick the lowest priority interrupts. */ + portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI; + + portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI; + + /* Start the timer that generates the tick ISR. Interrupts are disabled + * here already. */ + vPortSetupTimerInterrupt(); + + /* Initialise the critical nesting count ready for the first task. */ + uxCriticalNesting = 0; + + /* Start the first task. */ + prvStartFirstTask(); + + /* Should not get here! */ + return 0; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* Not implemented in ports where there is nothing to return to. + * Artificially force an assert. */ + configASSERT( uxCriticalNesting == 1000UL ); +} +/*-----------------------------------------------------------*/ + +void vPortEnterCritical( void ) +{ + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + + /* This is not the interrupt safe version of the enter critical function so + * assert() if it is being called from an interrupt context. Only API + * functions that end in "FromISR" can be used in an interrupt. Only assert if + * the critical nesting count is 1 to protect against recursive calls if the + * assert function also uses a critical section. */ + if( uxCriticalNesting == 1 ) + { + configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); + } +} +/*-----------------------------------------------------------*/ + +void vPortExitCritical( void ) +{ + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } +} +/*-----------------------------------------------------------*/ + +__asm void xPortPendSVHandler( void ) +{ + extern uxCriticalNesting; + extern pxCurrentTCB; + extern vTaskSwitchContext; + +/* *INDENT-OFF* */ + PRESERVE8 + + mrs r0, psp + isb + + ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */ + ldr r2, [ r3 ] + + stmdb r0 !, { r4 - r11 } /* Save the remaining registers. */ + str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */ + + stmdb sp !, { r3, r14 } + mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY + msr basepri, r0 + dsb + isb + bl vTaskSwitchContext + mov r0, #0 + msr basepri, r0 + ldmia sp !, { r3, r14 } + + ldr r1, [ r3 ] + ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ + ldmia r0 !, { r4 - r11 } /* Pop the registers and the critical nesting count. */ + msr psp, r0 + isb + bx r14 + nop +/* *INDENT-ON* */ +} +/*-----------------------------------------------------------*/ + +void xPortSysTickHandler( void ) +{ + /* The SysTick runs at the lowest interrupt priority, so when this interrupt + * executes all interrupts must be unmasked. There is therefore no need to + * save and then restore the interrupt mask value as its value is already + * known - therefore the slightly faster vPortRaiseBASEPRI() function is used + * in place of portSET_INTERRUPT_MASK_FROM_ISR(). */ + vPortRaiseBASEPRI(); + traceISR_ENTER(); + { + /* Increment the RTOS tick. */ + if( xTaskIncrementTick() != pdFALSE ) + { + traceISR_EXIT_TO_SCHEDULER(); + + /* A context switch is required. Context switching is performed in + * the PendSV interrupt. Pend the PendSV interrupt. */ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; + } + else + { + traceISR_EXIT(); + } + } + + vPortClearBASEPRIFromISR(); +} +/*-----------------------------------------------------------*/ + +#if ( configUSE_TICKLESS_IDLE == 1 ) + + __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) + { + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft; + TickType_t xModifiableIdleTime; + + /* Make sure the SysTick reload value does not overflow the counter. */ + if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks ) + { + xExpectedIdleTime = xMaximumPossibleSuppressedTicks; + } + + /* Enter a critical section but don't use the taskENTER_CRITICAL() + * method as that will mask interrupts that should exit sleep mode. */ + __disable_irq(); + __dsb( portSY_FULL_READ_WRITE ); + __isb( portSY_FULL_READ_WRITE ); + + /* If a context switch is pending or a task is waiting for the scheduler + * to be unsuspended then abandon the low power entry. */ + if( eTaskConfirmSleepModeStatus() == eAbortSleep ) + { + /* Re-enable interrupts - see comments above the __disable_irq() + * call above. */ + __enable_irq(); + } + else + { + /* Stop the SysTick momentarily. The time the SysTick is stopped for + * is accounted for as best it can be, but using the tickless mode will + * inevitably result in some tiny drift of the time maintained by the + * kernel with respect to calendar time. */ + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT ); + + /* Use the SysTick current-value register to determine the number of + * SysTick decrements remaining until the next tick interrupt. If the + * current-value register is zero, then there are actually + * ulTimerCountsForOneTick decrements remaining, not zero, because the + * SysTick requests the interrupt when decrementing from 1 to 0. */ + ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG; + + if( ulSysTickDecrementsLeft == 0 ) + { + ulSysTickDecrementsLeft = ulTimerCountsForOneTick; + } + + /* Calculate the reload value required to wait xExpectedIdleTime + * tick periods. -1 is used because this code normally executes part + * way through the first tick period. But if the SysTick IRQ is now + * pending, then clear the IRQ, suppressing the first tick, and correct + * the reload value to reflect that the second tick period is already + * underway. The expected idle time is always at least two ticks. */ + ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + + if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 ) + { + portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT; + ulReloadValue -= ulTimerCountsForOneTick; + } + + if( ulReloadValue > ulStoppedTimerCompensation ) + { + ulReloadValue -= ulStoppedTimerCompensation; + } + + /* Set the new reload value. */ + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + + /* Clear the SysTick count flag and set the count value back to + * zero. */ + portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; + + /* Restart SysTick. */ + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + + /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can + * set its parameter to 0 to indicate that its implementation contains + * its own wait for interrupt or wait for event instruction, and so wfi + * should not be executed again. However, the original expected idle + * time variable must remain unmodified, so a copy is taken. */ + xModifiableIdleTime = xExpectedIdleTime; + configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); + + if( xModifiableIdleTime > 0 ) + { + __dsb( portSY_FULL_READ_WRITE ); + __wfi(); + __isb( portSY_FULL_READ_WRITE ); + } + + configPOST_SLEEP_PROCESSING( xExpectedIdleTime ); + + /* Re-enable interrupts to allow the interrupt that brought the MCU + * out of sleep mode to execute immediately. See comments above + * the __disable_irq() call above. */ + __enable_irq(); + __dsb( portSY_FULL_READ_WRITE ); + __isb( portSY_FULL_READ_WRITE ); + + /* Disable interrupts again because the clock is about to be stopped + * and interrupts that execute while the clock is stopped will increase + * any slippage between the time maintained by the RTOS and calendar + * time. */ + __disable_irq(); + __dsb( portSY_FULL_READ_WRITE ); + __isb( portSY_FULL_READ_WRITE ); + + /* Disable the SysTick clock without reading the + * portNVIC_SYSTICK_CTRL_REG register to ensure the + * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again, + * the time the SysTick is stopped for is accounted for as best it can + * be, but using the tickless mode will inevitably result in some tiny + * drift of the time maintained by the kernel with respect to calendar + * time*/ + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT ); + + /* Determine whether the SysTick has already counted to zero. */ + if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 ) + { + uint32_t ulCalculatedLoadValue; + + /* The tick interrupt ended the sleep (or is now pending), and + * a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG + * with whatever remains of the new tick period. */ + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + + /* Don't allow a tiny value, or values that have somehow + * underflowed because the post sleep hook did something + * that took too long or because the SysTick current-value register + * is zero. */ + if( ( ulCalculatedLoadValue <= ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) ) + { + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ); + } + + portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue; + + /* As the pending tick will be processed as soon as this + * function exits, the tick value maintained by the tick is stepped + * forward by one less than the time spent waiting. */ + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + } + else + { + /* Something other than the tick interrupt ended the sleep. */ + + /* Use the SysTick current-value register to determine the + * number of SysTick decrements remaining until the expected idle + * time would have ended. */ + ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG; + #if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT ) + { + /* If the SysTick is not using the core clock, the current- + * value register might still be zero here. In that case, the + * SysTick didn't load from the reload register, and there are + * ulReloadValue decrements remaining in the expected idle + * time, not zero. */ + if( ulSysTickDecrementsLeft == 0 ) + { + ulSysTickDecrementsLeft = ulReloadValue; + } + } + #endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */ + + /* Work out how long the sleep lasted rounded to complete tick + * periods (not the ulReload value which accounted for part + * ticks). */ + ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft; + + /* How many complete tick periods passed while the processor + * was waiting? */ + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + + /* The reload value is set to whatever fraction of a single tick + * period remains. */ + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + } + + /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again, + * then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If + * the SysTick is not using the core clock, temporarily configure it to + * use the core clock. This configuration forces the SysTick to load + * from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next + * cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready + * to receive the standard value immediately. */ + portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + #if ( portNVIC_SYSTICK_CLK_BIT_CONFIG == portNVIC_SYSTICK_CLK_BIT ) + { + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + } + #else + { + /* The temporary usage of the core clock has served its purpose, + * as described above. Resume usage of the other clock. */ + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT; + + if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 ) + { + /* The partial tick period already ended. Be sure the SysTick + * counts it only once. */ + portNVIC_SYSTICK_CURRENT_VALUE_REG = 0; + } + + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + } + #endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */ + + /* Step the tick to account for any tick periods that elapsed. */ + vTaskStepTick( ulCompleteTickPeriods ); + + /* Exit with interrupts enabled. */ + __enable_irq(); + } + } + +#endif /* #if configUSE_TICKLESS_IDLE */ + +/*-----------------------------------------------------------*/ + +/* + * Setup the SysTick timer to generate the tick interrupts at the required + * frequency. + */ +#if ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 ) + + __weak void vPortSetupTimerInterrupt( void ) + { + /* Calculate the constants required to configure the tick interrupt. */ + #if ( configUSE_TICKLESS_IDLE == 1 ) + { + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + } + #endif /* configUSE_TICKLESS_IDLE */ + + /* Stop and clear the SysTick. */ + portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; + + /* Configure SysTick to interrupt at the requested rate. */ + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + } + +#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */ +/*-----------------------------------------------------------*/ + +__asm uint32_t vPortGetIPSR( void ) +{ +/* *INDENT-OFF* */ + PRESERVE8 + + mrs r0, ipsr + bx r14 +/* *INDENT-ON* */ +} +/*-----------------------------------------------------------*/ + +#if ( configASSERT_DEFINED == 1 ) + + void vPortValidateInterruptPriority( void ) + { + uint32_t ulCurrentInterrupt; + uint8_t ucCurrentPriority; + + /* Obtain the number of the currently executing interrupt. */ + ulCurrentInterrupt = vPortGetIPSR(); + + /* Is the interrupt number a user defined interrupt? */ + if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER ) + { + /* Look up the interrupt's priority. */ + ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ]; + + /* The following assertion will fail if a service routine (ISR) for + * an interrupt that has been assigned a priority above + * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API + * function. ISR safe FreeRTOS API functions must *only* be called + * from interrupts that have been assigned a priority at or below + * configMAX_SYSCALL_INTERRUPT_PRIORITY. + * + * Numerically low interrupt priority numbers represent logically high + * interrupt priorities, therefore the priority of the interrupt must + * be set to a value equal to or numerically *higher* than + * configMAX_SYSCALL_INTERRUPT_PRIORITY. + * + * Interrupts that use the FreeRTOS API must not be left at their + * default priority of zero as that is the highest possible priority, + * which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY, + * and therefore also guaranteed to be invalid. + * + * FreeRTOS maintains separate thread and ISR API functions to ensure + * interrupt entry is as fast and simple as possible. + * + * The following links provide detailed information: + * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html + * https://www.FreeRTOS.org/FAQHelp.html */ + configASSERT( ucCurrentPriority >= ucMaxSysCallPriority ); + } + + /* Priority grouping: The interrupt controller (NVIC) allows the bits + * that define each interrupt's priority to be split between bits that + * define the interrupt's pre-emption priority bits and bits that define + * the interrupt's sub-priority. For simplicity all bits must be defined + * to be pre-emption priority bits. The following assertion will fail if + * this is not the case (if some bits represent a sub-priority). + * + * If the application only uses CMSIS libraries for interrupt + * configuration then the correct setting can be achieved on all Cortex-M + * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the + * scheduler. Note however that some vendor specific peripheral libraries + * assume a non-zero priority group setting, in which cases using a value + * of zero will result in unpredictable behaviour. */ + configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue ); + } + +#endif /* configASSERT_DEFINED */ diff --git a/freertos/port/portmacro.h b/freertos/port/portmacro.h new file mode 100644 index 0000000..9d0d19e --- /dev/null +++ b/freertos/port/portmacro.h @@ -0,0 +1,280 @@ +/* + * FreeRTOS Kernel V11.1.0 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE uint32_t +#define portBASE_TYPE long + +typedef portSTACK_TYPE StackType_t; +typedef long BaseType_t; +typedef unsigned long UBaseType_t; + +#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) + typedef uint16_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffff +#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) + typedef uint32_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL + +/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do + * not need to be guarded with a critical section. */ + #define portTICK_TYPE_IS_ATOMIC 1 +#else + #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. +#endif +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#define portBYTE_ALIGNMENT 8 + +/* Constants used with memory barrier intrinsics. */ +#define portSY_FULL_READ_WRITE ( 15 ) + +/*-----------------------------------------------------------*/ + +/* Scheduler utilities. */ +#define portYIELD() \ + { \ + /* Set a PendSV to request a context switch. */ \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + \ + /* Barriers are normally not required but do ensure the code is completely \ + * within the specified behaviour for the architecture. */ \ + __dsb( portSY_FULL_READ_WRITE ); \ + __isb( portSY_FULL_READ_WRITE ); \ + } +/*-----------------------------------------------------------*/ + +#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) +#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +/*-----------------------------------------------------------*/ + +/* Critical section management. */ +extern void vPortEnterCritical( void ); +extern void vPortExitCritical( void ); + +#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI() +#define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 ) +#define portENTER_CRITICAL() vPortEnterCritical() +#define portEXIT_CRITICAL() vPortExitCritical() +#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x ) + +/*-----------------------------------------------------------*/ + +/* Tickless idle/low power functionality. */ +#ifndef portSUPPRESS_TICKS_AND_SLEEP + extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); + #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) +#endif +/*-----------------------------------------------------------*/ + +/* Port specific optimisations. */ +#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION + #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 +#endif + +#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 + +/* Check the configuration. */ + #if ( configMAX_PRIORITIES > 32 ) + #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. + #endif + +/* Store/clear the ready priorities in a bit map. */ + #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) + #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) + +/*-----------------------------------------------------------*/ + + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) + +#endif /* taskRECORD_READY_PRIORITY */ +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. These are + * not necessary for to use this port. They are defined so the common demo files + * (which build with all the ports) will build. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) +/*-----------------------------------------------------------*/ + +#ifdef configASSERT + void vPortValidateInterruptPriority( void ); + #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() +#endif + +/* portNOP() is not required by this port. */ +#define portNOP() + +#define portINLINE __inline + +#ifndef portFORCE_INLINE + #define portFORCE_INLINE __forceinline +#endif + +/*-----------------------------------------------------------*/ + +static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI ) +{ + __asm + { + /* Barrier instructions are not used as this function is only used to + * lower the BASEPRI value. */ +/* *INDENT-OFF* */ + msr basepri, ulBASEPRI +/* *INDENT-ON* */ + } +} +/*-----------------------------------------------------------*/ + +static portFORCE_INLINE void vPortRaiseBASEPRI( void ) +{ + uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY; + + __asm + { + /* Set BASEPRI to the max syscall priority to effect a critical + * section. */ +/* *INDENT-OFF* */ + msr basepri, ulNewBASEPRI + dsb + isb +/* *INDENT-ON* */ + } +} +/*-----------------------------------------------------------*/ + +static portFORCE_INLINE void vPortClearBASEPRIFromISR( void ) +{ + __asm + { + /* Set BASEPRI to 0 so no interrupts are masked. This function is only + * used to lower the mask in an interrupt, so memory barriers are not + * used. */ +/* *INDENT-OFF* */ + msr basepri, # 0 +/* *INDENT-ON* */ + } +} +/*-----------------------------------------------------------*/ + +static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void ) +{ + uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY; + + __asm + { + /* Set BASEPRI to the max syscall priority to effect a critical + * section. */ +/* *INDENT-OFF* */ + mrs ulReturn, basepri + msr basepri, ulNewBASEPRI + dsb + isb +/* *INDENT-ON* */ + } + + return ulReturn; +} +/*-----------------------------------------------------------*/ + +static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void ) +{ + uint32_t ulCurrentInterrupt; + BaseType_t xReturn; + + /* Obtain the number of the currently executing interrupt. */ + __asm + { +/* *INDENT-OFF* */ + mrs ulCurrentInterrupt, ipsr +/* *INDENT-ON* */ + } + + if( ulCurrentInterrupt == 0 ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + return xReturn; +} + + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* PORTMACRO_H */ diff --git a/freertos/portable/CMakeLists.txt b/freertos/portable/CMakeLists.txt deleted file mode 100644 index af9321e..0000000 --- a/freertos/portable/CMakeLists.txt +++ /dev/null @@ -1,1110 +0,0 @@ -if( FREERTOS_PORT STREQUAL "GCC_RISC_V_GENERIC" ) - include( GCC/RISC-V/chip_extensions.cmake ) -endif() - -if( FREERTOS_PORT STREQUAL "IAR_RISC_V_GENERIC" ) - include( IAR/RISC-V/chip_extensions.cmake ) -endif() - -# FreeRTOS internal cmake file. Do not use it in user top-level project - -if (FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") - message(STATUS "Using a custom FREERTOS_PORT.") - return() -endif() - -# FreeRTOS internal cmake file. Do not use it in user top-level project - -add_library(freertos_kernel_port OBJECT - # TEMPLATE Port - $<$: - template/port.c> - - # 16-Bit DOS ports for BCC - $<$: - BCC/16BitDOS/common/portcomn.c - BCC/16BitDOS/Flsh186/port.c> - - $<$: - BCC/16BitDOS/common/portcomn.c - BCC/16BitDOS/PC/port.c> - - # ARMv7-M port for Texas Instruments Code Composer Studio - $<$: - CCS/ARM_CM3/port.c - CCS/ARM_CM3/portasm.asm> - - # ARMv7E-M port for Texas Instruments Code Composer Studio - $<$: - CCS/ARM_CM4F/port.c - CCS/ARM_CM4F/portasm.asm> - - # ARMv7-R port for Texas Instruments Code Composer Studio - $<$: - CCS/ARM_Cortex-R4/port.c - CCS/ARM_Cortex-R4/portASM.asm> - - # Texas Instruments MSP430 port for Texas Instruments Code Composer Studio - $<$: - CCS/MSP430X/port.c - CCS/MSP430X/portext.asm> - - # NXP (formerly Motorola, Freescale) Cold Fire and 68HCS12 ports for Code Warrior - $<$: - CodeWarrior/ColdFire_V1/port.c - CodeWarrior/ColdFire_V1/portasm.S> - - $<$: - CodeWarrior/ColdFire_V2/port.c - CodeWarrior/ColdFire_V2/portasm.S> - - $<$: - CodeWarrior/HCS12/port.c> - - # ARMv7-A port for GCC - $<$: - GCC/ARM_CA9/port.c - GCC/ARM_CA9/portASM.S> - - # ARMv8-A ports for GCC - $<$: - GCC/ARM_AARCH64/port.c - GCC/ARM_AARCH64/portASM.S> - - $<$: - GCC/ARM_AARCH64_SRE/port.c - GCC/ARM_AARCH64_SRE/portASM.S> - - # ARMv6-M port for GCC - $<$: - GCC/ARM_CM0/port.c> - - # ARMv6-M / Cortex-M0 Raspberry PI RP2040 port for GCC - $<$: - ThirdParty/GCC/RP2040/port.c> - - # ARMv7-M ports for GCC - $<$: - GCC/ARM_CM3/port.c> - - $<$: - GCC/ARM_CM3_MPU/port.c - GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c> - - # ARMv7E-M ports for GCC - $<$: - GCC/ARM_CM4_MPU/port.c - GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM4F/port.c> - - $<$: - GCC/ARM_CM7/r0p1/port.c> - - # ARMv8-M ports for GCC - $<$: - GCC/ARM_CM23/non_secure/port.c - GCC/ARM_CM23/non_secure/portasm.c - GCC/ARM_CM23/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM23/secure/secure_context_port.c - GCC/ARM_CM23/secure/secure_context.c - GCC/ARM_CM23/secure/secure_heap.c - GCC/ARM_CM23/secure/secure_init.c> - - $<$: - GCC/ARM_CM23_NTZ/non_secure/port.c - GCC/ARM_CM23_NTZ/non_secure/portasm.c - GCC/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM33/non_secure/port.c - GCC/ARM_CM33/non_secure/portasm.c - GCC/ARM_CM33/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM33/secure/secure_context_port.c - GCC/ARM_CM33/secure/secure_context.c - GCC/ARM_CM33/secure/secure_heap.c - GCC/ARM_CM33/secure/secure_init.c> - - $<$: - GCC/ARM_CM33_NTZ/non_secure/port.c - GCC/ARM_CM33_NTZ/non_secure/portasm.c - GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM33_NTZ/non_secure/port.c - GCC/ARM_CM33_NTZ/non_secure/portasm.c - GCC/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.c - ThirdParty/GCC/ARM_TFM/os_wrapper_freertos.c> - - $<$: - GCC/ARM_CM35P/non_secure/port.c - GCC/ARM_CM35P/non_secure/portasm.c - GCC/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM35P/secure/secure_context_port.c - GCC/ARM_CM35P/secure/secure_context.c - GCC/ARM_CM35P/secure/secure_heap.c - GCC/ARM_CM35P/secure/secure_init.c> - - $<$: - GCC/ARM_CM35P_NTZ/non_secure/port.c - GCC/ARM_CM35P_NTZ/non_secure/portasm.c - GCC/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.c> - - # ARMv8.1-M ports for GCC - $<$: - GCC/ARM_CM55/non_secure/port.c - GCC/ARM_CM55/non_secure/portasm.c - GCC/ARM_CM55/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM55/secure/secure_context_port.c - GCC/ARM_CM55/secure/secure_context.c - GCC/ARM_CM55/secure/secure_heap.c - GCC/ARM_CM55/secure/secure_init.c> - - $<$: - GCC/ARM_CM55_NTZ/non_secure/port.c - GCC/ARM_CM55_NTZ/non_secure/portasm.c - GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM55_NTZ/non_secure/port.c - GCC/ARM_CM55_NTZ/non_secure/portasm.c - GCC/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.c - ThirdParty/GCC/ARM_TFM/os_wrapper_freertos.c> - - $<$: - GCC/ARM_CM85/non_secure/port.c - GCC/ARM_CM85/non_secure/portasm.c - GCC/ARM_CM85/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM85/secure/secure_context_port.c - GCC/ARM_CM85/secure/secure_context.c - GCC/ARM_CM85/secure/secure_heap.c - GCC/ARM_CM85/secure/secure_init.c> - - $<$: - GCC/ARM_CM85_NTZ/non_secure/port.c - GCC/ARM_CM85_NTZ/non_secure/portasm.c - GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c> - - $<$: - GCC/ARM_CM85_NTZ/non_secure/port.c - GCC/ARM_CM85_NTZ/non_secure/portasm.c - GCC/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.c - ThirdParty/GCC/ARM_TFM/os_wrapper_freertos.c> - - # ARMv7-R ports for GCC - $<$: - GCC/ARM_CR5/port.c - GCC/ARM_CR5/portASM.S> - - $<$: - GCC/ARM_CRx_MPU/port.c - GCC/ARM_CRx_MPU/portASM.S - GCC/ARM_CRx_MPU/mpu_wrappers_v2_asm.S> - - $<$: - GCC/ARM_CRx_No_GIC/port.c - GCC/ARM_CRx_No_GIC/portASM.S> - - # ARMv4T ARM7TDMI ports for GCC - $<$: - GCC/ARM7_AT91FR40008/port.c - GCC/ARM7_AT91FR40008/portISR.c> - - $<$: - GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.c - GCC/ARM7_AT91SAM7S/port.c - GCC/ARM7_AT91SAM7S/portISR.c> - - $<$: - GCC/ARM7_LPC2000/port.c - GCC/ARM7_LPC2000/portISR.c> - - $<$: - GCC/ARM7_LPC23xx/port.c - GCC/ARM7_LPC23xx/portISR.c> - - $<$: - GCC/STR75x/port.c - GCC/STR75x/portISR.c> - - # Microchip (formerly Ateml) AVR8 ports for GCC - $<$: - GCC/ATMega323/port.c> - - $<$: - ThirdParty/GCC/ATmega/port.c> - - $<$: - ThirdParty/Partner-Supported-Ports/GCC/AVR_AVRDx/port.c> - - $<$: - ThirdParty/Partner-Supported-Ports/GCC/AVR_Mega0/port.c> - - # Microchip (formerly Ateml) AVR32 port for GCC - $<$: - GCC/AVR32_UC3/exception.S - GCC/AVR32_UC3/port.c> - - # NXP (formerly Motorola, Freescale) Cold Fire and 68HCS12 ports for GCC - $<$: - GCC/ColdFire_V2/port.c - GCC/ColdFire_V2/portasm.S> - - $<$: - GCC/HCS12/port.c> - - # Cortus APS3 soft core port for GCC - $<$: - GCC/CORTUS_APS3/port.c> - - # Renesas (formerly Hitach) H8S port for GCC - $<$: - GCC/H8S2329/port.c> - - # x86 / IA32 flat memory model port for GCC - $<$: - GCC/IA32_flat/port.c - GCC/IA32_flat/portASM.S> - - # Xilinx MicroBlaze soft core ports for GCC - $<$: - GCC/MicroBlaze/port.c - GCC/MicroBlaze/portasm.s> - - $<$: - GCC/MicroBlazeV8/port.c - GCC/MicroBlazeV8/port_exceptions.c - GCC/MicroBlazeV8/portasm.S> - - $<$: - GCC/MicroBlazeV9/port.c - GCC/MicroBlazeV9/port_exceptions.c - GCC/MicroBlazeV9/portasm.S> - - # Xilinx PCC4XX soft core ports for GCC - $<$: - GCC/PPC405_Xilinx/port.c - GCC/PPC405_Xilinx/portasm.S> - - $<$: - GCC/PPC440_Xilinx/port.c - GCC/PPC440_Xilinx/portasm.S> - - # Texas Instruments MSP430 port for GCC - $<$: - GCC/MSP430F449/port.c> - - # Intel (formerly Altera) NIOS II soft core port for GCC - $<$: - GCC/NiosII/port.c - GCC/NiosII/port_asm.S> - - # RISC-V architecture ports for GCC - $<$: - GCC/RISC-V/port.c - GCC/RISC-V/portASM.S> - - $<$: - GCC/RISC-V/port.c - GCC/RISC-V/portASM.S> - - $<$: - GCC/RISC-V/port.c - GCC/RISC-V/portASM.S> - - # Renesas RL78 port for GCC - $<$: - GCC/RL78/port.c - GCC/RL78/portasm.S> - - # Renesas RX architecture ports for GCC - $<$: - GCC/RX100/port.c> - - $<$: - GCC/RX200/port.c> - - $<$: - GCC/RX600/port.c> - - $<$: - GCC/RX600v2/port.c> - - $<$: - GCC/RX700v3_DPFPU/port.c> - - # Infineon TriCore 1782 port for GCC - $<$: - GCC/TriCore_1782/port.c - GCC/TriCore_1782/porttrap.c> - - # Synopsys ARC architecture ports for GCC - $<$: - ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c - ThirdParty/GCC/ARC_EM_HS/arc_support.s - ThirdParty/GCC/ARC_EM_HS/freertos_tls.c - ThirdParty/GCC/ARC_EM_HS/port.c> - - $<$: - ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c - ThirdParty/GCC/ARC_v1/arc_support.s - ThirdParty/GCC/ARC_v1/port.c> - - # Posix Simulator port for GCC - $<$: - ThirdParty/GCC/Posix/port.c - ThirdParty/GCC/Posix/utils/wait_for_event.c> - - # Xtensa LX / Espressif ESP32 port for GCC - $<$: - ThirdParty/GCC/Xtensa_ESP32/FreeRTOS-openocd.c - ThirdParty/GCC/Xtensa_ESP32/port.c - ThirdParty/GCC/Xtensa_ESP32/portasm.S - ThirdParty/GCC/Xtensa_ESP32/xtensa_context.S - ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c - ThirdParty/GCC/Xtensa_ESP32/xtensa_intr_asm.S - ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c - ThirdParty/GCC/Xtensa_ESP32/xtensa_loadstore_handler.S - ThirdParty/GCC/Xtensa_ESP32/xtensa_overlay_os_hook.c - ThirdParty/GCC/Xtensa_ESP32/xtensa_vector_defaults.S - ThirdParty/GCC/Xtensa_ESP32/xtensa_vectors.S> - - # Renesas (formerly NEC) 78K port for IAR EW78K - $<$: - IAR/78K0R/port.c - IAR/78K0R/portasm.s26> - - # ARMv7-A ports for IAR EWARM - $<$: - IAR/ARM_CA5_No_GIC/port.c - IAR/ARM_CA5_No_GIC/portASM.s> - - $<$: - IAR/ARM_CA9/port.c - IAR/ARM_CA9/portASM.s> - - # ARMv6-M port for IAR EWARM - $<$: - IAR/ARM_CM0/port.c - IAR/ARM_CM0/portasm.s> - - # ARMv7-M port for IAR EWARM - $<$: - IAR/ARM_CM3/port.c - IAR/ARM_CM3/portasm.s> - - # ARMv7E-M ports for IAR EWARM - $<$: - IAR/ARM_CM4F/port.c - IAR/ARM_CM4F/portasm.s> - - $<$: - IAR/ARM_CM4F_MPU/port.c - IAR/ARM_CM4F_MPU/portasm.s - IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM7/r0p1/port.c - IAR/ARM_CM7/r0p1/portasm.s> - - # ARMv8-M Ports for IAR EWARM - $<$: - IAR/ARM_CM23/non_secure/port.c - IAR/ARM_CM23/non_secure/portasm.s - IAR/ARM_CM23/non_secure/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM23/secure/secure_context_port_asm.s - IAR/ARM_CM23/secure/secure_context.c - IAR/ARM_CM23/secure/secure_heap.c - IAR/ARM_CM23/secure/secure_init.c> - - $<$: - IAR/ARM_CM23_NTZ/non_secure/port.c - IAR/ARM_CM23_NTZ/non_secure/portasm.s - IAR/ARM_CM23_NTZ/non_secure/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM33/non_secure/port.c - IAR/ARM_CM33/non_secure/portasm.s - IAR/ARM_CM33/non_secure/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM33/secure/secure_context_port_asm.s - IAR/ARM_CM33/secure/secure_context.c - IAR/ARM_CM33/secure/secure_heap.c - IAR/ARM_CM33/secure/secure_init.c> - - $<$: - IAR/ARM_CM33_NTZ/non_secure/port.c - IAR/ARM_CM33_NTZ/non_secure/portasm.s - IAR/ARM_CM33_NTZ/non_secure/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM35P/non_secure/port.c - IAR/ARM_CM35P/non_secure/portasm.s - IAR/ARM_CM35P/non_secure/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM35P/secure/secure_context_port_asm.s - IAR/ARM_CM35P/secure/secure_context.c - IAR/ARM_CM35P/secure/secure_heap.c - IAR/ARM_CM35P/secure/secure_init.c> - - $<$: - IAR/ARM_CM35P_NTZ/non_secure/port.c - IAR/ARM_CM35P_NTZ/non_secure/portasm.s - IAR/ARM_CM35P_NTZ/non_secure/mpu_wrappers_v2_asm.S> - - # ARMv8.1-M ports for IAR EWARM - $<$: - IAR/ARM_CM55/non_secure/port.c - IAR/ARM_CM55/non_secure/portasm.s - IAR/ARM_CM55/non_secure/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM55/secure/secure_context_port_asm.s - IAR/ARM_CM55/secure/secure_context.c - IAR/ARM_CM55/secure/secure_heap.c - IAR/ARM_CM55/secure/secure_init.c> - - $<$: - IAR/ARM_CM55_NTZ/non_secure/port.c - IAR/ARM_CM55_NTZ/non_secure/portasm.s - IAR/ARM_CM55_NTZ/non_secure/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM85/non_secure/port.c - IAR/ARM_CM85/non_secure/portasm.s - IAR/ARM_CM85/non_secure/mpu_wrappers_v2_asm.S> - - $<$: - IAR/ARM_CM85/secure/secure_context_port_asm.s - IAR/ARM_CM85/secure/secure_context.c - IAR/ARM_CM85/secure/secure_heap.c - IAR/ARM_CM85/secure/secure_init.c> - - $<$: - IAR/ARM_CM85_NTZ/non_secure/port.c - IAR/ARM_CM85_NTZ/non_secure/portasm.s - IAR/ARM_CM85_NTZ/non_secure/mpu_wrappers_v2_asm.S> - - # ARMv7-R Ports for IAR EWARM - $<$: - IAR/ARM_CRx_No_GIC/port.c - IAR/ARM_CRx_No_GIC/portASM.s> - - # Microchip (formerly Atmel) AVR8 ports for IAR EWAVR - $<$: - IAR/ATMega323/port.c - IAR/ATMega323/portmacro.s90> - - $<$: - IAR/AVR_AVRDx/port.c - IAR/AVR_AVRDx/portmacro.s90> - - $<$: - IAR/AVR_Mega0/port.c - IAR/AVR_Mega0/portmacro.s90> - - # Microchip (formerly Atmel) AVR32 port for IAR Embedded Workbench for AVR32 - $<$: - IAR/AVR32_UC3/exception.s82 - IAR/AVR32_UC3/port.c - IAR/AVR32_UC3/read.c - IAR/AVR32_UC3/write.c> - - # Texas Instruments MSP430 ports for IAR Embedded Workbench for MSP430 - $<$: - IAR/MSP430/port.c - IAR/MSP430/portext.s43> - - $<$: - IAR/MSP430X/port.c - IAR/MSP430X/portext.s43> - - # RISC-V architecture port for IAR Embedded Workbench for RISC-V - $<$: - IAR/RISC-V/port.c - IAR/RISC-V/portASM.s> - - $<$: - IAR/RISC-V/port.c - IAR/RISC-V/portASM.s> - - # Renesas RL78 port for IAR EWRL78 - $<$: - IAR/RL78/port.c - IAR/RL78/portasm.s87> - - # Renesas RX architecture ports for IAR EWRX - $<$: - IAR/RX100/port.c - IAR/RX100/port_asm.s> - - $<$: - IAR/RX600/port.c - IAR/RX600/port_asm.s> - - $<$: - IAR/RX700v3_DPFPU/port.c> - - $<$: - IAR/RXv2/port.c - IAR/RXv2/port_asm.s> - - # Renesas (formerly NEC) V850ES port for IAR EWV850 - $<$: - IAR/V850ES/port.c - IAR/V850ES/portasm_Fx3.s85> - - $<$: - IAR/V850ES/port.c - IAR/V850ES/portasm_Hx2.s85> - - # ARMv4T ARM7TDMI ports for IAR Embedded Workbench for ARM - $<$: - IAR/STR71x/port.c - IAR/STR71x/portasm.s79> - - $<$: - IAR/STR75x/port.c - IAR/STR75x/portasm.s79> - - $<$: - IAR/LPC2000/port.c - IAR/LPC2000/portasm.s79> - - $<$: - IAR/AtmelSAM7S64/port.c - IAR/AtmelSAM7S64/portasm.s79> - - # ARMv5TE ARM926 ports for IAR Embedded Workbench for ARM - $<$: - IAR/STR91x/port.c - IAR/STR91x/portasm.s79> - - $<$: - IAR/AtmelSAM9XE/port.c - IAR/AtmelSAM9XE/portasm.s79> - - # ARM Cortex-M4F port for the MikroElektronika MikroC compiler - $<$: - MikroC/ARM_CM4F/port.c> - - # Microchip PIC18 8-bit MCU port for MPLAB XC8 - $<$: - MPLAB/PIC18F/port.c> - - # Microchip PIC24 16-bit MCU port for MPLAB XC16 - $<$: - MPLAB/PIC24_dsPIC/port.c - MPLAB/PIC24_dsPIC/portasm_PIC24.S> # TODO: What to do with portasm_dsPIC.S ? - - # Microchip MIPS 32-Bit MCU ports for MPLAB XC32 - $<$: - MPLAB/PIC32MEC14xx/port.c - MPLAB/PIC32MEC14xx/port_asm.S> - - $<$: - MPLAB/PIC32MX/port.c - MPLAB/PIC32MX/port_asm.S> - - $<$: - MPLAB/PIC32MZ/port.c - MPLAB/PIC32MZ/port_asm.S> - - # Windows Simulator for Microsoft Visual C Compiler and MinGW GCC - $<$: - MSVC-MingW/port.c> - - # 16 bit DOS ports for Open Watcom - $<$: - oWatcom/16BitDOS/common/portcomn.c - oWatcom/16BitDOS/Flsh186/port.c> - - $<$: - oWatcom/16BitDOS/common/portcomn.c - oWatcom/16BitDOS/PC/port.c> - - $<$: - Paradigm/Tern_EE/large_untested/port.c> - - $<$: - Paradigm/Tern_EE/small/port.c> - - # Renesas RX mcu ports for Renesas CC-RX - $<$: - Renesas/RX100/port.c - Renesas/RX100/port_asm.src> - - $<$: - Renesas/RX200/port.c - Renesas/RX200/port_asm.src> - - $<$: - Renesas/RX600/port.c - Renesas/RX600/port_asm.src> - - $<$: - Renesas/RX600v2/port.c - Renesas/RX600v2/port_asm.src> - - $<$: - Renesas/RX700v3_DPFPU/port.c - Renesas/RX700v3_DPFPU/port_asm.src> - - # Renesas (formerly Hitach) SHA2 SuperH port for the Renesas SH C Compiler - $<$: - Renesas/SH2A_FPU/port.c - Renesas/SH2A_FPU/portasm.src> - - # Texas Instruments MSP430 port for Rowley CrossWorks - $<$: - Rowley/MSP430F449/port.c - Rowley/MSP430F449/portext.asm> - - # ARMv7-A Cortex-A9 port for ARM RVDS / armcc - $<$: - RVDS/ARM_CA9/port.c - RVDS/ARM_CA9/portASM.s> - - # ARMv6-M port for ARM RVDS / armcc - $<$: - RVDS/ARM_CM0/port.c> - - # ARMv7-M port for ARM RVDS / armcc - $<$: - RVDS/ARM_CM3/port.c> - - # ARMv7E-M ports for ARM RVDS / armcc - $<$: - RVDS/ARM_CM4_MPU/port.c - RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c> - - $<$: - RVDS/ARM_CM4F/port.c> - - $<$: - RVDS/ARM_CM7/r0p1/port.c> - - # ARMv4T / ARM7TDMI LPC21XX port for ARM RVDS / armcc - $<$: - RVDS/ARM7_LPC21xx/port.c - RVDS/ARM7_LPC21xx/portASM.s> - - # Cygnal c8051 port for SDCC (Small Device C Compiler) - $<$: - SDCC/Cygnal/port.c> - - # Infineon (formerly Fujitsu, Spansion, Cypress) MB9x ports for Softune C Compiler - $<$: - Softune/MB91460/__STD_LIB_sbrk.c - Softune/MB91460/port.c> - - $<$: - Softune/MB96340/__STD_LIB_sbrk.c - Softune/MB96340/port.c> - - # ARMv7E-M (Cortex-M4F) port for TASKING VX-toolset for ARM - $<$: - Tasking/ARM_CM4F/port.c - Tasking/ARM_CM4F/port_asm.asm> - - # Port for C-SKY T-HEAD CK802 - $<$: - ThirdParty/CDK/T-HEAD_CK802/port.c - ThirdParty/CDK/T-HEAD_CK802/portasm.S> - - # Tensilica Xtensa port for XCC - $<$: - ThirdParty/XCC/Xtensa/port.c - ThirdParty/XCC/Xtensa/portasm.S - ThirdParty/XCC/Xtensa/portclib.c - ThirdParty/XCC/Xtensa/xtensa_context.S - ThirdParty/XCC/Xtensa/xtensa_init.c - ThirdParty/XCC/Xtensa/xtensa_intr_asm.S - ThirdParty/XCC/Xtensa/xtensa_intr.c - ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c - ThirdParty/XCC/Xtensa/xtensa_vectors.S> - - # Microchip PIC18 port for WIZ-C - $<$: - WizC/PIC18/port.c - WizC/PIC18/Drivers/Tick/isrTick.c - WizC/PIC18/Drivers/Tick/Tick.c> -) - -if( FREERTOS_PORT MATCHES "GCC_ARM_CM(3|4)_MPU" OR - FREERTOS_PORT STREQUAL "IAR_ARM_CM4F_MPU" OR - FREERTOS_PORT STREQUAL "RVDS_ARM_CM4_MPU" OR - FREERTOS_PORT MATCHES "GCC_ARM_CM(23|33|55|85)_NTZ_NONSECURE" OR - FREERTOS_PORT MATCHES "GCC_ARM_CM(23|33|55|85)_NONSECURE" OR - FREERTOS_PORT MATCHES "GCC_ARM_CM(33|55|85)_TFM" OR - FREERTOS_PORT MATCHES "IAR_ARM_CM(23|33|55|85)_NTZ_NONSECURE" OR - FREERTOS_PORT MATCHES "IAR_ARM_CM(23|33|55|85)_NONSECURE" -) - target_sources(freertos_kernel_port PRIVATE - Common/mpu_wrappers.c - Common/mpu_wrappers_v2.c - ) -endif() -add_library(freertos_kernel_port_headers INTERFACE) - -target_include_directories(freertos_kernel_port_headers INTERFACE - # TEMPLATE Port - $<$:${CMAKE_CURRENT_LIST_DIR}/template> - - # 16-Bit DOS ports for BCC - $<$: - ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/common - ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/Flsh186> - - $<$: - ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/common - ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/PC> - - # ARMv7-M port for Texas Instruments Code Composer Studio - $<$:${CMAKE_CURRENT_LIST_DIR}/CCS/ARM_CM3> - - # ARMv7E-M port for Texas Instruments Code Composer Studio - $<$:${CMAKE_CURRENT_LIST_DIR}/CCS/ARM_CM4F> - - # ARMv7-R port for Texas Instruments Code Composer Studio - $<$:${CMAKE_CURRENT_LIST_DIR}/CCS/ARM_Cortex-R4> - - # Texas Instruments MSP430 port for Texas Instruments Code Composer Studio - $<$:${CMAKE_CURRENT_LIST_DIR}/CCS/MSP430X> - - # NXP (formerly Motorola, Freescale) Cold Fire and 68HCS12 ports for Code Warrior - $<$:${CMAKE_CURRENT_LIST_DIR}/CodeWarrior/ColdFire_V1> - $<$:${CMAKE_CURRENT_LIST_DIR}/CodeWarrior/ColdFire_V2> - $<$:${CMAKE_CURRENT_LIST_DIR}/CodeWarrior/HCS12> - - # ARMv7-A port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CA9> - - # ARMv8-A ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/Arm_AARCH64> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/Arm_AARCH64_SRE> - - # ARMv6-M port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM0> - - # ARMv6-M / Cortex-M0 Raspberry PI RP2040 port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/RP2040/include> - - # ARMv7-M ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM3> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM3_MPU> - - # ARMv7E-M ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM4_MPU> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM4F> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM7/r0p1> - - # ARMv8-M ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM23/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM23/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM23_NTZ/non_secure> - - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33_NTZ/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33_NTZ/non_secure> - - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM35P/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM35P/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM35P_NTZ/non_secure> - - # ARMv8.1-M ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM55/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM55/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM55_NTZ/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM55_NTZ/non_secure> - - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85_NTZ/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85_NTZ/non_secure> - - # ARMv7-R ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CR5> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CRx_MPU> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CRx_No_GIC> - - # ARMv4T ARM7TDMI ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM7_AT91FR40008> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM7_AT91SAM7S> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM7_LPC2000> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM7_LPC23xx> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/STR75x> - - # Microchip (formerly Ateml) AVR8 ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ATMega323> - $<$:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/ATmega> - $<$:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/Partner-Supported-Ports/GCC/AVR_AVRDx> - $<$:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/Partner-Supported-Ports/GCC/AVR_Mega0> - - # Microchip (formerly Ateml) AVR32 port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/AVR32_UC3> - - # NXP (formerly Motorola, Freescale) Cold Fire and 68HCS12 ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/ColdFire_V2> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/HCS12> - - # Cortus APS3 soft core port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/CORTUS_APS3> - - # Renesas (formerly Hitach) H8S port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/H8S2329> - - # x86 / IA32 flat memory model port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/IA32_flat> - - # Intel (formerly Altera) NIOS II soft core port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/NiosII> - - # Texas Instruments MSP430 port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/MSP430F449> - - # Xilinx MicroBlaze soft core ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/MicroBlaze> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/MicroBlazeV8> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/MicroBlazeV9> - - # Xilinx PCC4XX soft core ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/PPC405_Xilinx> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/PPC440_Xilinx> - - # RISC-V architecture ports for GCC - $<$: - ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V - ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions> - - $<$: - ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V - ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM> - - $<$: - ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V - ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/${FREERTOS_RISCV_EXTENSION}> - - # Renesas RL78 port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/RL78> - - # Renesas RX architecture ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/RX100> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/RX200> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/RX600> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/RX600v2> - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/RX700v3_DPFPU> - - # Infineon TriCore 1782 port for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/GCC/TriCore_1782> - - # Synopsys ARC architecture ports for GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/ARC_EM_HS> - $<$:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/ARC_v1> - - # Posix Simulator port for GCC - $<$: - ${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/Posix - ${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/Posix/utils> - - # Xtensa LX / Espressif ESP32 port for GCC - $<$: - ${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/Xtensa_ESP32 - ${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/Xtensa_ESP32/include> - - # Renesas (formerly NEC) 78K port for IAR EW78K - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/78K0R> - - # ARMv7-A ports for IAR EWARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CA5_No_GIC> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CA9> - - # ARMv6-M port for IAR EWARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM0> - - # ARMv7-M port for IAR EWARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM3> - - # ARMv7E-M ports for IAR EWARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM4F> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM4F_MPU> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM7/r0p1> - - # ARMv8-M Ports for IAR EWARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM23/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM23/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM23_NTZ/non_secure> - - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM33/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM33/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM33_NTZ/non_secure> - - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM35P/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM35P/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM35P_NTZ/non_secure> - - # ARMv8.1-M ports for IAR EWARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM55/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM55/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM55_NTZ/non_secure> - - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85/non_secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85/secure> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85_NTZ/non_secure> - - # ARMv7-R Ports for IAR EWARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CRx_No_GIC> - - # ARMv4T ARM7TDMI ports for IAR Embedded Workbench for ARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/STR71x> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/STR75x> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/LPC2000> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/AtmelSAM7S64> - - # ARMv5TE ARM926 ports for IAR Embedded Workbench for ARM - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/STR91x> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/AtmelSAM9XE> - - # Microchip (formerly Atmel) AVR8 ports for IAR EWAVR - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/ATMega323> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/AVR_AVRDx> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/AVR_Mega0> - - # Microchip (formerly Atmel) AVR32 port for IAR Embedded Workbench for AVR32 - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/AVR32_UC3> - - # Texas Instruments MSP430 ports for IAR Embedded Workbench for MSP430 - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/MSP430> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/MSP430X> - - # RISC-V architecture port for IAR Embedded Workbench for RISC-V - $<$: - ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V - ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions> - - $<$: - ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V - ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V/chip_specific_extensions/${FREERTOS_RISCV_EXTENSION}> - - # Renesas RL78 port for IAR EWRL78 - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/RL78> - - # Renesas RX architecture ports for IAR EWRX - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/RX100> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/RX600> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/RX700v3_DPFPU> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/RXv2> - - # Renesas (formerly NEC) V850ES port for IAR EWV850 - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/V850ES> - $<$:${CMAKE_CURRENT_LIST_DIR}/IAR/V850ES> - - # ARM Cortex-M4F port for the MikroElektronika MikroC compiler - $<$:${CMAKE_CURRENT_LIST_DIR}/MikroC/ARM_CM4F> - - # Microchip PIC18 8-bit MCU port for MPLAB XC8 - $<$:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC18F> - - # Microchip PIC24 16-bit MCU port for MPLAB XC16 - $<$:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC24_dsPIC> - - # Microchip MIPS 32-Bit MCU ports for MPLAB XC32 - $<$:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC32MEC14xx> - $<$:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC32MX> - $<$:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC32MZ> - - # Windows Simulator for Microsoft Visual C Compiler and MinGW GCC - $<$:${CMAKE_CURRENT_LIST_DIR}/MSVC-MingW> - - # 16 bit DOS ports for Open Watcom - $<$: - ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/common - ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/Flsh186> - $<$: - ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/common - ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/PC> - - $<$:${CMAKE_CURRENT_LIST_DIR}/Paradigm/Tern_EE/large_untested> - $<$:${CMAKE_CURRENT_LIST_DIR}/Paradigm/Tern_EE/small> - - # Renesas RX mcu ports for Renesas CC-RX - $<$:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX100> - $<$:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX200> - $<$:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX600> - $<$:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX600v2> - $<$:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX700v3_DPFPU> - - # Renesas (formerly Hitach) SHA2 SuperH port for the Renesas SH C Compiler - $<$:${CMAKE_CURRENT_LIST_DIR}/Renesas/SH2A_FPU> - - # Texas Instruments MSP430 port for Rowley CrossWorks - $<$:${CMAKE_CURRENT_LIST_DIR}/Rowley/MSP430F449> - - # ARMv7-A Cortex-A9 port for ARM RVDS / armcc - $<$:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CA9> - - # ARMv6-M port for ARM RVDS / armcc - $<$:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM0> - - # ARMv7-M port for ARM RVDS / armcc - $<$:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM3> - - # ARMv7E-M ports for ARM RVDS / armcc - $<$:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM4_MPU> - $<$:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM4F> - $<$:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM7/r0p1> - - # ARMv4T / ARM7TDMI LPC21XX port for ARM RVDS / armcc - $<$:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM7_LPC21xx> - - # Cygnal c8051 port for SDCC (Small Device C Compiler) - $<$:${CMAKE_CURRENT_LIST_DIR}/SDCC/Cygnal> - - # Infineon (formerly Fujitsu, Spansion, Cypress) MB9x ports for Softune C Compiler - $<$:${CMAKE_CURRENT_LIST_DIR}/Softune/MB91460> - $<$:${CMAKE_CURRENT_LIST_DIR}/Softune/MB96340> - - # ARMv7E-M (Cortex-M4F) port for TASKING VX-toolset for ARM - $<$:${CMAKE_CURRENT_LIST_DIR}/Tasking/ARM_CM4F> - - # Port for C-SKY T-HEAD CK802 - $<$:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/CDK/T-HEAD_CK802> - - # Tensilica Xtensa port for XCC - $<$:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/XCC/Xtensa> - - # Microchip PIC18 port for WIZ-C - $<$:${CMAKE_CURRENT_LIST_DIR}/WizC/PIC18> -) - -if(FREERTOS_PORT STREQUAL GCC_POSIX) - find_package(Threads REQUIRED) -endif() - -target_link_libraries(freertos_kernel_port - PUBLIC - $<$:pico_base_headers> - $<$:idf::esp32> - freertos_kernel_port_headers - PRIVATE - freertos_kernel_include - $<$:Threads::Threads> - "$<$:hardware_clocks;hardware_exception>" - $<$:winmm> # Windows library which implements timers -) diff --git a/freertos/portable/Keil/See-also-the-RVDS-directory.txt b/freertos/portable/Keil/See-also-the-RVDS-directory.txt deleted file mode 100644 index 944c593..0000000 --- a/freertos/portable/Keil/See-also-the-RVDS-directory.txt +++ /dev/null @@ -1 +0,0 @@ -Nothing to see here. diff --git a/freertos/portable/readme.txt b/freertos/portable/readme.txt deleted file mode 100644 index ca8f71e..0000000 --- a/freertos/portable/readme.txt +++ /dev/null @@ -1,19 +0,0 @@ -Each real time kernel port consists of three files that contain the core kernel -components and are common to every port, and one or more files that are -specific to a particular microcontroller and/or compiler. - - -+ The FreeRTOS/Source/Portable/MemMang directory contains the five sample -memory allocators as described on the https://www.FreeRTOS.org WEB site. - -+ The other directories each contain files specific to a particular -microcontroller or compiler, where the directory name denotes the compiler -specific files the directory contains. - - - -For example, if you are interested in the [compiler] port for the [architecture] -microcontroller, then the port specific files are contained in -FreeRTOS/Source/Portable/[compiler]/[architecture] directory. If this is the -only port you are interested in then all the other directories can be -ignored. diff --git a/freertos/readme.md b/freertos/readme.md new file mode 100644 index 0000000..23c8ad7 --- /dev/null +++ b/freertos/readme.md @@ -0,0 +1,3 @@ +# 移植 + +https://blog.csdn.net/ctt15703065585/article/details/139291183 diff --git a/freertos/sbom.spdx b/freertos/sbom.spdx deleted file mode 100644 index a4099ee..0000000 --- a/freertos/sbom.spdx +++ /dev/null @@ -1,1816 +0,0 @@ -SPDXVersion: SPDX-2.2 -DataLicense: CC0-1.0 -SPDXID: SPDXRef-DOCUMENT -DocumentName: FreeRTOS-Kernel -DocumentNamespace: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/v11.1.0/sbom.spdx -Creator: Organization:Amazon Web Services -Created: 2024-04-22T07:38:21Z -CreatorComment: NOASSERTION -DocumentComment: NOASSERTION - -PackageName: FreeRTOS-Kernel -SPDXID: SPDXRef-Package-FreeRTOS-Kernel -PackageVersion: v11.1.0 -ExternalRef: SECURITY cpe23Type cpe:2.3:o:amazon:freertos:11.1.0:*:*:*:*:*:*:* -PackageDownloadLocation: https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/v11.1.0 -PackageLicenseDeclared: MIT -PackageLicenseConcluded: MIT -PackageLicenseInfoFromFiles: NOASSERTION -FilesAnalyzed: true -PackageVerificationCode: d207dfc39049c30f36250801ccd6b5931877f0c4 -PackageCopyrightText: NOASSERTION -PackageSummary: NOASSERTION -PackageDescription: FreeRTOS Kernel. - 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