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杂糅版本

This commit is contained in:
qiuxin 2025-05-16 11:26:02 +08:00
parent 4f5c836753
commit 2a1233826c
7 changed files with 387 additions and 212 deletions
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10
Core/Inc/main.h
View File

@ -190,9 +190,10 @@ extern "C"
#define DAC2_CS_GPIO_Port GPIOB
#define ADC_CS_Pin GPIO_PIN_0
#define ADC_CS_GPIO_Port GPIOE
#define AD7124_SYNC_Pin GPIO_PIN_1
#define AD7124_SYNC_GPIO_Port GPIOE
/* PCBA测试盒AD7124同步信号引脚定义 */
#define AD7124_SYNC_Pin GPIO_PIN_13
#define AD7124_SYNC_GPIO_Port GPIOD
/* PCBA测试盒AD7124同步信号引脚定义 */
/* SPI2引脚定义 */
#define SPI2_SCK_Pin GPIO_PIN_10
#define SPI2_SCK_GPIO_Port GPIOB
@ -202,6 +203,9 @@ extern "C"
#define SPI2_MOSI_GPIO_Port GPIOC
#define SPI2_CS_Pin GPIO_PIN_10
#define SPI2_CS_GPIO_Port GPIOD
//背面的AD7124
#define SPI2_CS2_Pin GPIO_PIN_11
#define SPI2_CS2_GPIO_Port GPIOD
/* USER CODE BEGIN Private defines */
#define TRUE 0

173
Core/Src/freertos.c
View File

@ -92,6 +92,7 @@ void start_adc_task(void const *argument);
void start_gpio_di_do_task(void const *argument);
void start_ec11_task(void const *argument);
void start_ad7124_test_task(void const *argument);
void ad7124_multi_channel_init(uint8_t sample_rate);
extern void MX_LWIP_Init(void);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
@ -378,84 +379,124 @@ extern int32_t g_ad7124_id;
void start_ad7124_test_task(const void *argument)
{
int32_t ret;
// 等待系统稳定
vTaskDelay(1000);
g_adc_state = 0;
// 初始化AD7124
ret = ad7124_setup();
// 读取关键寄存器值
ret = ad7124_read_register(&ad7124_regs[AD7124_ADC_CONTROL]);
if (ret >= 0) {
g_adc_control = ad7124_regs[AD7124_ADC_CONTROL].value;
}
ret = ad7124_read_register(&ad7124_regs[AD7124_CONFIG_0]);
if (ret >= 0) {
g_config_0 = ad7124_regs[AD7124_CONFIG_0].value;
}
ret = ad7124_read_register(&ad7124_regs[AD7124_FILTER_0]);
if (ret >= 0) {
g_filter_0 = ad7124_regs[AD7124_FILTER_0].value;
}
// 只测试通道1
uint8_t ch = 0; // 假设通道1索引为0，如有不同请调整
ad7124_setup();
vTaskDelay(100);
while(1)
{
// 配置通道1
g_adc_state = 1;
g_channel_config = ad7124_channel_regs[ch].value; // 记录通道配置值
ad7124_regs[AD7124_CHANNEL_0].value = ad7124_channel_regs[ch].value;
ret = ad7124_write_register(&ad7124_regs[AD7124_CHANNEL_0]);
if (ret < 0) {
g_adc_error = ret;
vTaskDelay(500);
continue;
}
// 遍历所有启用的通道
for(uint8_t ch = STOP_NC_ADC; ch < AD7124_CHANNEL_EN_MAX; ch++)
{
// 1. 将ADC设置为掉电模式
ad7124_regs[AD7124_ADC_CONTROL].value = 0x0600; // Power-down mode
ad7124_write_register(&ad7124_regs[AD7124_ADC_CONTROL]);
vTaskDelay(1);
// 读取通道状态寄存器
ret = ad7124_read_register(&ad7124_regs[AD7124_STATUS]);
// 2. 配置当前通道
ad7124_regs[AD7124_CHANNEL_0].value = ad7124_channel_regs[ch].value;
ad7124_write_register(&ad7124_regs[AD7124_CHANNEL_0]);
// 3. 读取并保存通道配置状态
ad7124_read_register(&ad7124_regs[AD7124_CHANNEL_0]);
g_channel_config = ad7124_regs[AD7124_CHANNEL_0].value;
// 4. 设置为单次转换模式并启动转换
ad7124_regs[AD7124_ADC_CONTROL].value = 0x0684; // Single conversion mode
ad7124_write_register(&ad7124_regs[AD7124_ADC_CONTROL]);
// 5. 立即读取状态寄存器确认转换开始
ad7124_read_register(&ad7124_regs[AD7124_STATUS]);
g_channel_status = ad7124_regs[AD7124_STATUS].value;
// 6. 等待转换完成
uint16_t timeout = 1000;
while(timeout--) {
int32_t ret = ad7124_read_register(&ad7124_regs[AD7124_STATUS]);
if(ret >= 0) {
g_channel_status = ad7124_regs[AD7124_STATUS].value;
}
// 等待转换完成，设置较短的超时时间
g_adc_state = 2;
ret = ad7124_wait_for_conv_ready(100); // 100ms超时
if (ret < 0) {
g_adc_error = ret;
vTaskDelay(500);
continue;
}
// 读取数据
g_adc_state = 3;
if(!(g_channel_status & AD7124_STATUS_REG_RDY)) {
// 转换完成，立即读取数据
g_adc_data = ad7124_read_data();
g_adc_error = 0; // 清除错误标志
g_adc_state = 4;
// 组包：4字节大端
uint8_t tx_buf[4];
tx_buf[0] = (g_adc_data >> 24) & 0xFF;
tx_buf[1] = (g_adc_data >> 16) & 0xFF;
tx_buf[2] = (g_adc_data >> 8) & 0xFF;
tx_buf[3] = g_adc_data & 0xFF;
g_adc_state = 5;
// 发送数据
//user_send_data_control(tx_buf, 4);
// 固定延时
vTaskDelay(500);
break;
}
}
vTaskDelay(1);
}
// 7. 读取错误寄存器检查是否有错误
ad7124_read_register(&ad7124_regs[AD7124_ERROR]);
g_adc_error = ad7124_regs[AD7124_ERROR].value;
// 8. 保存最终的控制寄存器状态
ad7124_read_register(&ad7124_regs[AD7124_ADC_CONTROL]);
g_adc_control = ad7124_regs[AD7124_ADC_CONTROL].value;
// 9. 如果发生错误，重置ADC
if(g_adc_error != 0) {
ad7124_reset();
vTaskDelay(100);
ad7124_setup();
vTaskDelay(10);
}
// 10. 如果超时或出错，增加延时方便调试
if(timeout == 0 || g_adc_error != 0) {
vTaskDelay(100);
}
}
vTaskDelay(pdMS_TO_TICKS(10));
}
}
/**
* @brief Initialize AD7124 with multiple channels
* @param sample_rate: Sample rate selection (2Hz to 1kHz)
* @retval None
*/
void ad7124_multi_channel_init(uint8_t sample_rate)
{
// Reset AD7124
ad7124_reset();
vTaskDelay(pdMS_TO_TICKS(100)); // 复位后延时
// 配置ADC控制寄存器
ad7124_regs[AD7124_ADC_CONTROL].value =
AD7124_ADC_CTRL_REG_DATA_STATUS | // Enable status register
AD7124_ADC_CTRL_REG_CS_EN | // Enable chip select
AD7124_ADC_CTRL_REG_REF_EN | // Enable internal reference
AD7124_ADC_CTRL_REG_POWER_MODE(3); // Full power mode
ad7124_write_register(&ad7124_regs[AD7124_ADC_CONTROL]);
// 配置Setup 0
ad7124_regs[AD7124_CONFIG_0].value =
AD7124_CFG_REG_BIPOLAR | // Bipolar mode
AD7124_CFG_REG_BURNOUT(0) | // Burnout current source off
AD7124_CFG_REG_REF_BUFP | // Reference buffer positive enabled
AD7124_CFG_REG_REF_BUFM | // Reference buffer negative enabled
AD7124_CFG_REG_AIN_BUFP | // Enable positive input buffer
AD7124_CFG_REG_AINN_BUFM | // Enable negative input buffer
AD7124_CFG_REG_REF_SEL(2) | // Use internal reference
AD7124_CFG_REG_PGA(0); // Gain = 1
ad7124_write_register(&ad7124_regs[AD7124_CONFIG_0]);
// 初始禁用所有通道
for(uint8_t ch = 0; ch < AD7124_CHANNEL_EN_MAX; ch++) {
ad7124_regs[AD7124_CHANNEL_0 + ch].value = 0;
ad7124_write_register(&ad7124_regs[AD7124_CHANNEL_0 + ch]);
}
// 配置滤波器
ad7124_regs[AD7124_FILTER_0].value =
AD7124_FILT_REG_FILTER(0) | // SINC4 filter
AD7124_FILT_REG_REJ60 | // Enable 60Hz rejection
AD7124_FILT_REG_POST_FILTER(3) | // Post filter enabled
AD7124_FILT_REG_FS(1); // Output data rate
ad7124_write_register(&ad7124_regs[AD7124_FILTER_0]);
}
/* Private application code --------------------------------------------------*/
/* USER CODE BEGIN Application */

112
MDK-ARM/controller_pcba.uvoptx
View File

@ -148,7 +148,72 @@
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM))</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Breakpoint>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>147</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134243296</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>..\User\driver\ad7124.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../User/driver/ad7124.c\147</Expression>
</Bp>
<Bp>
<Number>1</Number>
<Type>0</Type>
<LineNumber>439</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134271122</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../Core/Src/freertos.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../Core/Src/freertos.c\439</Expression>
</Bp>
<Bp>
<Number>2</Number>
<Type>0</Type>
<LineNumber>422</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134271054</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../Core/Src/freertos.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../Core/Src/freertos.c\422</Expression>
</Bp>
<Bp>
<Number>3</Number>
<Type>0</Type>
<LineNumber>419</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134271036</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>../Core/Src/freertos.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\semi_finished_product_testing\../Core/Src/freertos.c\419</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
<Ww>
<count>0</count>
@ -198,77 +263,52 @@
<Ww>
<count>9</count>
<WinNumber>1</WinNumber>
<ItemText>g_adc_state</ItemText>
<ItemText>g_channel_config</ItemText>
</Ww>
<Ww>
<count>10</count>
<WinNumber>1</WinNumber>
<ItemText>g_channel_config</ItemText>
<ItemText>g_channel_status</ItemText>
</Ww>
<Ww>
<count>11</count>
<WinNumber>1</WinNumber>
<ItemText>g_channel_status</ItemText>
<ItemText>g_config_0</ItemText>
</Ww>
<Ww>
<count>12</count>
<WinNumber>1</WinNumber>
<ItemText>g_adc_control</ItemText>
<ItemText>g_filter_0</ItemText>
</Ww>
<Ww>
<count>13</count>
<WinNumber>1</WinNumber>
<ItemText>g_config_0</ItemText>
<ItemText>ad7124_regs[5].value</ItemText>
</Ww>
<Ww>
<count>14</count>
<WinNumber>1</WinNumber>
<ItemText>g_filter_0</ItemText>
<ItemText>g_ad7124_id</ItemText>
</Ww>
<Ww>
<count>15</count>
<WinNumber>1</WinNumber>
<ItemText>ad7124_regs[5].value</ItemText>
<ItemText>g_adc_error</ItemText>
</Ww>
<Ww>
<count>16</count>
<WinNumber>1</WinNumber>
<ItemText>g_ad7124_id</ItemText>
<ItemText>g_adc_data</ItemText>
</Ww>
<Ww>
<count>17</count>
<WinNumber>1</WinNumber>
<ItemText>buffer[1]</ItemText>
<ItemText>g_adc_state</ItemText>
</Ww>
<Ww>
<count>18</count>
<WinNumber>1</WinNumber>
<ItemText>buffer[2]</ItemText>
</Ww>
<Ww>
<count>19</count>
<WinNumber>1</WinNumber>
<ItemText>buffer[3]</ItemText>
</Ww>
<Ww>
<count>20</count>
<WinNumber>1</WinNumber>
<ItemText>tx_buf[0]</ItemText>
</Ww>
<Ww>
<count>21</count>
<WinNumber>1</WinNumber>
<ItemText>tx_buf[1]</ItemText>
</Ww>
<Ww>
<count>22</count>
<WinNumber>1</WinNumber>
<ItemText>tx_buf[2]</ItemText>
</Ww>
<Ww>
<count>23</count>
<WinNumber>1</WinNumber>
<ItemText>tx_buf[3]</ItemText>
<ItemText>g_adc_control</ItemText>
</Ww>
</WatchWindow1>
<Tracepoint>

57
MDK-ARM/semi-finished_product_testing/semi-finished_product_testing.build_log.htm Normal file
View File

@ -0,0 +1,57 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.36.0.0
Copyright (C) 2021 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: 1 admin, 1, LIC=UJWP0-B9JWK-458T5-GZZVK-L22WW-E2L2W
Tool Versions:
Toolchain: MDK-ARM Plus Version: 5.36.0.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 7 (build 960)
Assembler: Armasm.exe V5.06 update 7 (build 960)
Linker/Locator: ArmLink.exe V5.06 update 7 (build 960)
Library Manager: ArmAr.exe V5.06 update 7 (build 960)
Hex Converter: FromElf.exe V5.06 update 7 (build 960)
CPU DLL: SARMCM3.DLL V5.36.0.0
Dialog DLL: DCM.DLL V1.17.3.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.9.0
Dialog DLL: TCM.DLL V1.53.0.0
<h2>Project:</h2>
C:\Users\qiuxin.JS250402\Desktop\PCBA\controller_pcba_rtos\MDK-ARM\controller_pcba.uvprojx
Project File Date: 05/14/2025
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 7 (build 960)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'controller_pcba'
"semi-finished_product_testing\semi-finished_product_testing.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.8.0.pack
ARM.CMSIS.5.8.0
CMSIS (Common Microcontroller Software Interface Standard)
* Component: CORE Version: 5.5.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.14.0.pack
Keil.STM32F4xx_DFP.2.14.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_controller_pcba
C:\Users\qiuxin.JS250402\AppData\Local\Arm\Packs\ARM\CMSIS\5.8.0\CMSIS\Core\Include
C:\Users\qiuxin.JS250402\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.14.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.5.0
Include file: CMSIS\Core\Include\tz_context.h
Build Time Elapsed: 00:00:01
</pre>
</body>
</html>

149
User/driver/ad7124.c
View File

@ -13,7 +13,7 @@ int32_t g_ad7124_id;
// 配置ad7124寄存器的值，根据实际项目需求配置
ad7124_st_reg_t ad7124_regs[AD7124_REG_NO] = {
{AD7124_STATUS, 0x00, AD7124_SIZE_1, AD7124_R}, /* AD7124_Status */
{AD7124_ADC_CONTROL, 0x0280, AD7124_SIZE_2, AD7124_RW}, /* AD7124_ADC_Control */
{AD7124_ADC_CONTROL, 0x0680, AD7124_SIZE_2, AD7124_RW}, /* AD7124_ADC_Control - Enable reference, chip select, and data status */
{AD7124_DATA, 0x000000, AD7124_SIZE_3, AD7124_R}, /* AD7124_Data */
{AD7124_IOCON1, 0x000000, AD7124_SIZE_3, AD7124_RW}, /* AD7124_IOCon1 */
{AD7124_IOCON2, 0x0000, AD7124_SIZE_2, AD7124_RW}, /* AD7124_IOCon2 */
@ -37,7 +37,7 @@ ad7124_st_reg_t ad7124_regs[AD7124_REG_NO] = {
{AD7124_CHANNEL_13, 0x0001, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Channel_13 */
{AD7124_CHANNEL_14, 0x0001, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Channel_14 */
{AD7124_CHANNEL_15, 0x0001, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Channel_15 */
{AD7124_CONFIG_0, 0x01E0, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_0 */
{AD7124_CONFIG_0, 0x0DE0, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_0 - Enable buffers and internal reference */
{AD7124_CONFIG_1, 0x0040, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_1 */
{AD7124_CONFIG_2, 0x0860, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_2 */
{AD7124_CONFIG_3, 0x0860, AD7124_SIZE_2, AD7124_RW}, /* AD7124_Config_3 */
@ -99,6 +99,7 @@ int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg)
int32_t ret = 0;
uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint8_t add_status_length = 0;
uint8_t i = 0; // 添加变量声明
// 构建命令字
buffer[0] = AD7124_COMM_REG_RD | AD7124_COMM_REG_RA(p_reg->addr);
@ -120,14 +121,20 @@ int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg)
return ret;
// 解析数据（buffer[1]开始为有效数据）
if (p_reg->size == 1) {
p_reg->value = buffer[1];
} else if (p_reg->size == 2) {
p_reg->value = ((uint16_t)buffer[1] << 8) | buffer[2];
} else if (p_reg->size == 3) {
p_reg->value = ((uint32_t)buffer[1] << 16) | ((uint32_t)buffer[2] << 8) | buffer[3];
} else {
// if (p_reg->size == 1) {
// p_reg->value = buffer[1];
// } else if (p_reg->size == 2) {
// p_reg->value = ((uint16_t)buffer[1] << 8) | buffer[2];
// } else if (p_reg->size == 3) {
// p_reg->value = ((uint32_t)buffer[1] << 16) | ((uint32_t)buffer[2] << 8) | buffer[3];
// } else {
// p_reg->value = 0;
// }
p_reg->value = 0;
for (i = 1; i < p_reg->size + 1; i++)
{
p_reg->value <<= 8;
p_reg->value += buffer[i];
}
if (add_status_length)
@ -434,79 +441,83 @@ int32_t ad7124_setup(void)
{
int32_t ret;
uint8_t reg_nr;
char uart_buf[100];
// 初始化SPI
// Initialize SPI
board_spi_init(AD7124);
HAL_Delay(10); // 等待SPI稳定
HAL_Delay(10); // Wait for SPI to stabilize
// 复位设备
// Reset device
ret = ad7124_reset();
if (ret < 0) {
sprintf(uart_buf, "AD7124 reset failed: %ld\r\n", ret);
HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100);
if (ret < 0)
return ret;
}
// 等待复位完成
HAL_Delay(100); // 增加复位后的等待时间
// Wait after reset
HAL_Delay(100);
// 等待电源稳定
// Wait for power-on
ret = ad7124_wait_to_power_on(AD7124_RDY);
if (ret < 0) {
sprintf(uart_buf, "AD7124 power on timeout: %ld\r\n", ret);
HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100);
if (ret < 0)
return ret;
}
// 读取ID寄存器
// Read and verify ID register
ret = ad7124_read_register(&ad7124_regs[AD7124_ID]);
if (ret < 0) {
sprintf(uart_buf, "Failed to read ID register: %ld\r\n", ret);
HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100);
if (ret < 0)
return ret;
if ((ad7124_regs[AD7124_ID].value & 0xF0) != 0x40) {
return COMM_ERR; // Invalid ID
}
// 检查ID值
// if (ad7124_regs[AD7124_ID].value != 0x14) {
// sprintf(uart_buf, "Invalid ID: 0x%02X, expected 0x14\r\n", ad7124_regs[AD7124_ID].value);
// HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100);
// return COMM_ERR;
// }
// Initialize registers in sequence
// First ADC Control register - Set to standby mode initially
ad7124_regs[AD7124_ADC_CONTROL].value =
AD7124_ADC_CTRL_REG_POWER_MODE(3) | // Full power mode
AD7124_ADC_CTRL_REG_CS_EN | // Enable chip select
AD7124_ADC_CTRL_REG_DATA_STATUS | // Enable status register
AD7124_ADC_CTRL_REG_REF_EN | // Enable reference
AD7124_ADC_CTRL_REG_MODE(0); // Continuous conversion mode initially
// sprintf(uart_buf, "AD7124 ID verified: 0x%02X\r\n", ad7124_regs[AD7124_ID].value);
// HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100);
ret = ad7124_write_register(&ad7124_regs[AD7124_ADC_CONTROL]);
if (ret < 0)
return ret;
// 初始化其他寄存器
for (reg_nr = AD7124_STATUS; reg_nr < AD7124_OFFSET_0; reg_nr++) {
if (ad7124_regs[reg_nr].rw == AD7124_RW) {
// Then Configuration registers
ad7124_regs[AD7124_CONFIG_0].value =
AD7124_CFG_REG_BIPOLAR | // Bipolar mode
AD7124_CFG_REG_REF_BUFP | // Reference buffer positive enabled
AD7124_CFG_REG_REF_BUFM | // Reference buffer negative enabled
AD7124_CFG_REG_AIN_BUFP | // Enable positive input buffer
AD7124_CFG_REG_AINN_BUFM | // Enable negative input buffer
AD7124_CFG_REG_REF_SEL(2) | // Use internal reference
AD7124_CFG_REG_PGA(0); // Gain = 1
ret = ad7124_write_register(&ad7124_regs[AD7124_CONFIG_0]);
if (ret < 0)
return ret;
// Then Filter registers - Set for 50Hz rejection
ad7124_regs[AD7124_FILTER_0].value =
AD7124_FILT_REG_FILTER(0) | // SINC4 filter
AD7124_FILT_REG_REJ60 | // Enable 60Hz rejection
AD7124_FILT_REG_POST_FILTER(3) | // Post filter enabled
AD7124_FILT_REG_FS(1); // Output data rate
ret = ad7124_write_register(&ad7124_regs[AD7124_FILTER_0]);
if (ret < 0)
return ret;
// Initialize all channels to disabled state
for(reg_nr = AD7124_CHANNEL_0; reg_nr <= AD7124_CHANNEL_15; reg_nr++) {
ad7124_regs[reg_nr].value = 0x0000; // Disable channel
ret = ad7124_write_register(&ad7124_regs[reg_nr]);
if (ret < 0) {
sprintf(uart_buf, "Failed to write register 0x%02X: %ld\r\n", reg_nr, ret);
HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100);
if (ret < 0)
return ret;
}
// 验证写入
ret = ad7124_read_register(&ad7124_regs[reg_nr]);
if (ret < 0) {
sprintf(uart_buf, "Failed to verify register 0x%02X: %ld\r\n", reg_nr, ret);
HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100);
// Verify ADC Control register
ret = ad7124_read_register(&ad7124_regs[AD7124_ADC_CONTROL]);
if (ret < 0)
return ret;
}
// 如果读取的值与写入的值不匹配，返回错误
if (ad7124_regs[reg_nr].value != ad7124_regs[reg_nr].value) {
sprintf(uart_buf, "Register 0x%02X mismatch: wrote 0x%04X, read 0x%04X\r\n",
reg_nr, ad7124_regs[reg_nr].value, ad7124_regs[reg_nr].value);
HAL_UART_Transmit(&huart1, (uint8_t*)uart_buf, strlen(uart_buf), 100);
return COMM_ERR;
}
}
}
// 使能同步信号
HAL_GPIO_WritePin(AD7124_SYNC_GPIO_Port, AD7124_SYNC_Pin, GPIO_PIN_SET);
return 0;
}
@ -528,14 +539,26 @@ int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length)
// 确保CS信号在传输前是高的
board_spi_cs_off(AD7124);
HAL_Delay(1); // 添加短暂延时
//board_spi_init(AD7124);
// 确保SPI配置正确
board_spi_init(AD7124);
// 拉低CS开始传输
board_spi_cs_on(AD7124);
HAL_Delay(1); // 添加短暂延时
// 执行SPI传输
ret = spi_transmit_receive(&hspi2, buff, length);
HAL_Delay(1); // 添加短暂延时
// 等待最后一个字节传输完成
HAL_Delay(1);
// 拉高CS结束传输
board_spi_cs_off(AD7124);
HAL_Delay(1); // 确保CS保持高电平足够长时间
return ret;
}
// 修改SPI初始化函数

30
User/driver/ad7124.h
View File

@ -21,6 +21,9 @@
#define GAIN 1
#define AD_CODE 0XFFFFFF
//#define AD7124_4 0x00
#define AD7124_8 0x01
/* Communication Register bits */
#define AD7124_COMM_REG_WEN (0 << 7)
#define AD7124_COMM_REG_WR (0 << 6)
@ -148,6 +151,7 @@
/* Configuration Registers 0-7 bits */
#define AD7124_CFG_REG_BIPOLAR (1 << 11)
#define AD7124_CFG_REG_UNIPOLAR (0 << 11) // 单极性
#define AD7124_CFG_REG_BURNOUT(x) (((x) & 0x3) << 9)
#define AD7124_CFG_REG_REF_BUFP (1 << 8)
#define AD7124_CFG_REG_REF_BUFM (1 << 7)
@ -247,7 +251,7 @@ typedef enum
typedef struct
{
int addr;
int32_t value;
int value;
int size;
int rw;
} ad7124_st_reg_t;
@ -280,17 +284,17 @@ extern ad7124_st_reg_t ad7124_regs[AD7124_REG_NO];
extern ad7124_st_reg_t ad7124_channel_regs[AD7124_CHANNEL_EN_MAX];
extern int32_t g_ad7124_id;
// 函数声明
int32_t ad7124_read_register(ad7124_st_reg_t *p_reg);
int32_t ad7124_write_register(ad7124_st_reg_t *reg);
int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg);
int32_t ad7124_no_check_write_register(ad7124_st_reg_t *reg);
int32_t ad7124_reset(void);
int32_t ad7124_wait_for_spi_ready(uint32_t timeout);
int32_t ad7124_wait_to_power_on(uint32_t timeout);
int32_t ad7124_wait_for_conv_ready(uint32_t timeout);
int32_t ad7124_read_data(void);
void ad7124_get_analog(uint8_t channel_nr);
int32_t ad7124_setup(void);
int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length);
int32_t ad7124_read_register(ad7124_st_reg_t *p_reg);//读取寄存器
int32_t ad7124_write_register(ad7124_st_reg_t *reg);//写入寄存器
int32_t ad7124_no_check_read_register(ad7124_st_reg_t *p_reg);//不检查读取寄存器
int32_t ad7124_no_check_write_register(ad7124_st_reg_t *reg);//不检查写入寄存器
int32_t ad7124_reset(void);//复位
int32_t ad7124_wait_for_spi_ready(uint32_t timeout);//等待SPI准备好
int32_t ad7124_wait_to_power_on(uint32_t timeout);//等待电源开启
int32_t ad7124_wait_for_conv_ready(uint32_t timeout);//等待转换准备好
int32_t ad7124_read_data(void);//读取数据
void ad7124_get_analog(uint8_t channel_nr);//获取模拟量
int32_t ad7124_setup(void);//设置
int32_t ad7124_read_write_spi(uint8_t *buff, uint8_t length);//读写SPI
#endif /* __AD7124_H */

12
User/system/user_spi.c
View File

@ -28,14 +28,19 @@ void ad7124_spi_init(void)
hspi2.Init.Mode = SPI_MODE_MASTER;
hspi2.Init.Direction = SPI_DIRECTION_2LINES;
hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH;
hspi2.Init.CLKPhase = SPI_PHASE_2EDGE;
hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH; // CPOL = 1
hspi2.Init.CLKPhase = SPI_PHASE_2EDGE; // CPHA = 1
hspi2.Init.NSS = SPI_NSS_SOFT;
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; // 降低速度以确保稳定性
hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi2.Init.CRCPolynomial = 10;
// 确保CS初始为高电平
HAL_GPIO_WritePin(SPI2_CS_GPIO_Port, SPI2_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(SPI2_CS2_GPIO_Port, SPI2_CS2_Pin, GPIO_PIN_SET);
if (HAL_SPI_Init(&hspi2) != HAL_OK)
{
Error_Handler();
@ -69,6 +74,7 @@ void ad7124_cs_on(void)
{
// 激活AD7124 (CS低电平有效)
HAL_GPIO_WritePin(SPI2_CS_GPIO_Port, SPI2_CS_Pin, GPIO_PIN_RESET);
}
void ad7124_cs_off(void)